xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision f86aa9e1925ef129e92324b3d5e1d4c7f0a03e87) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8	mx6ulccbv2 \
9
10mx6ull-flavorlist = \
11	mx6ullevk \
12	mx6ulzevk \
13
14mx6q-flavorlist = \
15	mx6qsabrelite \
16	mx6qsabreauto \
17	mx6qsabresd \
18	mx6qhmbedge \
19	mx6qapalis \
20
21mx6qp-flavorlist = \
22	mx6qpsabreauto \
23	mx6qpsabresd \
24
25mx6sl-flavorlist = \
26	mx6slevk
27
28mx6sll-flavorlist = \
29	mx6sllevk
30
31mx6sx-flavorlist = \
32	mx6sxsabreauto \
33	mx6sxsabresd \
34	mx6sxudooneofull \
35
36mx6d-flavorlist = \
37	mx6dhmbedge \
38	mx6dapalis \
39
40mx6dl-flavorlist = \
41	mx6dlsabreauto \
42	mx6dlsabresd \
43	mx6dlhmbedge \
44
45mx6s-flavorlist = \
46	mx6shmbedge \
47	mx6solosabresd \
48	mx6solosabreauto \
49
50mx7d-flavorlist = \
51	mx7dsabresd \
52	mx7dpico_mbl \
53	mx7dclsom \
54
55mx7s-flavorlist = \
56	mx7swarp7 \
57	mx7swarp7_mbl \
58
59mx7ulp-flavorlist = \
60	mx7ulpevk
61
62mx8mq-flavorlist = \
63	mx8mqevk
64
65mx8mm-flavorlist = \
66	mx8mmevk
67
68mx8mn-flavorlist = \
69	mx8mnevk
70
71mx8qm-flavorlist = \
72	mx8qmmek \
73
74mx8qx-flavorlist = \
75	mx8qxpmek \
76
77ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
78$(call force,CFG_MX6,y)
79$(call force,CFG_MX6UL,y)
80$(call force,CFG_TEE_CORE_NB_CORE,1)
81$(call force,CFG_TZC380,y)
82include core/arch/arm/cpu/cortex-a7.mk
83else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
84$(call force,CFG_MX6,y)
85$(call force,CFG_MX6ULL,y)
86$(call force,CFG_TEE_CORE_NB_CORE,1)
87$(call force,CFG_IMX_CAAM,n)
88$(call force,CFG_NXP_CAAM,n)
89include core/arch/arm/cpu/cortex-a7.mk
90else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
91$(call force,CFG_MX6,y)
92$(call force,CFG_MX6Q,y)
93$(call force,CFG_TEE_CORE_NB_CORE,4)
94$(call force,CFG_TZC380,y)
95else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
96$(call force,CFG_MX6,y)
97$(call force,CFG_MX6QP,y)
98$(call force,CFG_TEE_CORE_NB_CORE,4)
99else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
100$(call force,CFG_MX6,y)
101$(call force,CFG_MX6D,y)
102$(call force,CFG_TEE_CORE_NB_CORE,2)
103$(call force,CFG_TZC380,y)
104else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
105$(call force,CFG_MX6,y)
106$(call force,CFG_MX6DL,y)
107$(call force,CFG_TEE_CORE_NB_CORE,2)
108$(call force,CFG_TZC380,y)
109else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
110$(call force,CFG_MX6,y)
111$(call force,CFG_MX6S,y)
112$(call force,CFG_TEE_CORE_NB_CORE,1)
113else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
114$(call force,CFG_MX6,y)
115$(call force,CFG_MX6SL,y)
116$(call force,CFG_TEE_CORE_NB_CORE,1)
117$(call force,CFG_IMX_CAAM,n)
118$(call force,CFG_NXP_CAAM,n)
119else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
120$(call force,CFG_MX6,y)
121$(call force,CFG_MX6SLL,y)
122$(call force,CFG_TEE_CORE_NB_CORE,1)
123$(call force,CFG_IMX_CAAM,n)
124$(call force,CFG_NXP_CAAM,n)
125else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
126$(call force,CFG_MX6,y)
127$(call force,CFG_MX6SX,y)
128$(call force,CFG_TEE_CORE_NB_CORE,1)
129else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
130$(call force,CFG_MX7,y)
131$(call force,CFG_TEE_CORE_NB_CORE,1)
132include core/arch/arm/cpu/cortex-a7.mk
133else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
134$(call force,CFG_MX7,y)
135$(call force,CFG_TEE_CORE_NB_CORE,2)
136include core/arch/arm/cpu/cortex-a7.mk
137else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
138$(call force,CFG_MX7ULP,y)
139$(call force,CFG_TEE_CORE_NB_CORE,1)
140$(call force,CFG_TZC380,n)
141$(call force,CFG_CSU,n)
142$(call force,CFG_NXP_CAAM,n)
143include core/arch/arm/cpu/cortex-a7.mk
144else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mq-flavorlist)))
145$(call force,CFG_MX8MQ,y)
146$(call force,CFG_ARM64_core,y)
147CFG_IMX_UART ?= y
148CFG_DRAM_BASE ?= 0x40000000
149CFG_TEE_CORE_NB_CORE ?= 4
150else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist)))
151$(call force,CFG_MX8MM,y)
152$(call force,CFG_ARM64_core,y)
153CFG_IMX_UART ?= y
154CFG_DRAM_BASE ?= 0x40000000
155CFG_TEE_CORE_NB_CORE ?= 4
156else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mn-flavorlist)))
157$(call force,CFG_MX8MN,y)
158$(call force,CFG_ARM64_core,y)
159CFG_IMX_UART ?= y
160CFG_DRAM_BASE ?= 0x40000000
161CFG_TEE_CORE_NB_CORE ?= 4
162else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist)))
163$(call force,CFG_MX8QM,y)
164$(call force,CFG_ARM64_core,y)
165$(call force,CFG_IMX_SNVS,n)
166CFG_IMX_LPUART ?= y
167CFG_DRAM_BASE ?= 0x80000000
168CFG_TEE_CORE_NB_CORE ?= 6
169$(call force,CFG_NXP_CAAM,n)
170else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qx-flavorlist)))
171$(call force,CFG_MX8QX,y)
172$(call force,CFG_ARM64_core,y)
173CFG_IMX_LPUART ?= y
174CFG_DRAM_BASE ?= 0x80000000
175CFG_TEE_CORE_NB_CORE ?= 4
176$(call force,CFG_NXP_CAAM,n)
177else
178$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
179endif
180
181ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
182CFG_DDR_SIZE ?= 0x40000000
183CFG_NS_ENTRY_ADDR ?= 0x80800000
184endif
185
186ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
187CFG_DDR_SIZE ?= 0x40000000
188CFG_UART_BASE ?= UART1_BASE
189endif
190
191ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
192CFG_DDR_SIZE ?= 0x20000000
193CFG_NS_ENTRY_ADDR ?= 0x87800000
194CFG_DT_ADDR ?= 0x83100000
195CFG_UART_BASE ?= UART5_BASE
196CFG_BOOT_SECONDARY_REQUEST ?= n
197CFG_EXTERNAL_DTB_OVERLAY ?= y
198CFG_IMX_WDOG_EXT_RESET ?= y
199endif
200
201ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
202CFG_DDR_SIZE ?= 0x20000000
203CFG_NS_ENTRY_ADDR ?= 0x80800000
204CFG_BOOT_SECONDARY_REQUEST ?= n
205endif
206
207ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
208CFG_DDR_SIZE ?= 0x20000000
209CFG_NS_ENTRY_ADDR ?= 0x87800000
210CFG_DT_ADDR ?= 0x83100000
211CFG_BOOT_SECONDARY_REQUEST ?= n
212CFG_EXTERNAL_DTB_OVERLAY = y
213CFG_IMX_WDOG_EXT_RESET = y
214endif
215
216ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
217CFG_DDR_SIZE ?= 0x40000000
218CFG_NS_ENTRY_ADDR ?= 0x60800000
219CFG_UART_BASE ?= UART4_BASE
220endif
221
222ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
223	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd \
224	mx6dapalis mx6qapalis))
225CFG_DDR_SIZE ?= 0x40000000
226CFG_NS_ENTRY_ADDR ?= 0x12000000
227endif
228
229ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
230	mx6dlsabreauto mx6solosabreauto))
231CFG_DDR_SIZE ?= 0x80000000
232CFG_NS_ENTRY_ADDR ?= 0x12000000
233CFG_UART_BASE ?= UART4_BASE
234endif
235
236ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
237CFG_DDR_SIZE ?= 0x80000000
238CFG_UART_BASE ?= UART1_BASE
239endif
240
241ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
242CFG_DDR_SIZE ?= 0x40000000
243CFG_NS_ENTRY_ADDR ?= 0x12000000
244endif
245
246ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
247CFG_DDR_SIZE ?= 0x40000000
248CFG_NS_ENTRY_ADDR ?= 0x12000000
249CFG_UART_BASE ?= UART2_BASE
250endif
251
252ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
253CFG_NS_ENTRY_ADDR ?= 0x80800000
254CFG_DDR_SIZE ?= 0x40000000
255endif
256
257ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
258CFG_NS_ENTRY_ADDR ?= 0x80800000
259CFG_DDR_SIZE ?= 0x80000000
260endif
261
262ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
263CFG_DDR_SIZE ?= 0x80000000
264CFG_NS_ENTRY_ADDR ?= 0x80800000
265endif
266
267ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
268CFG_DDR_SIZE ?= 0x40000000
269CFG_NS_ENTRY_ADDR ?= 0x80800000
270endif
271
272ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
273CFG_DDR_SIZE ?= 0x40000000
274CFG_UART_BASE ?= UART1_BASE
275endif
276
277ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk mx6ulzevk))
278CFG_DDR_SIZE ?= 0x20000000
279CFG_NS_ENTRY_ADDR ?= 0x80800000
280endif
281
282ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
283CFG_DDR_SIZE ?= 0x10000000
284CFG_NS_ENTRY_ADDR ?= 0x80800000
285CFG_UART_BASE ?= UART5_BASE
286endif
287
288ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
289CFG_DDR_SIZE ?= 0x10000000
290CFG_NS_ENTRY_ADDR ?= 0x80800000
291endif
292
293ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccbv2))
294CFG_DDR_SIZE ?= 0x10000000
295CFG_UART_BASE ?= UART7_BASE
296endif
297
298ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mqevk))
299CFG_DDR_SIZE ?= 0xc0000000
300CFG_UART_BASE ?= UART1_BASE
301endif
302
303ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk))
304CFG_DDR_SIZE ?= 0x80000000
305CFG_UART_BASE ?= UART2_BASE
306endif
307
308ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk))
309CFG_DDR_SIZE ?= 0x80000000
310CFG_UART_BASE ?= UART2_BASE
311endif
312
313ifneq (,$(filter $(PLATFORM_FLAVOR),mx8qxpmek mx8qmmek))
314CFG_DDR_SIZE ?= 0x80000000
315CFG_UART_BASE ?= UART0_BASE
316CFG_NSEC_DDR_1_BASE ?= 0x880000000UL
317CFG_NSEC_DDR_1_SIZE  ?= 0x380000000UL
318CFG_CORE_ARM64_PA_BITS ?= 40
319endif
320
321# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
322ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
323	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
324include core/arch/arm/cpu/cortex-a9.mk
325
326$(call force,CFG_PL310,y)
327
328CFG_PL310_LOCKED ?= y
329CFG_ENABLE_SCTLR_RR ?= y
330CFG_SCU ?= y
331endif
332
333ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
334CFG_DRAM_BASE ?= 0x10000000
335endif
336
337ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
338	$(CFG_MX6SX)))
339CFG_DRAM_BASE ?= 0x80000000
340endif
341
342ifeq ($(filter y, $(CFG_MX7)), y)
343CFG_INIT_CNTVOFF ?= y
344CFG_DRAM_BASE ?= 0x80000000
345endif
346
347ifeq ($(filter y, $(CFG_MX7ULP)), y)
348CFG_INIT_CNTVOFF ?= y
349CFG_DRAM_BASE ?= UL(0x60000000)
350$(call force,CFG_IMX_LPUART,y)
351$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
352endif
353
354ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
355$(call force,CFG_GIC,y)
356$(call force,CFG_PM_STUBS,y)
357
358CFG_BOOT_SECONDARY_REQUEST ?= y
359CFG_DT ?= y
360CFG_PAGEABLE_ADDR ?= 0
361CFG_PSCI_ARM32 ?= y
362CFG_SECURE_TIME_SOURCE_REE ?= y
363CFG_UART_BASE ?= UART1_BASE
364endif
365
366ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
367$(call force,CFG_IMX_UART,y)
368ifeq ($(CFG_RPMB_FS),y)
369CFG_IMX_SNVS ?= y
370endif
371CFG_CSU ?= y
372endif
373
374ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
375CFG_HWSUPP_MEM_PERM_WXN = n
376CFG_IMX_WDOG ?= y
377endif
378
379ifeq ($(CFG_ARM64_core),y)
380# arm-v8 platforms
381include core/arch/arm/cpu/cortex-armv8-0.mk
382$(call force,CFG_ARM_GICV3,y)
383$(call force,CFG_GIC,y)
384$(call force,CFG_WITH_LPAE,y)
385$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
386$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
387
388CFG_CRYPTO_WITH_CE ?= y
389CFG_PM_STUBS ?= y
390
391supported-ta-targets = ta_arm64
392endif
393
394CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
395CFG_TZDRAM_SIZE ?= 0x01e00000
396CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
397CFG_SHMEM_SIZE ?= 0x00200000
398
399CFG_NSEC_DDR_0_BASE ?= $(CFG_DRAM_BASE)
400CFG_NSEC_DDR_0_SIZE ?= ($(CFG_DDR_SIZE) - 0x02000000)
401
402CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
403CFG_MMAP_REGIONS ?= 24
404
405# Almost all platforms include CAAM HW Modules, except the
406# ones forced to be disabled
407CFG_NXP_CAAM ?= n
408
409ifeq ($(CFG_NXP_CAAM),y)
410# As NXP CAAM Driver is enabled, disable the small local CAAM driver
411# used just to release Job Rings to Non-Secure world
412$(call force,CFG_IMX_CAAM,n)
413
414# If NXP CAAM Driver is supported, the Crypto Driver interfacing
415# it with generic crypto API can be enabled.
416CFG_CRYPTO_DRIVER ?= y
417# Crypto Driver Debug
418# DRV_DBG_TRACE BIT32(0) // Driver trace
419# DRV_DBG_BUF   BIT32(1) // Driver dump Buffer
420CFG_CRYPTO_DRIVER_DEBUG ?= 0
421else
422$(call force,CFG_CRYPTO_DRIVER,n)
423$(call force,CFG_WITH_SOFTWARE_PRNG,y)
424
425ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
426CFG_IMX_CAAM ?= y
427endif
428endif
429
430# Cryptographic configuration
431include core/arch/arm/plat-imx/crypto_conf.mk
432