xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision f795b673bac2fe95ac4e6f78359e591a085c496e) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8
9mx6ull-flavorlist = \
10	mx6ullevk \
11
12mx6q-flavorlist = \
13	mx6qsabrelite \
14	mx6qsabreauto \
15	mx6qsabresd \
16	mx6qhmbedge \
17
18mx6qp-flavorlist = \
19	mx6qpsabreauto \
20	mx6qpsabresd \
21
22mx6sl-flavorlist = \
23	mx6slevk
24
25mx6sll-flavorlist = \
26	mx6sllevk
27
28mx6sx-flavorlist = \
29	mx6sxsabreauto \
30	mx6sxsabresd \
31	mx6sxudooneofull \
32
33mx6d-flavorlist = \
34	mx6dhmbedge \
35
36mx6dl-flavorlist = \
37	mx6dlsabreauto \
38	mx6dlsabresd \
39	mx6dlhmbedge \
40
41mx6s-flavorlist = \
42	mx6shmbedge \
43	mx6solosabresd \
44	mx6solosabreauto \
45
46mx7d-flavorlist = \
47	mx7dsabresd \
48	mx7dpico_mbl \
49	mx7dclsom \
50
51mx7s-flavorlist = \
52	mx7swarp7 \
53	mx7swarp7_mbl \
54
55mx7ulp-flavorlist = \
56	mx7ulpevk
57
58imx8mq-flavorlist = \
59	imx8mqevk
60
61imx8mm-flavorlist = \
62	imx8mmevk
63
64imx8mn-flavorlist = \
65	imx8mnevk
66
67imx8qm-flavorlist = \
68	imx8qmmek \
69
70imx8qx-flavorlist = \
71	imx8qxpmek \
72
73ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
74$(call force,CFG_MX6,y)
75$(call force,CFG_MX6UL,y)
76$(call force,CFG_TEE_CORE_NB_CORE,1)
77include core/arch/arm/cpu/cortex-a7.mk
78else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
79$(call force,CFG_MX6,y)
80$(call force,CFG_MX6ULL,y)
81$(call force,CFG_TEE_CORE_NB_CORE,1)
82$(call force,CFG_IMX_CAAM,n)
83include core/arch/arm/cpu/cortex-a7.mk
84else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
85$(call force,CFG_MX6,y)
86$(call force,CFG_MX6Q,y)
87$(call force,CFG_TEE_CORE_NB_CORE,4)
88else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
89$(call force,CFG_MX6,y)
90$(call force,CFG_MX6QP,y)
91$(call force,CFG_TEE_CORE_NB_CORE,4)
92else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
93$(call force,CFG_MX6,y)
94$(call force,CFG_MX6D,y)
95$(call force,CFG_TEE_CORE_NB_CORE,2)
96else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
97$(call force,CFG_MX6,y)
98$(call force,CFG_MX6DL,y)
99$(call force,CFG_TEE_CORE_NB_CORE,2)
100else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
101$(call force,CFG_MX6,y)
102$(call force,CFG_MX6S,y)
103$(call force,CFG_TEE_CORE_NB_CORE,1)
104else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
105$(call force,CFG_MX6,y)
106$(call force,CFG_MX6SL,y)
107$(call force,CFG_TEE_CORE_NB_CORE,1)
108$(call force,CFG_IMX_CAAM,n)
109else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
110$(call force,CFG_MX6,y)
111$(call force,CFG_MX6SLL,y)
112$(call force,CFG_TEE_CORE_NB_CORE,1)
113$(call force,CFG_IMX_CAAM,n)
114else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
115$(call force,CFG_MX6,y)
116$(call force,CFG_MX6SX,y)
117$(call force,CFG_TEE_CORE_NB_CORE,1)
118else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
119$(call force,CFG_MX7,y)
120$(call force,CFG_TEE_CORE_NB_CORE,1)
121include core/arch/arm/cpu/cortex-a7.mk
122else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
123$(call force,CFG_MX7,y)
124$(call force,CFG_TEE_CORE_NB_CORE,2)
125include core/arch/arm/cpu/cortex-a7.mk
126else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
127$(call force,CFG_MX7ULP,y)
128$(call force,CFG_TEE_CORE_NB_CORE,1)
129$(call force,CFG_TZC380,n)
130$(call force,CFG_CSU,n)
131include core/arch/arm/cpu/cortex-a7.mk
132else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mq-flavorlist)))
133$(call force,CFG_IMX8MQ,y)
134$(call force,CFG_ARM64_core,y)
135CFG_IMX_UART ?= y
136CFG_DRAM_BASE ?= 0x40000000
137CFG_TEE_CORE_NB_CORE ?= 4
138else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mm-flavorlist)))
139$(call force,CFG_IMX8MM,y)
140$(call force,CFG_ARM64_core,y)
141CFG_IMX_UART ?= y
142CFG_DRAM_BASE ?= 0x40000000
143CFG_TEE_CORE_NB_CORE ?= 4
144else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mn-flavorlist)))
145$(call force,CFG_IMX8MN,y)
146$(call force,CFG_ARM64_core,y)
147CFG_IMX_UART ?= y
148CFG_DRAM_BASE ?= 0x40000000
149CFG_TEE_CORE_NB_CORE ?= 4
150else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8qm-flavorlist)))
151$(call force,CFG_IMX8QM,y)
152$(call force,CFG_ARM64_core,y)
153$(call force,CFG_IMX_SNVS,n)
154CFG_IMX_LPUART ?= y
155CFG_DRAM_BASE ?= 0x40000000
156CFG_TEE_CORE_NB_CORE ?= 6
157else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8qx-flavorlist)))
158$(call force,CFG_IMX8QX,y)
159$(call force,CFG_ARM64_core,y)
160CFG_IMX_LPUART ?= y
161CFG_DRAM_BASE ?= 0x40000000
162CFG_TEE_CORE_NB_CORE ?= 4
163else
164$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
165endif
166
167ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
168CFG_DDR_SIZE ?= 0x40000000
169CFG_NS_ENTRY_ADDR ?= 0x80800000
170endif
171
172ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
173CFG_DDR_SIZE ?= 0x40000000
174CFG_UART_BASE ?= UART1_BASE
175endif
176
177ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
178CFG_DDR_SIZE ?= 0x20000000
179CFG_NS_ENTRY_ADDR ?= 0x87800000
180CFG_DT_ADDR ?= 0x83100000
181CFG_UART_BASE ?= UART5_BASE
182CFG_BOOT_SECONDARY_REQUEST ?= n
183CFG_EXTERNAL_DTB_OVERLAY ?= y
184CFG_IMX_WDOG_EXT_RESET ?= y
185endif
186
187ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
188CFG_DDR_SIZE ?= 0x20000000
189CFG_NS_ENTRY_ADDR ?= 0x80800000
190CFG_BOOT_SECONDARY_REQUEST ?= n
191endif
192
193ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
194CFG_DDR_SIZE ?= 0x20000000
195CFG_NS_ENTRY_ADDR ?= 0x87800000
196CFG_DT_ADDR ?= 0x83100000
197CFG_BOOT_SECONDARY_REQUEST ?= n
198CFG_EXTERNAL_DTB_OVERLAY = y
199CFG_IMX_WDOG_EXT_RESET = y
200endif
201
202ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
203CFG_DDR_SIZE ?= 0x40000000
204CFG_NS_ENTRY_ADDR ?= 0x60800000
205CFG_UART_BASE ?= UART4_BASE
206endif
207
208ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
209	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd))
210CFG_DDR_SIZE ?= 0x40000000
211CFG_NS_ENTRY_ADDR ?= 0x12000000
212endif
213
214ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
215	mx6dlsabreauto mx6solosabreauto))
216CFG_DDR_SIZE ?= 0x80000000
217CFG_NS_ENTRY_ADDR ?= 0x12000000
218endif
219
220ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
221CFG_DDR_SIZE ?= 0x80000000
222CFG_UART_BASE ?= UART1_BASE
223endif
224
225ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
226CFG_DDR_SIZE ?= 0x40000000
227CFG_NS_ENTRY_ADDR ?= 0x12000000
228endif
229
230ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
231CFG_DDR_SIZE ?= 0x40000000
232CFG_NS_ENTRY_ADDR ?= 0x12000000
233CFG_UART_BASE ?= UART2_BASE
234endif
235
236ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
237CFG_NS_ENTRY_ADDR ?= 0x80800000
238CFG_DDR_SIZE ?= 0x40000000
239endif
240
241ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
242CFG_NS_ENTRY_ADDR ?= 0x80800000
243CFG_DDR_SIZE ?= 0x80000000
244endif
245
246ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
247CFG_DDR_SIZE ?= 0x80000000
248CFG_NS_ENTRY_ADDR ?= 0x80800000
249endif
250
251ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
252CFG_DDR_SIZE ?= 0x40000000
253CFG_NS_ENTRY_ADDR ?= 0x80800000
254endif
255
256ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
257CFG_DDR_SIZE ?= 0x40000000
258CFG_UART_BASE ?= UART1_BASE
259endif
260
261ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk))
262CFG_DDR_SIZE ?= 0x20000000
263CFG_NS_ENTRY_ADDR ?= 0x80800000
264endif
265
266ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
267CFG_DDR_SIZE ?= 0x10000000
268CFG_NS_ENTRY_ADDR ?= 0x80800000
269CFG_UART_BASE ?= UART5_BASE
270endif
271
272ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
273CFG_DDR_SIZE ?= 0x10000000
274CFG_NS_ENTRY_ADDR ?= 0x80800000
275endif
276
277ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mqevk))
278CFG_DDR_SIZE ?= 0xc0000000
279CFG_UART_BASE ?= UART1_BASE
280endif
281
282ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mmevk))
283CFG_DDR_SIZE ?= 0x80000000
284CFG_UART_BASE ?= UART2_BASE
285endif
286
287ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mnevk))
288CFG_DDR_SIZE ?= 0x80000000
289CFG_UART_BASE ?= UART2_BASE
290endif
291
292ifneq (,$(filter $(PLATFORM_FLAVOR),imx8qxpmek imx8qmmek))
293CFG_DDR_SIZE ?= 0x80000000
294CFG_UART_BASE ?= UART0_BASE
295endif
296
297# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
298ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
299	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
300include core/arch/arm/cpu/cortex-a9.mk
301
302$(call force,CFG_PL310,y)
303
304CFG_PL310_LOCKED ?= y
305CFG_ENABLE_SCTLR_RR ?= y
306CFG_SCU ?= y
307endif
308
309ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
310CFG_DRAM_BASE ?= 0x10000000
311endif
312
313ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
314	$(CFG_MX6SX)))
315CFG_DRAM_BASE ?= 0x80000000
316endif
317
318ifeq ($(filter y, $(CFG_MX7)), y)
319CFG_INIT_CNTVOFF ?= y
320CFG_DRAM_BASE ?= 0x80000000
321endif
322
323ifeq ($(filter y, $(CFG_MX7ULP)), y)
324CFG_INIT_CNTVOFF ?= y
325CFG_DRAM_BASE ?= 0x80000000
326$(call force,CFG_IMX_LPUART,y)
327$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
328endif
329
330ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
331$(call force,CFG_GENERIC_BOOT,y)
332$(call force,CFG_GIC,y)
333$(call force,CFG_PM_STUBS,y)
334$(call force,CFG_WITH_SOFTWARE_PRNG,y)
335
336CFG_BOOT_SYNC_CPU ?= n
337CFG_BOOT_SECONDARY_REQUEST ?= y
338CFG_DT ?= y
339CFG_PAGEABLE_ADDR ?= 0
340CFG_PSCI_ARM32 ?= y
341CFG_SECURE_TIME_SOURCE_REE ?= y
342CFG_UART_BASE ?= UART1_BASE
343CFG_IMX_CAAM ?= y
344endif
345
346ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
347$(call force,CFG_IMX_UART,y)
348CFG_CSU ?= y
349endif
350
351ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
352CFG_HWSUPP_MEM_PERM_WXN = n
353CFG_IMX_WDOG ?= y
354endif
355
356ifeq ($(CFG_ARM64_core),y)
357# arm-v8 platforms
358include core/arch/arm/cpu/cortex-armv8-0.mk
359$(call force,CFG_ARM_GICV3,y)
360$(call force,CFG_GENERIC_BOOT,y)
361$(call force,CFG_GIC,y)
362$(call force,CFG_WITH_LPAE,y)
363$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
364$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
365
366CFG_CRYPTO_WITH_CE ?= y
367CFG_PM_STUBS ?= y
368
369supported-ta-targets = ta_arm64
370endif
371
372CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
373CFG_TZDRAM_SIZE ?= 0x01e00000
374CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
375CFG_SHMEM_SIZE ?= 0x00200000
376
377CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
378CFG_WITH_STACK_CANARIES ?= y
379CFG_MMAP_REGIONS ?= 24
380