xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision f7492391a90d5fa10df014c1cf54a4308a6e9a2a) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8
9mx6ull-flavorlist = \
10	mx6ullevk \
11
12mx6q-flavorlist = \
13	mx6qsabrelite \
14	mx6qsabreauto \
15	mx6qsabresd \
16	mx6qhmbedge \
17	mx6qapalis \
18
19mx6qp-flavorlist = \
20	mx6qpsabreauto \
21	mx6qpsabresd \
22
23mx6sl-flavorlist = \
24	mx6slevk
25
26mx6sll-flavorlist = \
27	mx6sllevk
28
29mx6sx-flavorlist = \
30	mx6sxsabreauto \
31	mx6sxsabresd \
32	mx6sxudooneofull \
33
34mx6d-flavorlist = \
35	mx6dhmbedge \
36	mx6dapalis \
37
38mx6dl-flavorlist = \
39	mx6dlsabreauto \
40	mx6dlsabresd \
41	mx6dlhmbedge \
42
43mx6s-flavorlist = \
44	mx6shmbedge \
45	mx6solosabresd \
46	mx6solosabreauto \
47
48mx7d-flavorlist = \
49	mx7dsabresd \
50	mx7dpico_mbl \
51	mx7dclsom \
52
53mx7s-flavorlist = \
54	mx7swarp7 \
55	mx7swarp7_mbl \
56
57mx7ulp-flavorlist = \
58	mx7ulpevk
59
60imx8mq-flavorlist = \
61	imx8mqevk
62
63imx8mm-flavorlist = \
64	imx8mmevk
65
66imx8mn-flavorlist = \
67	imx8mnevk
68
69imx8qm-flavorlist = \
70	imx8qmmek \
71
72imx8qx-flavorlist = \
73	imx8qxpmek \
74
75ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
76$(call force,CFG_MX6,y)
77$(call force,CFG_MX6UL,y)
78$(call force,CFG_TEE_CORE_NB_CORE,1)
79include core/arch/arm/cpu/cortex-a7.mk
80else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
81$(call force,CFG_MX6,y)
82$(call force,CFG_MX6ULL,y)
83$(call force,CFG_TEE_CORE_NB_CORE,1)
84$(call force,CFG_IMX_CAAM,n)
85include core/arch/arm/cpu/cortex-a7.mk
86else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
87$(call force,CFG_MX6,y)
88$(call force,CFG_MX6Q,y)
89$(call force,CFG_TEE_CORE_NB_CORE,4)
90else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
91$(call force,CFG_MX6,y)
92$(call force,CFG_MX6QP,y)
93$(call force,CFG_TEE_CORE_NB_CORE,4)
94else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
95$(call force,CFG_MX6,y)
96$(call force,CFG_MX6D,y)
97$(call force,CFG_TEE_CORE_NB_CORE,2)
98else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
99$(call force,CFG_MX6,y)
100$(call force,CFG_MX6DL,y)
101$(call force,CFG_TEE_CORE_NB_CORE,2)
102else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
103$(call force,CFG_MX6,y)
104$(call force,CFG_MX6S,y)
105$(call force,CFG_TEE_CORE_NB_CORE,1)
106else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
107$(call force,CFG_MX6,y)
108$(call force,CFG_MX6SL,y)
109$(call force,CFG_TEE_CORE_NB_CORE,1)
110$(call force,CFG_IMX_CAAM,n)
111else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
112$(call force,CFG_MX6,y)
113$(call force,CFG_MX6SLL,y)
114$(call force,CFG_TEE_CORE_NB_CORE,1)
115$(call force,CFG_IMX_CAAM,n)
116else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
117$(call force,CFG_MX6,y)
118$(call force,CFG_MX6SX,y)
119$(call force,CFG_TEE_CORE_NB_CORE,1)
120else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
121$(call force,CFG_MX7,y)
122$(call force,CFG_TEE_CORE_NB_CORE,1)
123include core/arch/arm/cpu/cortex-a7.mk
124else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
125$(call force,CFG_MX7,y)
126$(call force,CFG_TEE_CORE_NB_CORE,2)
127include core/arch/arm/cpu/cortex-a7.mk
128else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
129$(call force,CFG_MX7ULP,y)
130$(call force,CFG_TEE_CORE_NB_CORE,1)
131$(call force,CFG_TZC380,n)
132$(call force,CFG_CSU,n)
133include core/arch/arm/cpu/cortex-a7.mk
134else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mq-flavorlist)))
135$(call force,CFG_IMX8MQ,y)
136$(call force,CFG_ARM64_core,y)
137CFG_IMX_UART ?= y
138CFG_DRAM_BASE ?= 0x40000000
139CFG_TEE_CORE_NB_CORE ?= 4
140else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mm-flavorlist)))
141$(call force,CFG_IMX8MM,y)
142$(call force,CFG_ARM64_core,y)
143CFG_IMX_UART ?= y
144CFG_DRAM_BASE ?= 0x40000000
145CFG_TEE_CORE_NB_CORE ?= 4
146else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mn-flavorlist)))
147$(call force,CFG_IMX8MN,y)
148$(call force,CFG_ARM64_core,y)
149CFG_IMX_UART ?= y
150CFG_DRAM_BASE ?= 0x40000000
151CFG_TEE_CORE_NB_CORE ?= 4
152else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8qm-flavorlist)))
153$(call force,CFG_IMX8QM,y)
154$(call force,CFG_ARM64_core,y)
155$(call force,CFG_IMX_SNVS,n)
156CFG_IMX_LPUART ?= y
157CFG_DRAM_BASE ?= 0x40000000
158CFG_TEE_CORE_NB_CORE ?= 6
159else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8qx-flavorlist)))
160$(call force,CFG_IMX8QX,y)
161$(call force,CFG_ARM64_core,y)
162CFG_IMX_LPUART ?= y
163CFG_DRAM_BASE ?= 0x40000000
164CFG_TEE_CORE_NB_CORE ?= 4
165else
166$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
167endif
168
169ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
170CFG_DDR_SIZE ?= 0x40000000
171CFG_NS_ENTRY_ADDR ?= 0x80800000
172endif
173
174ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
175CFG_DDR_SIZE ?= 0x40000000
176CFG_UART_BASE ?= UART1_BASE
177endif
178
179ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
180CFG_DDR_SIZE ?= 0x20000000
181CFG_NS_ENTRY_ADDR ?= 0x87800000
182CFG_DT_ADDR ?= 0x83100000
183CFG_UART_BASE ?= UART5_BASE
184CFG_BOOT_SECONDARY_REQUEST ?= n
185CFG_EXTERNAL_DTB_OVERLAY ?= y
186CFG_IMX_WDOG_EXT_RESET ?= y
187endif
188
189ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
190CFG_DDR_SIZE ?= 0x20000000
191CFG_NS_ENTRY_ADDR ?= 0x80800000
192CFG_BOOT_SECONDARY_REQUEST ?= n
193endif
194
195ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
196CFG_DDR_SIZE ?= 0x20000000
197CFG_NS_ENTRY_ADDR ?= 0x87800000
198CFG_DT_ADDR ?= 0x83100000
199CFG_BOOT_SECONDARY_REQUEST ?= n
200CFG_EXTERNAL_DTB_OVERLAY = y
201CFG_IMX_WDOG_EXT_RESET = y
202endif
203
204ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
205CFG_DDR_SIZE ?= 0x40000000
206CFG_NS_ENTRY_ADDR ?= 0x60800000
207CFG_UART_BASE ?= UART4_BASE
208endif
209
210ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
211	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd \
212	mx6dapalis mx6qapalis))
213CFG_DDR_SIZE ?= 0x40000000
214CFG_NS_ENTRY_ADDR ?= 0x12000000
215endif
216
217ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
218	mx6dlsabreauto mx6solosabreauto))
219CFG_DDR_SIZE ?= 0x80000000
220CFG_NS_ENTRY_ADDR ?= 0x12000000
221endif
222
223ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
224CFG_DDR_SIZE ?= 0x80000000
225CFG_UART_BASE ?= UART1_BASE
226endif
227
228ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
229CFG_DDR_SIZE ?= 0x40000000
230CFG_NS_ENTRY_ADDR ?= 0x12000000
231endif
232
233ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
234CFG_DDR_SIZE ?= 0x40000000
235CFG_NS_ENTRY_ADDR ?= 0x12000000
236CFG_UART_BASE ?= UART2_BASE
237endif
238
239ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
240CFG_NS_ENTRY_ADDR ?= 0x80800000
241CFG_DDR_SIZE ?= 0x40000000
242endif
243
244ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
245CFG_NS_ENTRY_ADDR ?= 0x80800000
246CFG_DDR_SIZE ?= 0x80000000
247endif
248
249ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
250CFG_DDR_SIZE ?= 0x80000000
251CFG_NS_ENTRY_ADDR ?= 0x80800000
252endif
253
254ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
255CFG_DDR_SIZE ?= 0x40000000
256CFG_NS_ENTRY_ADDR ?= 0x80800000
257endif
258
259ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
260CFG_DDR_SIZE ?= 0x40000000
261CFG_UART_BASE ?= UART1_BASE
262endif
263
264ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk))
265CFG_DDR_SIZE ?= 0x20000000
266CFG_NS_ENTRY_ADDR ?= 0x80800000
267endif
268
269ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
270CFG_DDR_SIZE ?= 0x10000000
271CFG_NS_ENTRY_ADDR ?= 0x80800000
272CFG_UART_BASE ?= UART5_BASE
273endif
274
275ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
276CFG_DDR_SIZE ?= 0x10000000
277CFG_NS_ENTRY_ADDR ?= 0x80800000
278endif
279
280ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mqevk))
281CFG_DDR_SIZE ?= 0xc0000000
282CFG_UART_BASE ?= UART1_BASE
283endif
284
285ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mmevk))
286CFG_DDR_SIZE ?= 0x80000000
287CFG_UART_BASE ?= UART2_BASE
288endif
289
290ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mnevk))
291CFG_DDR_SIZE ?= 0x80000000
292CFG_UART_BASE ?= UART2_BASE
293endif
294
295ifneq (,$(filter $(PLATFORM_FLAVOR),imx8qxpmek imx8qmmek))
296CFG_DDR_SIZE ?= 0x80000000
297CFG_UART_BASE ?= UART0_BASE
298endif
299
300# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
301ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
302	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
303include core/arch/arm/cpu/cortex-a9.mk
304
305$(call force,CFG_PL310,y)
306
307CFG_PL310_LOCKED ?= y
308CFG_ENABLE_SCTLR_RR ?= y
309CFG_SCU ?= y
310endif
311
312ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
313CFG_DRAM_BASE ?= 0x10000000
314endif
315
316ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
317	$(CFG_MX6SX)))
318CFG_DRAM_BASE ?= 0x80000000
319endif
320
321ifeq ($(filter y, $(CFG_MX7)), y)
322CFG_INIT_CNTVOFF ?= y
323CFG_DRAM_BASE ?= 0x80000000
324endif
325
326ifeq ($(filter y, $(CFG_MX7ULP)), y)
327CFG_INIT_CNTVOFF ?= y
328CFG_DRAM_BASE ?= 0x80000000
329$(call force,CFG_IMX_LPUART,y)
330$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
331endif
332
333ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
334$(call force,CFG_GENERIC_BOOT,y)
335$(call force,CFG_GIC,y)
336$(call force,CFG_PM_STUBS,y)
337$(call force,CFG_WITH_SOFTWARE_PRNG,y)
338
339CFG_BOOT_SYNC_CPU ?= n
340CFG_BOOT_SECONDARY_REQUEST ?= y
341CFG_DT ?= y
342CFG_PAGEABLE_ADDR ?= 0
343CFG_PSCI_ARM32 ?= y
344CFG_SECURE_TIME_SOURCE_REE ?= y
345CFG_UART_BASE ?= UART1_BASE
346CFG_IMX_CAAM ?= y
347endif
348
349ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
350$(call force,CFG_IMX_UART,y)
351CFG_CSU ?= y
352endif
353
354ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
355CFG_HWSUPP_MEM_PERM_WXN = n
356CFG_IMX_WDOG ?= y
357endif
358
359ifeq ($(CFG_ARM64_core),y)
360# arm-v8 platforms
361include core/arch/arm/cpu/cortex-armv8-0.mk
362$(call force,CFG_ARM_GICV3,y)
363$(call force,CFG_GENERIC_BOOT,y)
364$(call force,CFG_GIC,y)
365$(call force,CFG_WITH_LPAE,y)
366$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
367$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
368
369CFG_CRYPTO_WITH_CE ?= y
370CFG_PM_STUBS ?= y
371
372supported-ta-targets = ta_arm64
373endif
374
375CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
376CFG_TZDRAM_SIZE ?= 0x01e00000
377CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
378CFG_SHMEM_SIZE ?= 0x00200000
379
380CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
381CFG_WITH_STACK_CANARIES ?= y
382CFG_MMAP_REGIONS ?= 24
383