xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision eef98bfbb8de6db5d3081cea0b5e4f637d193510) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8	mx6ulccbv2 \
9
10mx6ull-flavorlist = \
11	mx6ullevk \
12	mx6ulzevk \
13
14mx6q-flavorlist = \
15	mx6qsabrelite \
16	mx6qsabreauto \
17	mx6qsabresd \
18	mx6qhmbedge \
19	mx6qapalis \
20
21mx6qp-flavorlist = \
22	mx6qpsabreauto \
23	mx6qpsabresd \
24
25mx6sl-flavorlist = \
26	mx6slevk
27
28mx6sll-flavorlist = \
29	mx6sllevk
30
31mx6sx-flavorlist = \
32	mx6sxsabreauto \
33	mx6sxsabresd \
34	mx6sxudooneofull \
35
36mx6d-flavorlist = \
37	mx6dhmbedge \
38	mx6dapalis \
39
40mx6dl-flavorlist = \
41	mx6dlsabreauto \
42	mx6dlsabresd \
43	mx6dlhmbedge \
44
45mx6s-flavorlist = \
46	mx6shmbedge \
47	mx6solosabresd \
48	mx6solosabreauto \
49
50mx7d-flavorlist = \
51	mx7dsabresd \
52	mx7dpico_mbl \
53	mx7dclsom \
54
55mx7s-flavorlist = \
56	mx7swarp7 \
57	mx7swarp7_mbl \
58
59mx7ulp-flavorlist = \
60	mx7ulpevk
61
62mx8mq-flavorlist = \
63	mx8mqevk
64
65mx8mm-flavorlist = \
66	mx8mmevk \
67	mx8mm_cl_iot_gate
68
69mx8mn-flavorlist = \
70	mx8mnevk
71
72mx8mp-flavorlist = \
73	mx8mpevk \
74	mx8mp_rsb3720_6g
75
76mx8qm-flavorlist = \
77	mx8qmmek \
78
79mx8qx-flavorlist = \
80	mx8qxpmek \
81	mx8dxmek \
82
83mx8dxl-flavorlist = \
84	mx8dxlevk \
85
86mx8ulp-flavorlist = \
87	mx8ulpevk \
88
89mx93-flavorlist = \
90	mx93evk \
91
92mx95-flavorlist = \
93	mx95evk \
94
95mx91-flavorlist = \
96	mx91evk \
97
98ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
99$(call force,CFG_MX6,y)
100$(call force,CFG_MX6UL,y)
101$(call force,CFG_TEE_CORE_NB_CORE,1)
102$(call force,CFG_TZC380,y)
103include core/arch/arm/cpu/cortex-a7.mk
104else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
105$(call force,CFG_MX6,y)
106$(call force,CFG_MX6ULL,y)
107$(call force,CFG_TEE_CORE_NB_CORE,1)
108$(call force,CFG_TZC380,y)
109$(call force,CFG_IMX_CAAM,n)
110$(call force,CFG_NXP_CAAM,n)
111$(call force,CFG_IMX_DCP,y)
112include core/arch/arm/cpu/cortex-a7.mk
113else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
114$(call force,CFG_MX6,y)
115$(call force,CFG_MX6Q,y)
116$(call force,CFG_TEE_CORE_NB_CORE,4)
117$(call force,CFG_TZC380,y)
118else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
119$(call force,CFG_MX6,y)
120$(call force,CFG_MX6QP,y)
121$(call force,CFG_TEE_CORE_NB_CORE,4)
122else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
123$(call force,CFG_MX6,y)
124$(call force,CFG_MX6D,y)
125$(call force,CFG_TEE_CORE_NB_CORE,2)
126$(call force,CFG_TZC380,y)
127else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
128$(call force,CFG_MX6,y)
129$(call force,CFG_MX6DL,y)
130$(call force,CFG_TEE_CORE_NB_CORE,2)
131$(call force,CFG_TZC380,y)
132else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
133$(call force,CFG_MX6,y)
134$(call force,CFG_MX6S,y)
135$(call force,CFG_TEE_CORE_NB_CORE,1)
136else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
137$(call force,CFG_MX6,y)
138$(call force,CFG_MX6SL,y)
139$(call force,CFG_TEE_CORE_NB_CORE,1)
140$(call force,CFG_IMX_CAAM,n)
141$(call force,CFG_NXP_CAAM,n)
142$(call force,CFG_IMX_DCP,y)
143else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
144$(call force,CFG_MX6,y)
145$(call force,CFG_MX6SLL,y)
146$(call force,CFG_TEE_CORE_NB_CORE,1)
147$(call force,CFG_IMX_CAAM,n)
148$(call force,CFG_NXP_CAAM,n)
149$(call force,CFG_IMX_DCP,y)
150$(call force,CFG_NO_SMP,y)
151else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
152$(call force,CFG_MX6,y)
153$(call force,CFG_MX6SX,y)
154$(call force,CFG_TEE_CORE_NB_CORE,1)
155else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
156$(call force,CFG_MX7,y)
157$(call force,CFG_TEE_CORE_NB_CORE,1)
158include core/arch/arm/cpu/cortex-a7.mk
159else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
160$(call force,CFG_MX7,y)
161$(call force,CFG_TEE_CORE_NB_CORE,2)
162include core/arch/arm/cpu/cortex-a7.mk
163else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
164$(call force,CFG_MX7ULP,y)
165$(call force,CFG_TEE_CORE_NB_CORE,1)
166$(call force,CFG_TZC380,n)
167$(call force,CFG_IMX_CSU,n)
168include core/arch/arm/cpu/cortex-a7.mk
169else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mq-flavorlist)))
170$(call force,CFG_MX8MQ,y)
171$(call force,CFG_MX8M,y)
172$(call force,CFG_ARM64_core,y)
173$(call force,CFG_TZC380,y)
174CFG_DRAM_BASE ?= 0x40000000
175CFG_TEE_CORE_NB_CORE ?= 4
176else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist)))
177$(call force,CFG_MX8MM,y)
178$(call force,CFG_MX8M,y)
179$(call force,CFG_ARM64_core,y)
180$(call force,CFG_TZC380,y)
181CFG_DRAM_BASE ?= 0x40000000
182CFG_TEE_CORE_NB_CORE ?= 4
183else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mn-flavorlist)))
184$(call force,CFG_MX8MN,y)
185$(call force,CFG_MX8M,y)
186$(call force,CFG_ARM64_core,y)
187$(call force,CFG_TZC380,y)
188CFG_DRAM_BASE ?= 0x40000000
189CFG_TEE_CORE_NB_CORE ?= 4
190else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mp-flavorlist)))
191$(call force,CFG_MX8MP,y)
192$(call force,CFG_MX8M,y)
193$(call force,CFG_ARM64_core,y)
194$(call force,CFG_TZC380,y)
195CFG_DRAM_BASE ?= 0x40000000
196CFG_TEE_CORE_NB_CORE ?= 4
197else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist)))
198$(call force,CFG_MX8QM,y)
199$(call force,CFG_ARM64_core,y)
200$(call force,CFG_IMX_SNVS,n)
201CFG_IMX_LPUART ?= y
202CFG_DRAM_BASE ?= 0x80000000
203CFG_TEE_CORE_NB_CORE ?= 6
204$(call force,CFG_IMX_OCOTP,n)
205else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qx-flavorlist)))
206$(call force,CFG_MX8QX,y)
207$(call force,CFG_ARM64_core,y)
208$(call force,CFG_IMX_SNVS,n)
209CFG_IMX_LPUART ?= y
210CFG_DRAM_BASE ?= 0x80000000
211CFG_TEE_CORE_NB_CORE ?= 4
212$(call force,CFG_IMX_OCOTP,n)
213else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8dxl-flavorlist)))
214$(call force,CFG_MX8DXL,y)
215$(call force,CFG_ARM64_core,y)
216$(call force,CFG_IMX_SNVS,n)
217CFG_IMX_LPUART ?= y
218CFG_DRAM_BASE ?= 0x80000000
219$(call force,CFG_TEE_CORE_NB_CORE,2)
220$(call force,CFG_IMX_OCOTP,n)
221else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8ulp-flavorlist)))
222$(call force,CFG_MX8ULP,y)
223$(call force,CFG_ARM64_core,y)
224CFG_IMX_LPUART ?= y
225CFG_DRAM_BASE ?= 0x80000000
226CFG_TEE_CORE_NB_CORE ?= 2
227$(call force,CFG_NXP_SNVS,n)
228$(call force,CFG_IMX_OCOTP,n)
229CFG_IMX_MU ?= y
230CFG_IMX_ELE ?= n
231else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx93-flavorlist)))
232$(call force,CFG_MX93,y)
233$(call force,CFG_ARM64_core,y)
234CFG_IMX_LPUART ?= y
235CFG_DRAM_BASE ?= 0x80000000
236CFG_TEE_CORE_NB_CORE ?= 2
237$(call force,CFG_NXP_SNVS,n)
238$(call force,CFG_IMX_OCOTP,n)
239$(call force,CFG_TZC380,n)
240$(call force,CFG_CRYPTO_DRIVER,n)
241$(call force,CFG_NXP_CAAM,n)
242CFG_IMX_MU ?= y
243CFG_IMX_ELE ?= n
244else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx95-flavorlist)))
245$(call force,CFG_MX95,y)
246$(call force,CFG_ARM64_core,y)
247CFG_IMX_LPUART ?= y
248CFG_DRAM_BASE ?= 0x80000000
249CFG_TEE_CORE_NB_CORE ?= 6
250$(call force,CFG_NXP_SNVS,n)
251$(call force,CFG_IMX_OCOTP,n)
252$(call force,CFG_TZC380,n)
253$(call force,CFG_NXP_CAAM,n)
254else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx91-flavorlist)))
255$(call force,CFG_MX91,y)
256$(call force,CFG_ARM64_core,y)
257CFG_IMX_LPUART ?= y
258CFG_DRAM_BASE ?= 0x80000000
259CFG_TEE_CORE_NB_CORE ?= 1
260$(call force,CFG_NXP_SNVS,n)
261$(call force,CFG_IMX_OCOTP,n)
262$(call force,CFG_TZC380,n)
263$(call force,CFG_NXP_CAAM,n)
264else
265$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
266endif
267
268ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
269CFG_DDR_SIZE ?= 0x40000000
270CFG_NS_ENTRY_ADDR ?= 0x80800000
271CFG_IMX_WDOG_EXT_RESET ?= y
272endif
273
274ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
275CFG_DDR_SIZE ?= 0x40000000
276CFG_UART_BASE ?= UART1_BASE
277CFG_IMX_WDOG_EXT_RESET ?= y
278endif
279
280ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
281CFG_DDR_SIZE ?= 0x20000000
282CFG_NS_ENTRY_ADDR ?= 0x87800000
283CFG_DT_ADDR ?= 0x83100000
284CFG_UART_BASE ?= UART5_BASE
285CFG_BOOT_SECONDARY_REQUEST ?= n
286CFG_EXTERNAL_DTB_OVERLAY ?= y
287CFG_IMX_WDOG_EXT_RESET ?= y
288endif
289
290ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
291CFG_DDR_SIZE ?= 0x20000000
292CFG_NS_ENTRY_ADDR ?= 0x80800000
293CFG_BOOT_SECONDARY_REQUEST ?= n
294endif
295
296ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
297CFG_DDR_SIZE ?= 0x20000000
298CFG_NS_ENTRY_ADDR ?= 0x87800000
299CFG_DT_ADDR ?= 0x83100000
300CFG_BOOT_SECONDARY_REQUEST ?= n
301CFG_EXTERNAL_DTB_OVERLAY = y
302CFG_IMX_WDOG_EXT_RESET = y
303endif
304
305ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
306CFG_DDR_SIZE ?= 0x40000000
307CFG_NS_ENTRY_ADDR ?= 0x60800000
308CFG_UART_BASE ?= UART4_BASE
309endif
310
311ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
312	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd \
313	mx6dapalis mx6qapalis))
314CFG_DDR_SIZE ?= 0x40000000
315CFG_NS_ENTRY_ADDR ?= 0x12000000
316endif
317
318ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
319	mx6dlsabreauto mx6solosabreauto))
320CFG_DDR_SIZE ?= 0x80000000
321CFG_NS_ENTRY_ADDR ?= 0x12000000
322CFG_UART_BASE ?= UART4_BASE
323endif
324
325ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
326CFG_DDR_SIZE ?= 0x80000000
327CFG_UART_BASE ?= UART1_BASE
328endif
329
330ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
331CFG_DDR_SIZE ?= 0x40000000
332CFG_NS_ENTRY_ADDR ?= 0x12000000
333endif
334
335ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
336CFG_DDR_SIZE ?= 0x40000000
337CFG_NS_ENTRY_ADDR ?= 0x12000000
338CFG_UART_BASE ?= UART2_BASE
339endif
340
341ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
342CFG_NS_ENTRY_ADDR ?= 0x80800000
343CFG_DDR_SIZE ?= 0x40000000
344endif
345
346ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
347CFG_NS_ENTRY_ADDR ?= 0x80800000
348CFG_DDR_SIZE ?= 0x80000000
349endif
350
351ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
352CFG_DDR_SIZE ?= 0x80000000
353CFG_NS_ENTRY_ADDR ?= 0x80800000
354endif
355
356ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
357CFG_DDR_SIZE ?= 0x40000000
358CFG_NS_ENTRY_ADDR ?= 0x80800000
359endif
360
361ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
362CFG_DDR_SIZE ?= 0x40000000
363CFG_UART_BASE ?= UART1_BASE
364endif
365
366ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk mx6ulzevk))
367CFG_DDR_SIZE ?= 0x20000000
368CFG_NS_ENTRY_ADDR ?= 0x80800000
369endif
370
371ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
372CFG_DDR_SIZE ?= 0x10000000
373CFG_NS_ENTRY_ADDR ?= 0x80800000
374CFG_UART_BASE ?= UART5_BASE
375endif
376
377ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
378CFG_DDR_SIZE ?= 0x10000000
379CFG_NS_ENTRY_ADDR ?= 0x80800000
380endif
381
382ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccbv2))
383CFG_DDR_SIZE ?= 0x10000000
384CFG_UART_BASE ?= UART7_BASE
385endif
386
387ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mqevk))
388CFG_DDR_SIZE ?= 0xc0000000
389CFG_UART_BASE ?= UART1_BASE
390endif
391
392ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk))
393CFG_DDR_SIZE ?= 0x80000000
394CFG_UART_BASE ?= UART2_BASE
395endif
396
397ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mm_cl_iot_gate))
398CFG_DDR_SIZE ?= 0x40000000
399CFG_UART_BASE ?= UART3_BASE
400CFG_NSEC_DDR_1_BASE ?= 0x80000000UL
401CFG_NSEC_DDR_1_SIZE ?= 0x40000000UL
402endif
403
404ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk))
405CFG_DDR_SIZE ?= 0x80000000
406CFG_UART_BASE ?= UART2_BASE
407endif
408
409ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mpevk))
410CFG_DDR_SIZE ?= UL(0x180000000)
411CFG_UART_BASE ?= UART2_BASE
412$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
413$(call force,CFG_CORE_ARM64_PA_BITS,36)
414endif
415
416ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mp_rsb3720_6g))
417CFG_DDR_SIZE ?= UL(0x180000000)
418CFG_UART_BASE ?= UART3_BASE
419CFG_TZDRAM_START ?= 0x56000000
420$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
421$(call force,CFG_CORE_ARM64_PA_BITS,36)
422endif
423
424ifneq (,$(filter $(PLATFORM_FLAVOR),mx8qxpmek mx8qmmek))
425CFG_DDR_SIZE ?= 0x80000000
426CFG_UART_BASE ?= UART0_BASE
427CFG_NSEC_DDR_1_BASE ?= 0x880000000UL
428CFG_NSEC_DDR_1_SIZE  ?= 0x380000000UL
429CFG_CORE_ARM64_PA_BITS ?= 40
430endif
431
432ifneq (,$(filter $(PLATFORM_FLAVOR),mx8dxmek))
433CFG_DDR_SIZE ?= 0x40000000
434CFG_UART_BASE ?= UART0_BASE
435$(call force,CFG_MX8DX,y)
436endif
437
438ifneq (,$(filter $(PLATFORM_FLAVOR),mx8dxlevk))
439CFG_DDR_SIZE ?= 0x40000000
440CFG_UART_BASE ?= UART0_BASE
441CFG_NSEC_DDR_1_BASE ?= 0x800000000UL
442CFG_NSEC_DDR_1_SIZE ?= 0x400000000UL
443CFG_CORE_ARM64_PA_BITS ?= 40
444endif
445
446ifneq (,$(filter $(PLATFORM_FLAVOR),mx8ulpevk))
447CFG_DDR_SIZE ?= 0x80000000
448CFG_UART_BASE ?= UART5_BASE
449endif
450
451ifneq (,$(filter $(PLATFORM_FLAVOR),mx93evk mx91evk))
452CFG_DDR_SIZE ?= 0x80000000
453CFG_UART_BASE ?= UART1_BASE
454endif
455
456ifneq (,$(filter $(PLATFORM_FLAVOR),mx95evk))
457CFG_DDR_SIZE ?= 0x80000000
458CFG_UART_BASE ?= UART1_BASE
459CFG_NSEC_DDR_1_BASE ?= 0x100000000UL
460CFG_NSEC_DDR_1_SIZE ?= 0x380000000UL
461CFG_CORE_ARM64_PA_BITS ?= 40
462endif
463
464# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
465ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
466	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
467include core/arch/arm/cpu/cortex-a9.mk
468
469$(call force,CFG_PL310,y)
470
471CFG_PL310_LOCKED ?= y
472CFG_ENABLE_SCTLR_RR ?= y
473CFG_IMX_SCU ?= y
474endif
475
476ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
477CFG_DRAM_BASE ?= 0x10000000
478endif
479
480ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
481	$(CFG_MX6SX)))
482CFG_DRAM_BASE ?= 0x80000000
483endif
484
485ifeq ($(filter y, $(CFG_MX7)), y)
486CFG_INIT_CNTVOFF ?= y
487CFG_DRAM_BASE ?= 0x80000000
488endif
489
490ifeq ($(filter y, $(CFG_MX7ULP)), y)
491CFG_INIT_CNTVOFF ?= y
492CFG_DRAM_BASE ?= UL(0x60000000)
493$(call force,CFG_IMX_LPUART,y)
494$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
495endif
496
497ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
498$(call force,CFG_GIC,y)
499
500CFG_BOOT_SECONDARY_REQUEST ?= y
501CFG_DT ?= y
502CFG_DTB_MAX_SIZE ?= 0x20000
503CFG_PAGEABLE_ADDR ?= 0
504CFG_PSCI_ARM32 ?= y
505CFG_SECURE_TIME_SOURCE_REE ?= y
506CFG_UART_BASE ?= UART1_BASE
507endif
508
509ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX8M)))
510$(call force,CFG_IMX_UART,y)
511CFG_IMX_SNVS ?= y
512endif
513
514ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
515CFG_IMX_CSU ?= y
516endif
517
518ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
519CFG_HWSUPP_MEM_PERM_WXN = n
520CFG_IMX_WDOG ?= y
521endif
522
523ifeq ($(CFG_ARM64_core),y)
524# arm-v8 platforms
525include core/arch/arm/cpu/cortex-armv8-0.mk
526$(call force,CFG_ARM_GICV3,y)
527$(call force,CFG_GIC,y)
528$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
529$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
530
531CFG_CRYPTO_WITH_CE ?= y
532
533supported-ta-targets = ta_arm64
534endif
535
536CFG_TZDRAM_SIZE ?= 0x01e00000
537CFG_SHMEM_SIZE ?= 0x00200000
538CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - $(CFG_TZDRAM_SIZE) - $(CFG_SHMEM_SIZE) + $(CFG_DDR_SIZE))
539CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
540
541# Enable embedded tests by default
542CFG_ENABLE_EMBEDDED_TESTS ?= y
543
544# Set default heap size for imx platforms to 128k
545CFG_CORE_HEAP_SIZE ?= 131072
546
547CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
548CFG_MMAP_REGIONS ?= 24
549
550# SE05X and OCOTP both implement tee_otp_get_die_id()
551ifeq ($(CFG_NXP_SE05X),y)
552$(call force,CFG_IMX_OCOTP,n)
553endif
554CFG_IMX_OCOTP ?= y
555CFG_IMX_DIGPROG ?= y
556CFG_PKCS11_TA ?= y
557
558# Almost all platforms include CAAM HW Modules, except the
559# ones forced to be disabled
560CFG_NXP_CAAM ?= n
561
562ifeq ($(CFG_NXP_CAAM),y)
563ifeq ($(filter y, $(CFG_MX8QM) $(CFG_MX8QX) $(CFG_MX8DXL)), y)
564CFG_IMX_SC ?= y
565CFG_IMX_MU ?= y
566endif
567
568else
569
570ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
571CFG_IMX_CAAM ?= y
572endif
573
574endif
575