xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision eacabbbceb433cede5676d7b5869f20cfa4b9def) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8	mx6ulccbv2 \
9
10mx6ull-flavorlist = \
11	mx6ullevk \
12	mx6ulzevk \
13
14mx6q-flavorlist = \
15	mx6qsabrelite \
16	mx6qsabreauto \
17	mx6qsabresd \
18	mx6qhmbedge \
19	mx6qapalis \
20
21mx6qp-flavorlist = \
22	mx6qpsabreauto \
23	mx6qpsabresd \
24
25mx6sl-flavorlist = \
26	mx6slevk
27
28mx6sll-flavorlist = \
29	mx6sllevk
30
31mx6sx-flavorlist = \
32	mx6sxsabreauto \
33	mx6sxsabresd \
34	mx6sxudooneofull \
35
36mx6d-flavorlist = \
37	mx6dhmbedge \
38	mx6dapalis \
39
40mx6dl-flavorlist = \
41	mx6dlsabreauto \
42	mx6dlsabresd \
43	mx6dlhmbedge \
44
45mx6s-flavorlist = \
46	mx6shmbedge \
47	mx6solosabresd \
48	mx6solosabreauto \
49
50mx7d-flavorlist = \
51	mx7dsabresd \
52	mx7dpico_mbl \
53	mx7dclsom \
54
55mx7s-flavorlist = \
56	mx7swarp7 \
57	mx7swarp7_mbl \
58
59mx7ulp-flavorlist = \
60	mx7ulpevk
61
62mx8mq-flavorlist = \
63	mx8mqevk
64
65mx8mm-flavorlist = \
66	mx8mmevk \
67	mx8mm_cl_iot_gate
68
69mx8mn-flavorlist = \
70	mx8mnevk
71
72mx8mp-flavorlist = \
73	mx8mpevk
74
75mx8qm-flavorlist = \
76	mx8qmmek \
77
78mx8qx-flavorlist = \
79	mx8qxpmek \
80
81ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
82$(call force,CFG_MX6,y)
83$(call force,CFG_MX6UL,y)
84$(call force,CFG_TEE_CORE_NB_CORE,1)
85$(call force,CFG_TZC380,y)
86include core/arch/arm/cpu/cortex-a7.mk
87else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
88$(call force,CFG_MX6,y)
89$(call force,CFG_MX6ULL,y)
90$(call force,CFG_TEE_CORE_NB_CORE,1)
91$(call force,CFG_IMX_CAAM,n)
92$(call force,CFG_NXP_CAAM,n)
93$(call force,CFG_IMX_DCP,y)
94include core/arch/arm/cpu/cortex-a7.mk
95else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
96$(call force,CFG_MX6,y)
97$(call force,CFG_MX6Q,y)
98$(call force,CFG_TEE_CORE_NB_CORE,4)
99$(call force,CFG_TZC380,y)
100else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
101$(call force,CFG_MX6,y)
102$(call force,CFG_MX6QP,y)
103$(call force,CFG_TEE_CORE_NB_CORE,4)
104else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
105$(call force,CFG_MX6,y)
106$(call force,CFG_MX6D,y)
107$(call force,CFG_TEE_CORE_NB_CORE,2)
108$(call force,CFG_TZC380,y)
109else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
110$(call force,CFG_MX6,y)
111$(call force,CFG_MX6DL,y)
112$(call force,CFG_TEE_CORE_NB_CORE,2)
113$(call force,CFG_TZC380,y)
114else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
115$(call force,CFG_MX6,y)
116$(call force,CFG_MX6S,y)
117$(call force,CFG_TEE_CORE_NB_CORE,1)
118else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
119$(call force,CFG_MX6,y)
120$(call force,CFG_MX6SL,y)
121$(call force,CFG_TEE_CORE_NB_CORE,1)
122$(call force,CFG_IMX_CAAM,n)
123$(call force,CFG_NXP_CAAM,n)
124$(call force,CFG_IMX_DCP,y)
125else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
126$(call force,CFG_MX6,y)
127$(call force,CFG_MX6SLL,y)
128$(call force,CFG_TEE_CORE_NB_CORE,1)
129$(call force,CFG_IMX_CAAM,n)
130$(call force,CFG_NXP_CAAM,n)
131$(call force,CFG_IMX_DCP,y)
132$(call force,CFG_NO_SMP,y)
133else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
134$(call force,CFG_MX6,y)
135$(call force,CFG_MX6SX,y)
136$(call force,CFG_TEE_CORE_NB_CORE,1)
137else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
138$(call force,CFG_MX7,y)
139$(call force,CFG_TEE_CORE_NB_CORE,1)
140include core/arch/arm/cpu/cortex-a7.mk
141else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
142$(call force,CFG_MX7,y)
143$(call force,CFG_TEE_CORE_NB_CORE,2)
144include core/arch/arm/cpu/cortex-a7.mk
145else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
146$(call force,CFG_MX7ULP,y)
147$(call force,CFG_TEE_CORE_NB_CORE,1)
148$(call force,CFG_TZC380,n)
149$(call force,CFG_CSU,n)
150$(call force,CFG_NXP_CAAM,n)
151include core/arch/arm/cpu/cortex-a7.mk
152else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mq-flavorlist)))
153$(call force,CFG_MX8MQ,y)
154$(call force,CFG_MX8M,y)
155$(call force,CFG_ARM64_core,y)
156CFG_IMX_UART ?= y
157CFG_DRAM_BASE ?= 0x40000000
158CFG_TEE_CORE_NB_CORE ?= 4
159else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist)))
160$(call force,CFG_MX8MM,y)
161$(call force,CFG_MX8M,y)
162$(call force,CFG_ARM64_core,y)
163CFG_IMX_UART ?= y
164CFG_DRAM_BASE ?= 0x40000000
165CFG_TEE_CORE_NB_CORE ?= 4
166else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mn-flavorlist)))
167$(call force,CFG_MX8MN,y)
168$(call force,CFG_MX8M,y)
169$(call force,CFG_ARM64_core,y)
170CFG_IMX_UART ?= y
171CFG_DRAM_BASE ?= 0x40000000
172CFG_TEE_CORE_NB_CORE ?= 4
173else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mp-flavorlist)))
174$(call force,CFG_MX8MP,y)
175$(call force,CFG_MX8M,y)
176$(call force,CFG_ARM64_core,y)
177CFG_IMX_UART ?= y
178CFG_DRAM_BASE ?= 0x40000000
179CFG_TEE_CORE_NB_CORE ?= 4
180else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist)))
181$(call force,CFG_MX8QM,y)
182$(call force,CFG_ARM64_core,y)
183$(call force,CFG_IMX_SNVS,n)
184CFG_IMX_LPUART ?= y
185CFG_DRAM_BASE ?= 0x80000000
186CFG_TEE_CORE_NB_CORE ?= 6
187$(call force,CFG_NXP_CAAM,n)
188else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qx-flavorlist)))
189$(call force,CFG_MX8QX,y)
190$(call force,CFG_ARM64_core,y)
191$(call force,CFG_IMX_SNVS,n)
192CFG_IMX_LPUART ?= y
193CFG_DRAM_BASE ?= 0x80000000
194CFG_TEE_CORE_NB_CORE ?= 4
195$(call force,CFG_NXP_CAAM,n)
196else
197$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
198endif
199
200ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
201CFG_DDR_SIZE ?= 0x40000000
202CFG_NS_ENTRY_ADDR ?= 0x80800000
203endif
204
205ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
206CFG_DDR_SIZE ?= 0x40000000
207CFG_UART_BASE ?= UART1_BASE
208endif
209
210ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
211CFG_DDR_SIZE ?= 0x20000000
212CFG_NS_ENTRY_ADDR ?= 0x87800000
213CFG_DT_ADDR ?= 0x83100000
214CFG_UART_BASE ?= UART5_BASE
215CFG_BOOT_SECONDARY_REQUEST ?= n
216CFG_EXTERNAL_DTB_OVERLAY ?= y
217CFG_IMX_WDOG_EXT_RESET ?= y
218endif
219
220ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
221CFG_DDR_SIZE ?= 0x20000000
222CFG_NS_ENTRY_ADDR ?= 0x80800000
223CFG_BOOT_SECONDARY_REQUEST ?= n
224endif
225
226ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
227CFG_DDR_SIZE ?= 0x20000000
228CFG_NS_ENTRY_ADDR ?= 0x87800000
229CFG_DT_ADDR ?= 0x83100000
230CFG_BOOT_SECONDARY_REQUEST ?= n
231CFG_EXTERNAL_DTB_OVERLAY = y
232CFG_IMX_WDOG_EXT_RESET = y
233endif
234
235ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
236CFG_DDR_SIZE ?= 0x40000000
237CFG_NS_ENTRY_ADDR ?= 0x60800000
238CFG_UART_BASE ?= UART4_BASE
239endif
240
241ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
242	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd \
243	mx6dapalis mx6qapalis))
244CFG_DDR_SIZE ?= 0x40000000
245CFG_NS_ENTRY_ADDR ?= 0x12000000
246endif
247
248ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
249	mx6dlsabreauto mx6solosabreauto))
250CFG_DDR_SIZE ?= 0x80000000
251CFG_NS_ENTRY_ADDR ?= 0x12000000
252CFG_UART_BASE ?= UART4_BASE
253endif
254
255ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
256CFG_DDR_SIZE ?= 0x80000000
257CFG_UART_BASE ?= UART1_BASE
258endif
259
260ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
261CFG_DDR_SIZE ?= 0x40000000
262CFG_NS_ENTRY_ADDR ?= 0x12000000
263endif
264
265ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
266CFG_DDR_SIZE ?= 0x40000000
267CFG_NS_ENTRY_ADDR ?= 0x12000000
268CFG_UART_BASE ?= UART2_BASE
269endif
270
271ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
272CFG_NS_ENTRY_ADDR ?= 0x80800000
273CFG_DDR_SIZE ?= 0x40000000
274endif
275
276ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
277CFG_NS_ENTRY_ADDR ?= 0x80800000
278CFG_DDR_SIZE ?= 0x80000000
279endif
280
281ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
282CFG_DDR_SIZE ?= 0x80000000
283CFG_NS_ENTRY_ADDR ?= 0x80800000
284endif
285
286ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
287CFG_DDR_SIZE ?= 0x40000000
288CFG_NS_ENTRY_ADDR ?= 0x80800000
289endif
290
291ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
292CFG_DDR_SIZE ?= 0x40000000
293CFG_UART_BASE ?= UART1_BASE
294endif
295
296ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk mx6ulzevk))
297CFG_DDR_SIZE ?= 0x20000000
298CFG_NS_ENTRY_ADDR ?= 0x80800000
299endif
300
301ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
302CFG_DDR_SIZE ?= 0x10000000
303CFG_NS_ENTRY_ADDR ?= 0x80800000
304CFG_UART_BASE ?= UART5_BASE
305endif
306
307ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
308CFG_DDR_SIZE ?= 0x10000000
309CFG_NS_ENTRY_ADDR ?= 0x80800000
310endif
311
312ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccbv2))
313CFG_DDR_SIZE ?= 0x10000000
314CFG_UART_BASE ?= UART7_BASE
315endif
316
317ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mqevk))
318CFG_DDR_SIZE ?= 0xc0000000
319CFG_UART_BASE ?= UART1_BASE
320endif
321
322ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk))
323CFG_DDR_SIZE ?= 0x80000000
324CFG_UART_BASE ?= UART2_BASE
325endif
326
327ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mm_cl_iot_gate))
328CFG_DDR_SIZE ?= 0x40000000
329CFG_UART_BASE ?= UART3_BASE
330CFG_NSEC_DDR_1_BASE ?= 0x80000000UL
331CFG_NSEC_DDR_1_SIZE ?= 0x40000000UL
332endif
333
334ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk))
335CFG_DDR_SIZE ?= 0x80000000
336CFG_UART_BASE ?= UART2_BASE
337endif
338
339ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mpevk))
340CFG_DDR_SIZE ?= UL(0x180000000)
341CFG_UART_BASE ?= UART2_BASE
342$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
343$(call force,CFG_CORE_ARM64_PA_BITS,36)
344endif
345
346ifneq (,$(filter $(PLATFORM_FLAVOR),mx8qxpmek mx8qmmek))
347CFG_DDR_SIZE ?= 0x80000000
348CFG_UART_BASE ?= UART0_BASE
349CFG_NSEC_DDR_1_BASE ?= 0x880000000UL
350CFG_NSEC_DDR_1_SIZE  ?= 0x380000000UL
351CFG_CORE_ARM64_PA_BITS ?= 40
352endif
353
354# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
355ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
356	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
357include core/arch/arm/cpu/cortex-a9.mk
358
359$(call force,CFG_PL310,y)
360
361CFG_PL310_LOCKED ?= y
362CFG_ENABLE_SCTLR_RR ?= y
363CFG_SCU ?= y
364endif
365
366ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
367CFG_DRAM_BASE ?= 0x10000000
368endif
369
370ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
371	$(CFG_MX6SX)))
372CFG_DRAM_BASE ?= 0x80000000
373endif
374
375ifeq ($(filter y, $(CFG_MX7)), y)
376CFG_INIT_CNTVOFF ?= y
377CFG_DRAM_BASE ?= 0x80000000
378endif
379
380ifeq ($(filter y, $(CFG_MX7ULP)), y)
381CFG_INIT_CNTVOFF ?= y
382CFG_DRAM_BASE ?= UL(0x60000000)
383$(call force,CFG_IMX_LPUART,y)
384$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
385endif
386
387ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
388$(call force,CFG_GIC,y)
389
390CFG_BOOT_SECONDARY_REQUEST ?= y
391CFG_DT ?= y
392CFG_DTB_MAX_SIZE ?= 0x20000
393CFG_PAGEABLE_ADDR ?= 0
394CFG_PSCI_ARM32 ?= y
395CFG_SECURE_TIME_SOURCE_REE ?= y
396CFG_UART_BASE ?= UART1_BASE
397endif
398
399ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX8MM)))
400$(call force,CFG_IMX_UART,y)
401ifeq ($(CFG_RPMB_FS),y)
402CFG_IMX_SNVS ?= y
403endif
404endif
405
406ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
407CFG_CSU ?= y
408endif
409
410ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
411CFG_HWSUPP_MEM_PERM_WXN = n
412CFG_IMX_WDOG ?= y
413endif
414
415ifeq ($(CFG_ARM64_core),y)
416# arm-v8 platforms
417include core/arch/arm/cpu/cortex-armv8-0.mk
418$(call force,CFG_ARM_GICV3,y)
419$(call force,CFG_GIC,y)
420$(call force,CFG_WITH_LPAE,y)
421$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
422$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
423
424CFG_CRYPTO_WITH_CE ?= y
425
426supported-ta-targets = ta_arm64
427endif
428
429CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
430CFG_TZDRAM_SIZE ?= 0x01e00000
431CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
432CFG_SHMEM_SIZE ?= 0x00200000
433
434CFG_NSEC_DDR_0_BASE ?= $(CFG_DRAM_BASE)
435CFG_NSEC_DDR_0_SIZE ?= ($(CFG_DDR_SIZE) - 0x02000000)
436
437CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
438CFG_MMAP_REGIONS ?= 24
439
440# Almost all platforms include CAAM HW Modules, except the
441# ones forced to be disabled
442CFG_NXP_CAAM ?= n
443
444ifeq ($(CFG_NXP_CAAM),y)
445# As NXP CAAM Driver is enabled, disable the small local CAAM driver
446# used just to release Job Rings to Non-Secure world
447$(call force,CFG_IMX_CAAM,n)
448else
449
450ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
451CFG_IMX_CAAM ?= y
452endif
453endif
454
455# Cryptographic configuration
456include core/arch/arm/plat-imx/crypto_conf.mk
457