xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision e8b14bf823a0f99e7564be1c41dd3db21fb77a4a) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8	mx6ulccbv2 \
9
10mx6ull-flavorlist = \
11	mx6ullevk \
12	mx6ulzevk \
13
14mx6q-flavorlist = \
15	mx6qsabrelite \
16	mx6qsabreauto \
17	mx6qsabresd \
18	mx6qhmbedge \
19	mx6qapalis \
20
21mx6qp-flavorlist = \
22	mx6qpsabreauto \
23	mx6qpsabresd \
24
25mx6sl-flavorlist = \
26	mx6slevk
27
28mx6sll-flavorlist = \
29	mx6sllevk
30
31mx6sx-flavorlist = \
32	mx6sxsabreauto \
33	mx6sxsabresd \
34	mx6sxudooneofull \
35
36mx6d-flavorlist = \
37	mx6dhmbedge \
38	mx6dapalis \
39
40mx6dl-flavorlist = \
41	mx6dlsabreauto \
42	mx6dlsabresd \
43	mx6dlhmbedge \
44
45mx6s-flavorlist = \
46	mx6shmbedge \
47	mx6solosabresd \
48	mx6solosabreauto \
49
50mx7d-flavorlist = \
51	mx7dsabresd \
52	mx7dpico_mbl \
53	mx7dclsom \
54
55mx7s-flavorlist = \
56	mx7swarp7 \
57	mx7swarp7_mbl \
58
59mx7ulp-flavorlist = \
60	mx7ulpevk
61
62mx8mq-flavorlist = \
63	mx8mqevk
64
65mx8mm-flavorlist = \
66	mx8mmevk \
67	mx8mm_cl_iot_gate
68
69mx8mn-flavorlist = \
70	mx8mnevk
71
72mx8mp-flavorlist = \
73	mx8mpevk \
74	mx8mp_rsb3720_6g
75
76mx8qm-flavorlist = \
77	mx8qmmek \
78
79mx8qx-flavorlist = \
80	mx8qxpmek \
81	mx8dxmek \
82
83mx8dxl-flavorlist = \
84	mx8dxlevk \
85
86mx8ulp-flavorlist = \
87	mx8ulpevk \
88
89mx93-flavorlist = \
90	mx93evk \
91
92mx95-flavorlist = \
93	mx95evk \
94
95ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
96$(call force,CFG_MX6,y)
97$(call force,CFG_MX6UL,y)
98$(call force,CFG_TEE_CORE_NB_CORE,1)
99$(call force,CFG_TZC380,y)
100include core/arch/arm/cpu/cortex-a7.mk
101else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
102$(call force,CFG_MX6,y)
103$(call force,CFG_MX6ULL,y)
104$(call force,CFG_TEE_CORE_NB_CORE,1)
105$(call force,CFG_TZC380,y)
106$(call force,CFG_IMX_CAAM,n)
107$(call force,CFG_NXP_CAAM,n)
108$(call force,CFG_IMX_DCP,y)
109include core/arch/arm/cpu/cortex-a7.mk
110else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
111$(call force,CFG_MX6,y)
112$(call force,CFG_MX6Q,y)
113$(call force,CFG_TEE_CORE_NB_CORE,4)
114$(call force,CFG_TZC380,y)
115else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
116$(call force,CFG_MX6,y)
117$(call force,CFG_MX6QP,y)
118$(call force,CFG_TEE_CORE_NB_CORE,4)
119else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
120$(call force,CFG_MX6,y)
121$(call force,CFG_MX6D,y)
122$(call force,CFG_TEE_CORE_NB_CORE,2)
123$(call force,CFG_TZC380,y)
124else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
125$(call force,CFG_MX6,y)
126$(call force,CFG_MX6DL,y)
127$(call force,CFG_TEE_CORE_NB_CORE,2)
128$(call force,CFG_TZC380,y)
129else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
130$(call force,CFG_MX6,y)
131$(call force,CFG_MX6S,y)
132$(call force,CFG_TEE_CORE_NB_CORE,1)
133else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
134$(call force,CFG_MX6,y)
135$(call force,CFG_MX6SL,y)
136$(call force,CFG_TEE_CORE_NB_CORE,1)
137$(call force,CFG_IMX_CAAM,n)
138$(call force,CFG_NXP_CAAM,n)
139$(call force,CFG_IMX_DCP,y)
140else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
141$(call force,CFG_MX6,y)
142$(call force,CFG_MX6SLL,y)
143$(call force,CFG_TEE_CORE_NB_CORE,1)
144$(call force,CFG_IMX_CAAM,n)
145$(call force,CFG_NXP_CAAM,n)
146$(call force,CFG_IMX_DCP,y)
147$(call force,CFG_NO_SMP,y)
148else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
149$(call force,CFG_MX6,y)
150$(call force,CFG_MX6SX,y)
151$(call force,CFG_TEE_CORE_NB_CORE,1)
152else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
153$(call force,CFG_MX7,y)
154$(call force,CFG_TEE_CORE_NB_CORE,1)
155include core/arch/arm/cpu/cortex-a7.mk
156else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
157$(call force,CFG_MX7,y)
158$(call force,CFG_TEE_CORE_NB_CORE,2)
159include core/arch/arm/cpu/cortex-a7.mk
160else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
161$(call force,CFG_MX7ULP,y)
162$(call force,CFG_TEE_CORE_NB_CORE,1)
163$(call force,CFG_TZC380,n)
164$(call force,CFG_IMX_CSU,n)
165include core/arch/arm/cpu/cortex-a7.mk
166else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mq-flavorlist)))
167$(call force,CFG_MX8MQ,y)
168$(call force,CFG_MX8M,y)
169$(call force,CFG_ARM64_core,y)
170$(call force,CFG_TZC380,y)
171CFG_DRAM_BASE ?= 0x40000000
172CFG_TEE_CORE_NB_CORE ?= 4
173else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist)))
174$(call force,CFG_MX8MM,y)
175$(call force,CFG_MX8M,y)
176$(call force,CFG_ARM64_core,y)
177$(call force,CFG_TZC380,y)
178CFG_DRAM_BASE ?= 0x40000000
179CFG_TEE_CORE_NB_CORE ?= 4
180else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mn-flavorlist)))
181$(call force,CFG_MX8MN,y)
182$(call force,CFG_MX8M,y)
183$(call force,CFG_ARM64_core,y)
184$(call force,CFG_TZC380,y)
185CFG_DRAM_BASE ?= 0x40000000
186CFG_TEE_CORE_NB_CORE ?= 4
187else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mp-flavorlist)))
188$(call force,CFG_MX8MP,y)
189$(call force,CFG_MX8M,y)
190$(call force,CFG_ARM64_core,y)
191$(call force,CFG_TZC380,y)
192CFG_DRAM_BASE ?= 0x40000000
193CFG_TEE_CORE_NB_CORE ?= 4
194else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist)))
195$(call force,CFG_MX8QM,y)
196$(call force,CFG_ARM64_core,y)
197$(call force,CFG_IMX_SNVS,n)
198CFG_IMX_LPUART ?= y
199CFG_DRAM_BASE ?= 0x80000000
200CFG_TEE_CORE_NB_CORE ?= 6
201$(call force,CFG_IMX_OCOTP,n)
202else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qx-flavorlist)))
203$(call force,CFG_MX8QX,y)
204$(call force,CFG_ARM64_core,y)
205$(call force,CFG_IMX_SNVS,n)
206CFG_IMX_LPUART ?= y
207CFG_DRAM_BASE ?= 0x80000000
208CFG_TEE_CORE_NB_CORE ?= 4
209$(call force,CFG_IMX_OCOTP,n)
210else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8dxl-flavorlist)))
211$(call force,CFG_MX8DXL,y)
212$(call force,CFG_ARM64_core,y)
213$(call force,CFG_IMX_SNVS,n)
214CFG_IMX_LPUART ?= y
215CFG_DRAM_BASE ?= 0x80000000
216$(call force,CFG_TEE_CORE_NB_CORE,2)
217$(call force,CFG_IMX_OCOTP,n)
218else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8ulp-flavorlist)))
219$(call force,CFG_MX8ULP,y)
220$(call force,CFG_ARM64_core,y)
221CFG_IMX_LPUART ?= y
222CFG_DRAM_BASE ?= 0x80000000
223CFG_TEE_CORE_NB_CORE ?= 2
224$(call force,CFG_NXP_SNVS,n)
225$(call force,CFG_IMX_OCOTP,n)
226CFG_IMX_MU ?= y
227CFG_IMX_ELE ?= n
228else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx93-flavorlist)))
229$(call force,CFG_MX93,y)
230$(call force,CFG_ARM64_core,y)
231CFG_IMX_LPUART ?= y
232CFG_DRAM_BASE ?= 0x80000000
233CFG_TEE_CORE_NB_CORE ?= 2
234$(call force,CFG_NXP_SNVS,n)
235$(call force,CFG_IMX_OCOTP,n)
236$(call force,CFG_TZC380,n)
237$(call force,CFG_CRYPTO_DRIVER,n)
238$(call force,CFG_NXP_CAAM,n)
239CFG_IMX_MU ?= y
240CFG_IMX_ELE ?= n
241else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx95-flavorlist)))
242$(call force,CFG_MX95,y)
243$(call force,CFG_ARM64_core,y)
244CFG_IMX_LPUART ?= y
245CFG_DRAM_BASE ?= 0x80000000
246CFG_TEE_CORE_NB_CORE ?= 6
247$(call force,CFG_NXP_SNVS,n)
248$(call force,CFG_IMX_OCOTP,n)
249$(call force,CFG_TZC380,n)
250$(call force,CFG_NXP_CAAM,n)
251else
252$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
253endif
254
255ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
256CFG_DDR_SIZE ?= 0x40000000
257CFG_NS_ENTRY_ADDR ?= 0x80800000
258CFG_IMX_WDOG_EXT_RESET ?= y
259endif
260
261ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
262CFG_DDR_SIZE ?= 0x40000000
263CFG_UART_BASE ?= UART1_BASE
264CFG_IMX_WDOG_EXT_RESET ?= y
265endif
266
267ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
268CFG_DDR_SIZE ?= 0x20000000
269CFG_NS_ENTRY_ADDR ?= 0x87800000
270CFG_DT_ADDR ?= 0x83100000
271CFG_UART_BASE ?= UART5_BASE
272CFG_BOOT_SECONDARY_REQUEST ?= n
273CFG_EXTERNAL_DTB_OVERLAY ?= y
274CFG_IMX_WDOG_EXT_RESET ?= y
275endif
276
277ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
278CFG_DDR_SIZE ?= 0x20000000
279CFG_NS_ENTRY_ADDR ?= 0x80800000
280CFG_BOOT_SECONDARY_REQUEST ?= n
281endif
282
283ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
284CFG_DDR_SIZE ?= 0x20000000
285CFG_NS_ENTRY_ADDR ?= 0x87800000
286CFG_DT_ADDR ?= 0x83100000
287CFG_BOOT_SECONDARY_REQUEST ?= n
288CFG_EXTERNAL_DTB_OVERLAY = y
289CFG_IMX_WDOG_EXT_RESET = y
290endif
291
292ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
293CFG_DDR_SIZE ?= 0x40000000
294CFG_NS_ENTRY_ADDR ?= 0x60800000
295CFG_UART_BASE ?= UART4_BASE
296endif
297
298ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
299	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd \
300	mx6dapalis mx6qapalis))
301CFG_DDR_SIZE ?= 0x40000000
302CFG_NS_ENTRY_ADDR ?= 0x12000000
303endif
304
305ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
306	mx6dlsabreauto mx6solosabreauto))
307CFG_DDR_SIZE ?= 0x80000000
308CFG_NS_ENTRY_ADDR ?= 0x12000000
309CFG_UART_BASE ?= UART4_BASE
310endif
311
312ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
313CFG_DDR_SIZE ?= 0x80000000
314CFG_UART_BASE ?= UART1_BASE
315endif
316
317ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
318CFG_DDR_SIZE ?= 0x40000000
319CFG_NS_ENTRY_ADDR ?= 0x12000000
320endif
321
322ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
323CFG_DDR_SIZE ?= 0x40000000
324CFG_NS_ENTRY_ADDR ?= 0x12000000
325CFG_UART_BASE ?= UART2_BASE
326endif
327
328ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
329CFG_NS_ENTRY_ADDR ?= 0x80800000
330CFG_DDR_SIZE ?= 0x40000000
331endif
332
333ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
334CFG_NS_ENTRY_ADDR ?= 0x80800000
335CFG_DDR_SIZE ?= 0x80000000
336endif
337
338ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
339CFG_DDR_SIZE ?= 0x80000000
340CFG_NS_ENTRY_ADDR ?= 0x80800000
341endif
342
343ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
344CFG_DDR_SIZE ?= 0x40000000
345CFG_NS_ENTRY_ADDR ?= 0x80800000
346endif
347
348ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
349CFG_DDR_SIZE ?= 0x40000000
350CFG_UART_BASE ?= UART1_BASE
351endif
352
353ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk mx6ulzevk))
354CFG_DDR_SIZE ?= 0x20000000
355CFG_NS_ENTRY_ADDR ?= 0x80800000
356endif
357
358ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
359CFG_DDR_SIZE ?= 0x10000000
360CFG_NS_ENTRY_ADDR ?= 0x80800000
361CFG_UART_BASE ?= UART5_BASE
362endif
363
364ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
365CFG_DDR_SIZE ?= 0x10000000
366CFG_NS_ENTRY_ADDR ?= 0x80800000
367endif
368
369ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccbv2))
370CFG_DDR_SIZE ?= 0x10000000
371CFG_UART_BASE ?= UART7_BASE
372endif
373
374ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mqevk))
375CFG_DDR_SIZE ?= 0xc0000000
376CFG_UART_BASE ?= UART1_BASE
377endif
378
379ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk))
380CFG_DDR_SIZE ?= 0x80000000
381CFG_UART_BASE ?= UART2_BASE
382endif
383
384ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mm_cl_iot_gate))
385CFG_DDR_SIZE ?= 0x40000000
386CFG_UART_BASE ?= UART3_BASE
387CFG_NSEC_DDR_1_BASE ?= 0x80000000UL
388CFG_NSEC_DDR_1_SIZE ?= 0x40000000UL
389endif
390
391ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk))
392CFG_DDR_SIZE ?= 0x80000000
393CFG_UART_BASE ?= UART2_BASE
394endif
395
396ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mpevk))
397CFG_DDR_SIZE ?= UL(0x180000000)
398CFG_UART_BASE ?= UART2_BASE
399$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
400$(call force,CFG_CORE_ARM64_PA_BITS,36)
401endif
402
403ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mp_rsb3720_6g))
404CFG_DDR_SIZE ?= UL(0x180000000)
405CFG_UART_BASE ?= UART3_BASE
406CFG_TZDRAM_START ?= 0x56000000
407$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
408$(call force,CFG_CORE_ARM64_PA_BITS,36)
409endif
410
411ifneq (,$(filter $(PLATFORM_FLAVOR),mx8qxpmek mx8qmmek))
412CFG_DDR_SIZE ?= 0x80000000
413CFG_UART_BASE ?= UART0_BASE
414CFG_NSEC_DDR_1_BASE ?= 0x880000000UL
415CFG_NSEC_DDR_1_SIZE  ?= 0x380000000UL
416CFG_CORE_ARM64_PA_BITS ?= 40
417endif
418
419ifneq (,$(filter $(PLATFORM_FLAVOR),mx8dxmek))
420CFG_DDR_SIZE ?= 0x40000000
421CFG_UART_BASE ?= UART0_BASE
422$(call force,CFG_MX8DX,y)
423endif
424
425ifneq (,$(filter $(PLATFORM_FLAVOR),mx8dxlevk))
426CFG_DDR_SIZE ?= 0x40000000
427CFG_UART_BASE ?= UART0_BASE
428CFG_NSEC_DDR_1_BASE ?= 0x800000000UL
429CFG_NSEC_DDR_1_SIZE ?= 0x400000000UL
430CFG_CORE_ARM64_PA_BITS ?= 40
431endif
432
433ifneq (,$(filter $(PLATFORM_FLAVOR),mx8ulpevk))
434CFG_DDR_SIZE ?= 0x80000000
435CFG_UART_BASE ?= UART5_BASE
436endif
437
438ifneq (,$(filter $(PLATFORM_FLAVOR),mx93evk))
439CFG_DDR_SIZE ?= 0x80000000
440CFG_UART_BASE ?= UART1_BASE
441endif
442
443ifneq (,$(filter $(PLATFORM_FLAVOR),mx95evk))
444CFG_DDR_SIZE ?= 0x80000000
445CFG_UART_BASE ?= UART1_BASE
446CFG_NSEC_DDR_1_BASE ?= 0x100000000UL
447CFG_NSEC_DDR_1_SIZE ?= 0x380000000UL
448CFG_CORE_ARM64_PA_BITS ?= 40
449endif
450
451# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
452ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
453	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
454include core/arch/arm/cpu/cortex-a9.mk
455
456$(call force,CFG_PL310,y)
457
458CFG_PL310_LOCKED ?= y
459CFG_ENABLE_SCTLR_RR ?= y
460CFG_IMX_SCU ?= y
461endif
462
463ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
464CFG_DRAM_BASE ?= 0x10000000
465endif
466
467ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
468	$(CFG_MX6SX)))
469CFG_DRAM_BASE ?= 0x80000000
470endif
471
472ifeq ($(filter y, $(CFG_MX7)), y)
473CFG_INIT_CNTVOFF ?= y
474CFG_DRAM_BASE ?= 0x80000000
475endif
476
477ifeq ($(filter y, $(CFG_MX7ULP)), y)
478CFG_INIT_CNTVOFF ?= y
479CFG_DRAM_BASE ?= UL(0x60000000)
480$(call force,CFG_IMX_LPUART,y)
481$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
482endif
483
484ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
485$(call force,CFG_GIC,y)
486
487CFG_BOOT_SECONDARY_REQUEST ?= y
488CFG_DT ?= y
489CFG_DTB_MAX_SIZE ?= 0x20000
490CFG_PAGEABLE_ADDR ?= 0
491CFG_PSCI_ARM32 ?= y
492CFG_SECURE_TIME_SOURCE_REE ?= y
493CFG_UART_BASE ?= UART1_BASE
494endif
495
496ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX8M)))
497$(call force,CFG_IMX_UART,y)
498CFG_IMX_SNVS ?= y
499endif
500
501ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
502CFG_IMX_CSU ?= y
503endif
504
505ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
506CFG_HWSUPP_MEM_PERM_WXN = n
507CFG_IMX_WDOG ?= y
508endif
509
510ifeq ($(CFG_ARM64_core),y)
511# arm-v8 platforms
512include core/arch/arm/cpu/cortex-armv8-0.mk
513$(call force,CFG_ARM_GICV3,y)
514$(call force,CFG_GIC,y)
515$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
516$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
517
518CFG_CRYPTO_WITH_CE ?= y
519
520supported-ta-targets = ta_arm64
521endif
522
523CFG_TZDRAM_SIZE ?= 0x01e00000
524CFG_SHMEM_SIZE ?= 0x00200000
525CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - $(CFG_TZDRAM_SIZE) - $(CFG_SHMEM_SIZE) + $(CFG_DDR_SIZE))
526CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
527
528# Enable embedded tests by default
529CFG_ENABLE_EMBEDDED_TESTS ?= y
530
531# Set default heap size for imx platforms to 128k
532CFG_CORE_HEAP_SIZE ?= 131072
533
534CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
535CFG_MMAP_REGIONS ?= 24
536
537# SE05X and OCOTP both implement tee_otp_get_die_id()
538ifeq ($(CFG_NXP_SE05X),y)
539$(call force,CFG_IMX_OCOTP,n)
540endif
541CFG_IMX_OCOTP ?= y
542CFG_IMX_DIGPROG ?= y
543CFG_PKCS11_TA ?= y
544
545# Almost all platforms include CAAM HW Modules, except the
546# ones forced to be disabled
547CFG_NXP_CAAM ?= n
548
549ifeq ($(CFG_NXP_CAAM),y)
550ifeq ($(filter y, $(CFG_MX8QM) $(CFG_MX8QX) $(CFG_MX8DXL)), y)
551CFG_IMX_SC ?= y
552CFG_IMX_MU ?= y
553endif
554
555else
556
557ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
558CFG_IMX_CAAM ?= y
559endif
560
561endif
562