1PLATFORM_FLAVOR ?= mx6ulevk 2 3# Get SoC associated with the PLATFORM_FLAVOR 4mx6ul-flavorlist = \ 5 mx6ulevk \ 6 mx6ul9x9evk \ 7 mx6ulccimx6ulsbcpro \ 8 9mx6ull-flavorlist = \ 10 mx6ullevk \ 11 12mx6q-flavorlist = \ 13 mx6qsabrelite \ 14 mx6qsabresd \ 15 mx6qhmbedge \ 16 17mx6qp-flavorlist = \ 18 mx6qpsabreauto \ 19 mx6qpsabresd \ 20 21mx6sx-flavorlist = \ 22 mx6sxsabreauto \ 23 mx6sxudooneofull \ 24 25mx6d-flavorlist = \ 26 mx6dhmbedge \ 27 28mx6dl-flavorlist = \ 29 mx6dlsabreauto \ 30 mx6dlsabresd \ 31 mx6dlhmbedge \ 32 33mx6s-flavorlist = \ 34 mx6shmbedge \ 35 36mx7-flavorlist = \ 37 mx7dsabresd \ 38 mx7dpico_mbl \ 39 mx7swarp7 \ 40 mx7swarp7_mbl \ 41 mx7dclsom \ 42 43imx8mq-flavorlist = \ 44 imx8mqevk 45 46imx8mm-flavorlist = \ 47 imx8mmevk 48 49ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist))) 50$(call force,CFG_MX6,y) 51$(call force,CFG_MX6UL,y) 52$(call force,CFG_TEE_CORE_NB_CORE,1) 53include core/arch/arm/cpu/cortex-a7.mk 54else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist))) 55$(call force,CFG_MX6,y) 56$(call force,CFG_MX6ULL,y) 57$(call force,CFG_TEE_CORE_NB_CORE,1) 58$(call force,CFG_IMX_CAAM,n) 59include core/arch/arm/cpu/cortex-a7.mk 60else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist))) 61$(call force,CFG_MX6,y) 62$(call force,CFG_MX6Q,y) 63$(call force,CFG_TEE_CORE_NB_CORE,4) 64else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist))) 65$(call force,CFG_MX6,y) 66$(call force,CFG_MX6QP,y) 67$(call force,CFG_TEE_CORE_NB_CORE,4) 68else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist))) 69$(call force,CFG_MX6,y) 70$(call force,CFG_MX6D,y) 71$(call force,CFG_TEE_CORE_NB_CORE,2) 72else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist))) 73$(call force,CFG_MX6,y) 74$(call force,CFG_MX6DL,y) 75$(call force,CFG_TEE_CORE_NB_CORE,2) 76else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist))) 77$(call force,CFG_MX6,y) 78$(call force,CFG_MX6S,y) 79$(call force,CFG_TEE_CORE_NB_CORE,1) 80else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist))) 81$(call force,CFG_MX6,y) 82$(call force,CFG_MX6SX,y) 83$(call force,CFG_TEE_CORE_NB_CORE,1) 84else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7-flavorlist))) 85$(call force,CFG_MX7,y) 86CFG_TEE_CORE_NB_CORE ?= 2 87include core/arch/arm/cpu/cortex-a7.mk 88else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mq-flavorlist))) 89$(call force,CFG_IMX8MQ,y) 90$(call force,CFG_ARM64_core,y) 91CFG_IMX_UART ?= y 92CFG_DRAM_BASE ?= 0x40000000 93CFG_TEE_CORE_NB_CORE ?= 4 94else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mm-flavorlist))) 95$(call force,CFG_IMX8MM,y) 96$(call force,CFG_ARM64_core,y) 97CFG_IMX_UART ?= y 98CFG_DRAM_BASE ?= 0x40000000 99CFG_TEE_CORE_NB_CORE ?= 4 100else 101$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)") 102endif 103 104ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd)) 105CFG_DDR_SIZE ?= 0x40000000 106CFG_NS_ENTRY_ADDR ?= 0x80800000 107$(call force,CFG_TEE_CORE_NB_CORE,2) 108endif 109 110ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom)) 111CFG_DDR_SIZE ?= 0x40000000 112CFG_UART_BASE ?= UART1_BASE 113endif 114 115ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl)) 116CFG_DDR_SIZE ?= 0x20000000 117CFG_NS_ENTRY_ADDR ?= 0x87800000 118CFG_DT_ADDR ?= 0x83100000 119CFG_UART_BASE ?= UART5_BASE 120CFG_BOOT_SECONDARY_REQUEST ?= n 121CFG_EXTERNAL_DTB_OVERLAY ?= y 122CFG_IMX_WDOG_EXT_RESET ?= y 123$(call force,CFG_TEE_CORE_NB_CORE,2) 124endif 125 126ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7)) 127CFG_DDR_SIZE ?= 0x20000000 128CFG_NS_ENTRY_ADDR ?= 0x80800000 129CFG_BOOT_SECONDARY_REQUEST ?= n 130$(call force,CFG_TEE_CORE_NB_CORE,1) 131endif 132 133ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl)) 134CFG_DDR_SIZE ?= 0x20000000 135CFG_NS_ENTRY_ADDR ?= 0x87800000 136CFG_DT_ADDR ?= 0x83100000 137CFG_BOOT_SECONDARY_REQUEST ?= n 138CFG_EXTERNAL_DTB_OVERLAY = y 139CFG_IMX_WDOG_EXT_RESET = y 140$(call force,CFG_TEE_CORE_NB_CORE,1) 141endif 142 143ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \ 144 mx6dlsabrelite mx6dhmbedge mx6dlhmbedge)) 145CFG_DDR_SIZE ?= 0x40000000 146CFG_NS_ENTRY_ADDR ?= 0x12000000 147endif 148 149ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6dlsabreauto)) 150CFG_DDR_SIZE ?= 0x80000000 151CFG_NS_ENTRY_ADDR ?= 0x12000000 152endif 153 154ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge)) 155CFG_DDR_SIZE ?= 0x80000000 156CFG_UART_BASE ?= UART1_BASE 157endif 158 159ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge)) 160CFG_DDR_SIZE ?= 0x40000000 161CFG_NS_ENTRY_ADDR ?= 0x12000000 162endif 163 164ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite)) 165CFG_DDR_SIZE ?= 0x40000000 166CFG_NS_ENTRY_ADDR ?= 0x12000000 167CFG_UART_BASE ?= UART2_BASE 168endif 169 170ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto)) 171CFG_DDR_SIZE ?= 0x80000000 172CFG_NS_ENTRY_ADDR ?= 0x80800000 173endif 174 175ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull) 176CFG_DDR_SIZE ?= 0x40000000 177CFG_UART_BASE ?= UART1_BASE 178endif 179 180ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk)) 181CFG_DDR_SIZE ?= 0x20000000 182CFG_NS_ENTRY_ADDR ?= 0x80800000 183endif 184 185ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro)) 186CFG_DDR_SIZE ?= 0x10000000 187CFG_NS_ENTRY_ADDR ?= 0x80800000 188CFG_UART_BASE ?= UART5_BASE 189endif 190 191ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk)) 192CFG_DDR_SIZE ?= 0x10000000 193CFG_NS_ENTRY_ADDR ?= 0x80800000 194endif 195 196ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mqevk)) 197CFG_DDR_SIZE ?= 0xc0000000 198CFG_UART_BASE ?= UART1_BASE 199endif 200 201ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mmevk)) 202CFG_DDR_SIZE ?= 0x80000000 203CFG_UART_BASE ?= UART2_BASE 204endif 205 206# i.MX6 Solo/SoloX/DualLite/Dual/Quad specific config 207ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \ 208 $(CFG_MX6SX)), y) 209include core/arch/arm/cpu/cortex-a9.mk 210 211$(call force,CFG_PL310,y) 212 213CFG_PL310_LOCKED ?= y 214CFG_ENABLE_SCTLR_RR ?= y 215CFG_SCU ?= y 216endif 217 218ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y) 219CFG_DRAM_BASE ?= 0x10000000 220endif 221 222ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SX))) 223CFG_DRAM_BASE ?= 0x80000000 224endif 225 226ifeq ($(filter y, $(CFG_MX7)), y) 227CFG_INIT_CNTVOFF ?= y 228CFG_DRAM_BASE ?= 0x80000000 229endif 230 231ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7))) 232$(call force,CFG_GENERIC_BOOT,y) 233$(call force,CFG_GIC,y) 234$(call force,CFG_IMX_UART,y) 235$(call force,CFG_PM_STUBS,y) 236$(call force,CFG_WITH_SOFTWARE_PRNG,y) 237 238CFG_BOOT_SYNC_CPU ?= n 239CFG_BOOT_SECONDARY_REQUEST ?= y 240CFG_DT ?= y 241CFG_PAGEABLE_ADDR ?= 0 242CFG_PSCI_ARM32 ?= y 243CFG_SECURE_TIME_SOURCE_REE ?= y 244CFG_CSU ?= y 245CFG_UART_BASE ?= UART1_BASE 246CFG_IMX_CAAM ?= y 247endif 248 249ifeq ($(filter y, $(CFG_PSCI_ARM32)), y) 250CFG_HWSUPP_MEM_PERM_WXN = n 251CFG_IMX_WDOG ?= y 252endif 253 254ifeq ($(CFG_ARM64_core),y) 255# arm-v8 platforms 256include core/arch/arm/cpu/cortex-armv8-0.mk 257$(call force,CFG_ARM_GICV3,y) 258$(call force,CFG_GENERIC_BOOT,y) 259$(call force,CFG_GIC,y) 260$(call force,CFG_WITH_LPAE,y) 261$(call force,CFG_WITH_ARM_TRUSTED_FW,y) 262$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 263 264CFG_CRYPTO_WITH_CE ?= y 265CFG_PM_STUBS ?= y 266 267supported-ta-targets = ta_arm64 268endif 269 270CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE)) 271CFG_TZDRAM_SIZE ?= 0x01e00000 272CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE)) 273CFG_SHMEM_SIZE ?= 0x00200000 274 275CFG_CRYPTO_SIZE_OPTIMIZATION ?= n 276CFG_WITH_STACK_CANARIES ?= y 277CFG_MMAP_REGIONS ?= 24 278