xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision dc57b1101a33ec9bf18ee3d2b88a0d8ff12d2ede) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8
9mx6ull-flavorlist = \
10	mx6ullevk \
11
12mx6q-flavorlist = \
13	mx6qsabrelite \
14	mx6qsabreauto \
15	mx6qsabresd \
16	mx6qhmbedge \
17
18mx6qp-flavorlist = \
19	mx6qpsabreauto \
20	mx6qpsabresd \
21
22mx6sl-flavorlist = \
23	mx6slevk
24
25mx6sll-flavorlist = \
26	mx6sllevk
27
28mx6sx-flavorlist = \
29	mx6sxsabreauto \
30	mx6sxsabresd \
31	mx6sxudooneofull \
32
33mx6d-flavorlist = \
34	mx6dhmbedge \
35
36mx6dl-flavorlist = \
37	mx6dlsabreauto \
38	mx6dlsabresd \
39	mx6dlhmbedge \
40
41mx6s-flavorlist = \
42	mx6shmbedge \
43	mx6solosabresd \
44	mx6solosabreauto \
45
46mx7d-flavorlist = \
47	mx7dsabresd \
48	mx7dpico_mbl \
49	mx7dclsom \
50
51mx7s-flavorlist = \
52	mx7swarp7 \
53	mx7swarp7_mbl \
54
55mx7ulp-flavorlist = \
56	mx7ulpevk
57
58imx8mq-flavorlist = \
59	imx8mqevk
60
61imx8mm-flavorlist = \
62	imx8mmevk
63
64ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
65$(call force,CFG_MX6,y)
66$(call force,CFG_MX6UL,y)
67$(call force,CFG_TEE_CORE_NB_CORE,1)
68include core/arch/arm/cpu/cortex-a7.mk
69else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
70$(call force,CFG_MX6,y)
71$(call force,CFG_MX6ULL,y)
72$(call force,CFG_TEE_CORE_NB_CORE,1)
73$(call force,CFG_IMX_CAAM,n)
74include core/arch/arm/cpu/cortex-a7.mk
75else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
76$(call force,CFG_MX6,y)
77$(call force,CFG_MX6Q,y)
78$(call force,CFG_TEE_CORE_NB_CORE,4)
79else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
80$(call force,CFG_MX6,y)
81$(call force,CFG_MX6QP,y)
82$(call force,CFG_TEE_CORE_NB_CORE,4)
83else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
84$(call force,CFG_MX6,y)
85$(call force,CFG_MX6D,y)
86$(call force,CFG_TEE_CORE_NB_CORE,2)
87else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
88$(call force,CFG_MX6,y)
89$(call force,CFG_MX6DL,y)
90$(call force,CFG_TEE_CORE_NB_CORE,2)
91else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
92$(call force,CFG_MX6,y)
93$(call force,CFG_MX6S,y)
94$(call force,CFG_TEE_CORE_NB_CORE,1)
95else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
96$(call force,CFG_MX6,y)
97$(call force,CFG_MX6SL,y)
98$(call force,CFG_TEE_CORE_NB_CORE,1)
99$(call force,CFG_IMX_CAAM,n)
100else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
101$(call force,CFG_MX6,y)
102$(call force,CFG_MX6SLL,y)
103$(call force,CFG_TEE_CORE_NB_CORE,1)
104$(call force,CFG_IMX_CAAM,n)
105else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
106$(call force,CFG_MX6,y)
107$(call force,CFG_MX6SX,y)
108$(call force,CFG_TEE_CORE_NB_CORE,1)
109else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
110$(call force,CFG_MX7,y)
111$(call force,CFG_TEE_CORE_NB_CORE,1)
112include core/arch/arm/cpu/cortex-a7.mk
113else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
114$(call force,CFG_MX7,y)
115$(call force,CFG_TEE_CORE_NB_CORE,2)
116include core/arch/arm/cpu/cortex-a7.mk
117else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
118$(call force,CFG_MX7ULP,y)
119$(call force,CFG_TEE_CORE_NB_CORE,1)
120$(call force,CFG_TZC380,n)
121$(call force,CFG_CSU,n)
122include core/arch/arm/cpu/cortex-a7.mk
123else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mq-flavorlist)))
124$(call force,CFG_IMX8MQ,y)
125$(call force,CFG_ARM64_core,y)
126CFG_IMX_UART ?= y
127CFG_DRAM_BASE ?= 0x40000000
128CFG_TEE_CORE_NB_CORE ?= 4
129else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mm-flavorlist)))
130$(call force,CFG_IMX8MM,y)
131$(call force,CFG_ARM64_core,y)
132CFG_IMX_UART ?= y
133CFG_DRAM_BASE ?= 0x40000000
134CFG_TEE_CORE_NB_CORE ?= 4
135else
136$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
137endif
138
139ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
140CFG_DDR_SIZE ?= 0x40000000
141CFG_NS_ENTRY_ADDR ?= 0x80800000
142endif
143
144ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
145CFG_DDR_SIZE ?= 0x40000000
146CFG_UART_BASE ?= UART1_BASE
147endif
148
149ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
150CFG_DDR_SIZE ?= 0x20000000
151CFG_NS_ENTRY_ADDR ?= 0x87800000
152CFG_DT_ADDR ?= 0x83100000
153CFG_UART_BASE ?= UART5_BASE
154CFG_BOOT_SECONDARY_REQUEST ?= n
155CFG_EXTERNAL_DTB_OVERLAY ?= y
156CFG_IMX_WDOG_EXT_RESET ?= y
157endif
158
159ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
160CFG_DDR_SIZE ?= 0x20000000
161CFG_NS_ENTRY_ADDR ?= 0x80800000
162CFG_BOOT_SECONDARY_REQUEST ?= n
163endif
164
165ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
166CFG_DDR_SIZE ?= 0x20000000
167CFG_NS_ENTRY_ADDR ?= 0x87800000
168CFG_DT_ADDR ?= 0x83100000
169CFG_BOOT_SECONDARY_REQUEST ?= n
170CFG_EXTERNAL_DTB_OVERLAY = y
171CFG_IMX_WDOG_EXT_RESET = y
172endif
173
174ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
175CFG_DDR_SIZE ?= 0x40000000
176CFG_NS_ENTRY_ADDR ?= 0x60800000
177CFG_UART_BASE ?= UART4_BASE
178endif
179
180ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
181	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd))
182CFG_DDR_SIZE ?= 0x40000000
183CFG_NS_ENTRY_ADDR ?= 0x12000000
184endif
185
186ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
187	mx6dlsabreauto mx6solosabreauto))
188CFG_DDR_SIZE ?= 0x80000000
189CFG_NS_ENTRY_ADDR ?= 0x12000000
190endif
191
192ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
193CFG_DDR_SIZE ?= 0x80000000
194CFG_UART_BASE ?= UART1_BASE
195endif
196
197ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
198CFG_DDR_SIZE ?= 0x40000000
199CFG_NS_ENTRY_ADDR ?= 0x12000000
200endif
201
202ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
203CFG_DDR_SIZE ?= 0x40000000
204CFG_NS_ENTRY_ADDR ?= 0x12000000
205CFG_UART_BASE ?= UART2_BASE
206endif
207
208ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
209CFG_NS_ENTRY_ADDR ?= 0x80800000
210CFG_DDR_SIZE ?= 0x40000000
211endif
212
213ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
214CFG_NS_ENTRY_ADDR ?= 0x80800000
215CFG_DDR_SIZE ?= 0x80000000
216endif
217
218ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
219CFG_DDR_SIZE ?= 0x80000000
220CFG_NS_ENTRY_ADDR ?= 0x80800000
221endif
222
223ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
224CFG_DDR_SIZE ?= 0x40000000
225CFG_NS_ENTRY_ADDR ?= 0x80800000
226endif
227
228ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
229CFG_DDR_SIZE ?= 0x40000000
230CFG_UART_BASE ?= UART1_BASE
231endif
232
233ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk))
234CFG_DDR_SIZE ?= 0x20000000
235CFG_NS_ENTRY_ADDR ?= 0x80800000
236endif
237
238ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
239CFG_DDR_SIZE ?= 0x10000000
240CFG_NS_ENTRY_ADDR ?= 0x80800000
241CFG_UART_BASE ?= UART5_BASE
242endif
243
244ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
245CFG_DDR_SIZE ?= 0x10000000
246CFG_NS_ENTRY_ADDR ?= 0x80800000
247endif
248
249ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mqevk))
250CFG_DDR_SIZE ?= 0xc0000000
251CFG_UART_BASE ?= UART1_BASE
252endif
253
254ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mmevk))
255CFG_DDR_SIZE ?= 0x80000000
256CFG_UART_BASE ?= UART2_BASE
257endif
258
259# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
260ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
261	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
262include core/arch/arm/cpu/cortex-a9.mk
263
264$(call force,CFG_PL310,y)
265
266CFG_PL310_LOCKED ?= y
267CFG_ENABLE_SCTLR_RR ?= y
268CFG_SCU ?= y
269endif
270
271ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
272CFG_DRAM_BASE ?= 0x10000000
273endif
274
275ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
276	$(CFG_MX6SX)))
277CFG_DRAM_BASE ?= 0x80000000
278endif
279
280ifeq ($(filter y, $(CFG_MX7)), y)
281CFG_INIT_CNTVOFF ?= y
282CFG_DRAM_BASE ?= 0x80000000
283endif
284
285ifeq ($(filter y, $(CFG_MX7ULP)), y)
286CFG_INIT_CNTVOFF ?= y
287CFG_DRAM_BASE ?= 0x80000000
288$(call force,CFG_IMX_LPUART,y)
289$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
290endif
291
292ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
293$(call force,CFG_GENERIC_BOOT,y)
294$(call force,CFG_GIC,y)
295$(call force,CFG_PM_STUBS,y)
296$(call force,CFG_WITH_SOFTWARE_PRNG,y)
297
298CFG_BOOT_SYNC_CPU ?= n
299CFG_BOOT_SECONDARY_REQUEST ?= y
300CFG_DT ?= y
301CFG_PAGEABLE_ADDR ?= 0
302CFG_PSCI_ARM32 ?= y
303CFG_SECURE_TIME_SOURCE_REE ?= y
304CFG_UART_BASE ?= UART1_BASE
305CFG_IMX_CAAM ?= y
306endif
307
308ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
309$(call force,CFG_IMX_UART,y)
310CFG_CSU ?= y
311endif
312
313ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
314CFG_HWSUPP_MEM_PERM_WXN = n
315CFG_IMX_WDOG ?= y
316endif
317
318ifeq ($(CFG_ARM64_core),y)
319# arm-v8 platforms
320include core/arch/arm/cpu/cortex-armv8-0.mk
321$(call force,CFG_ARM_GICV3,y)
322$(call force,CFG_GENERIC_BOOT,y)
323$(call force,CFG_GIC,y)
324$(call force,CFG_WITH_LPAE,y)
325$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
326$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
327
328CFG_CRYPTO_WITH_CE ?= y
329CFG_PM_STUBS ?= y
330
331supported-ta-targets = ta_arm64
332endif
333
334CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
335CFG_TZDRAM_SIZE ?= 0x01e00000
336CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
337CFG_SHMEM_SIZE ?= 0x00200000
338
339CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
340CFG_WITH_STACK_CANARIES ?= y
341CFG_MMAP_REGIONS ?= 24
342