1PLATFORM_FLAVOR ?= mx6ulevk 2 3# Get SoC associated with the PLATFORM_FLAVOR 4mx6ul-flavorlist = \ 5 mx6ulevk \ 6 mx6ul9x9evk \ 7 mx6ulccimx6ulsbcpro \ 8 9mx6ull-flavorlist = \ 10 mx6ullevk \ 11 12mx6q-flavorlist = \ 13 mx6qsabrelite \ 14 mx6qsabreauto \ 15 mx6qsabresd \ 16 mx6qhmbedge \ 17 18mx6qp-flavorlist = \ 19 mx6qpsabreauto \ 20 mx6qpsabresd \ 21 22mx6sl-flavorlist = \ 23 mx6slevk 24 25mx6sll-flavorlist = \ 26 mx6sllevk 27 28mx6sx-flavorlist = \ 29 mx6sxsabreauto \ 30 mx6sxsabresd \ 31 mx6sxudooneofull \ 32 33mx6d-flavorlist = \ 34 mx6dhmbedge \ 35 36mx6dl-flavorlist = \ 37 mx6dlsabreauto \ 38 mx6dlsabresd \ 39 mx6dlhmbedge \ 40 41mx6s-flavorlist = \ 42 mx6shmbedge \ 43 mx6solosabresd \ 44 mx6solosabreauto \ 45 46mx7d-flavorlist = \ 47 mx7dsabresd \ 48 mx7dpico_mbl \ 49 mx7dclsom \ 50 51mx7s-flavorlist = \ 52 mx7swarp7 \ 53 mx7swarp7_mbl \ 54 55mx7ulp-flavorlist = \ 56 mx7ulpevk 57 58imx8mq-flavorlist = \ 59 imx8mqevk 60 61imx8mm-flavorlist = \ 62 imx8mmevk 63 64imx8qx-flavorlist = \ 65 imx8qxpmek \ 66 67ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist))) 68$(call force,CFG_MX6,y) 69$(call force,CFG_MX6UL,y) 70$(call force,CFG_TEE_CORE_NB_CORE,1) 71include core/arch/arm/cpu/cortex-a7.mk 72else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist))) 73$(call force,CFG_MX6,y) 74$(call force,CFG_MX6ULL,y) 75$(call force,CFG_TEE_CORE_NB_CORE,1) 76$(call force,CFG_IMX_CAAM,n) 77include core/arch/arm/cpu/cortex-a7.mk 78else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist))) 79$(call force,CFG_MX6,y) 80$(call force,CFG_MX6Q,y) 81$(call force,CFG_TEE_CORE_NB_CORE,4) 82else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist))) 83$(call force,CFG_MX6,y) 84$(call force,CFG_MX6QP,y) 85$(call force,CFG_TEE_CORE_NB_CORE,4) 86else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist))) 87$(call force,CFG_MX6,y) 88$(call force,CFG_MX6D,y) 89$(call force,CFG_TEE_CORE_NB_CORE,2) 90else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist))) 91$(call force,CFG_MX6,y) 92$(call force,CFG_MX6DL,y) 93$(call force,CFG_TEE_CORE_NB_CORE,2) 94else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist))) 95$(call force,CFG_MX6,y) 96$(call force,CFG_MX6S,y) 97$(call force,CFG_TEE_CORE_NB_CORE,1) 98else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist))) 99$(call force,CFG_MX6,y) 100$(call force,CFG_MX6SL,y) 101$(call force,CFG_TEE_CORE_NB_CORE,1) 102$(call force,CFG_IMX_CAAM,n) 103else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist))) 104$(call force,CFG_MX6,y) 105$(call force,CFG_MX6SLL,y) 106$(call force,CFG_TEE_CORE_NB_CORE,1) 107$(call force,CFG_IMX_CAAM,n) 108else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist))) 109$(call force,CFG_MX6,y) 110$(call force,CFG_MX6SX,y) 111$(call force,CFG_TEE_CORE_NB_CORE,1) 112else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist))) 113$(call force,CFG_MX7,y) 114$(call force,CFG_TEE_CORE_NB_CORE,1) 115include core/arch/arm/cpu/cortex-a7.mk 116else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist))) 117$(call force,CFG_MX7,y) 118$(call force,CFG_TEE_CORE_NB_CORE,2) 119include core/arch/arm/cpu/cortex-a7.mk 120else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist))) 121$(call force,CFG_MX7ULP,y) 122$(call force,CFG_TEE_CORE_NB_CORE,1) 123$(call force,CFG_TZC380,n) 124$(call force,CFG_CSU,n) 125include core/arch/arm/cpu/cortex-a7.mk 126else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mq-flavorlist))) 127$(call force,CFG_IMX8MQ,y) 128$(call force,CFG_ARM64_core,y) 129CFG_IMX_UART ?= y 130CFG_DRAM_BASE ?= 0x40000000 131CFG_TEE_CORE_NB_CORE ?= 4 132else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mm-flavorlist))) 133$(call force,CFG_IMX8MM,y) 134$(call force,CFG_ARM64_core,y) 135CFG_IMX_UART ?= y 136CFG_DRAM_BASE ?= 0x40000000 137CFG_TEE_CORE_NB_CORE ?= 4 138else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8qx-flavorlist))) 139$(call force,CFG_IMX8QX,y) 140$(call force,CFG_ARM64_core,y) 141CFG_IMX_LPUART ?= y 142CFG_DRAM_BASE ?= 0x40000000 143CFG_TEE_CORE_NB_CORE ?= 4 144else 145$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)") 146endif 147 148ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd)) 149CFG_DDR_SIZE ?= 0x40000000 150CFG_NS_ENTRY_ADDR ?= 0x80800000 151endif 152 153ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom)) 154CFG_DDR_SIZE ?= 0x40000000 155CFG_UART_BASE ?= UART1_BASE 156endif 157 158ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl)) 159CFG_DDR_SIZE ?= 0x20000000 160CFG_NS_ENTRY_ADDR ?= 0x87800000 161CFG_DT_ADDR ?= 0x83100000 162CFG_UART_BASE ?= UART5_BASE 163CFG_BOOT_SECONDARY_REQUEST ?= n 164CFG_EXTERNAL_DTB_OVERLAY ?= y 165CFG_IMX_WDOG_EXT_RESET ?= y 166endif 167 168ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7)) 169CFG_DDR_SIZE ?= 0x20000000 170CFG_NS_ENTRY_ADDR ?= 0x80800000 171CFG_BOOT_SECONDARY_REQUEST ?= n 172endif 173 174ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl)) 175CFG_DDR_SIZE ?= 0x20000000 176CFG_NS_ENTRY_ADDR ?= 0x87800000 177CFG_DT_ADDR ?= 0x83100000 178CFG_BOOT_SECONDARY_REQUEST ?= n 179CFG_EXTERNAL_DTB_OVERLAY = y 180CFG_IMX_WDOG_EXT_RESET = y 181endif 182 183ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk)) 184CFG_DDR_SIZE ?= 0x40000000 185CFG_NS_ENTRY_ADDR ?= 0x60800000 186CFG_UART_BASE ?= UART4_BASE 187endif 188 189ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \ 190 mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd)) 191CFG_DDR_SIZE ?= 0x40000000 192CFG_NS_ENTRY_ADDR ?= 0x12000000 193endif 194 195ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \ 196 mx6dlsabreauto mx6solosabreauto)) 197CFG_DDR_SIZE ?= 0x80000000 198CFG_NS_ENTRY_ADDR ?= 0x12000000 199endif 200 201ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge)) 202CFG_DDR_SIZE ?= 0x80000000 203CFG_UART_BASE ?= UART1_BASE 204endif 205 206ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge)) 207CFG_DDR_SIZE ?= 0x40000000 208CFG_NS_ENTRY_ADDR ?= 0x12000000 209endif 210 211ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite)) 212CFG_DDR_SIZE ?= 0x40000000 213CFG_NS_ENTRY_ADDR ?= 0x12000000 214CFG_UART_BASE ?= UART2_BASE 215endif 216 217ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk)) 218CFG_NS_ENTRY_ADDR ?= 0x80800000 219CFG_DDR_SIZE ?= 0x40000000 220endif 221 222ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk)) 223CFG_NS_ENTRY_ADDR ?= 0x80800000 224CFG_DDR_SIZE ?= 0x80000000 225endif 226 227ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto)) 228CFG_DDR_SIZE ?= 0x80000000 229CFG_NS_ENTRY_ADDR ?= 0x80800000 230endif 231 232ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd)) 233CFG_DDR_SIZE ?= 0x40000000 234CFG_NS_ENTRY_ADDR ?= 0x80800000 235endif 236 237ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull) 238CFG_DDR_SIZE ?= 0x40000000 239CFG_UART_BASE ?= UART1_BASE 240endif 241 242ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk)) 243CFG_DDR_SIZE ?= 0x20000000 244CFG_NS_ENTRY_ADDR ?= 0x80800000 245endif 246 247ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro)) 248CFG_DDR_SIZE ?= 0x10000000 249CFG_NS_ENTRY_ADDR ?= 0x80800000 250CFG_UART_BASE ?= UART5_BASE 251endif 252 253ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk)) 254CFG_DDR_SIZE ?= 0x10000000 255CFG_NS_ENTRY_ADDR ?= 0x80800000 256endif 257 258ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mqevk)) 259CFG_DDR_SIZE ?= 0xc0000000 260CFG_UART_BASE ?= UART1_BASE 261endif 262 263ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mmevk)) 264CFG_DDR_SIZE ?= 0x80000000 265CFG_UART_BASE ?= UART2_BASE 266endif 267 268ifneq (,$(filter $(PLATFORM_FLAVOR),imx8qxpmek)) 269CFG_DDR_SIZE ?= 0x80000000 270CFG_UART_BASE ?= UART0_BASE 271endif 272 273# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config 274ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \ 275 $(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y) 276include core/arch/arm/cpu/cortex-a9.mk 277 278$(call force,CFG_PL310,y) 279 280CFG_PL310_LOCKED ?= y 281CFG_ENABLE_SCTLR_RR ?= y 282CFG_SCU ?= y 283endif 284 285ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y) 286CFG_DRAM_BASE ?= 0x10000000 287endif 288 289ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \ 290 $(CFG_MX6SX))) 291CFG_DRAM_BASE ?= 0x80000000 292endif 293 294ifeq ($(filter y, $(CFG_MX7)), y) 295CFG_INIT_CNTVOFF ?= y 296CFG_DRAM_BASE ?= 0x80000000 297endif 298 299ifeq ($(filter y, $(CFG_MX7ULP)), y) 300CFG_INIT_CNTVOFF ?= y 301CFG_DRAM_BASE ?= 0x80000000 302$(call force,CFG_IMX_LPUART,y) 303$(call force,CFG_BOOT_SECONDARY_REQUEST,n) 304endif 305 306ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP))) 307$(call force,CFG_GENERIC_BOOT,y) 308$(call force,CFG_GIC,y) 309$(call force,CFG_PM_STUBS,y) 310$(call force,CFG_WITH_SOFTWARE_PRNG,y) 311 312CFG_BOOT_SYNC_CPU ?= n 313CFG_BOOT_SECONDARY_REQUEST ?= y 314CFG_DT ?= y 315CFG_PAGEABLE_ADDR ?= 0 316CFG_PSCI_ARM32 ?= y 317CFG_SECURE_TIME_SOURCE_REE ?= y 318CFG_UART_BASE ?= UART1_BASE 319CFG_IMX_CAAM ?= y 320endif 321 322ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7))) 323$(call force,CFG_IMX_UART,y) 324CFG_CSU ?= y 325endif 326 327ifeq ($(filter y, $(CFG_PSCI_ARM32)), y) 328CFG_HWSUPP_MEM_PERM_WXN = n 329CFG_IMX_WDOG ?= y 330endif 331 332ifeq ($(CFG_ARM64_core),y) 333# arm-v8 platforms 334include core/arch/arm/cpu/cortex-armv8-0.mk 335$(call force,CFG_ARM_GICV3,y) 336$(call force,CFG_GENERIC_BOOT,y) 337$(call force,CFG_GIC,y) 338$(call force,CFG_WITH_LPAE,y) 339$(call force,CFG_WITH_ARM_TRUSTED_FW,y) 340$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 341 342CFG_CRYPTO_WITH_CE ?= y 343CFG_PM_STUBS ?= y 344 345supported-ta-targets = ta_arm64 346endif 347 348CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE)) 349CFG_TZDRAM_SIZE ?= 0x01e00000 350CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE)) 351CFG_SHMEM_SIZE ?= 0x00200000 352 353CFG_CRYPTO_SIZE_OPTIMIZATION ?= n 354CFG_WITH_STACK_CANARIES ?= y 355CFG_MMAP_REGIONS ?= 24 356