xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision bde8a250edd97987f8fc2c20fcb36ea4038f0e22)
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6
7mx6ull-flavorlist = \
8	mx6ullevk \
9
10mx6q-flavorlist = \
11	mx6qsabrelite \
12	mx6qsabresd \
13	mx6qhmbedge \
14
15mx6sx-flavorlist = \
16	mx6sxsabreauto \
17
18mx6d-flavorlist = \
19	mx6dhmbedge \
20
21mx6dl-flavorlist = \
22	mx6dlsabresd \
23	mx6dlhmbedge \
24
25mx6s-flavorlist = \
26	mx6shmbedge \
27
28mx7-flavorlist = \
29	mx7dsabresd \
30	mx7swarp7 \
31
32ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
33$(call force,CFG_MX6,y)
34$(call force,CFG_MX6UL,y)
35$(call force,CFG_TEE_CORE_NB_CORE,1)
36include core/arch/arm/cpu/cortex-a7.mk
37else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
38$(call force,CFG_MX6,y)
39$(call force,CFG_MX6ULL,y)
40$(call force,CFG_TEE_CORE_NB_CORE,1)
41include core/arch/arm/cpu/cortex-a7.mk
42else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
43$(call force,CFG_MX6,y)
44$(call force,CFG_MX6Q,y)
45$(call force,CFG_TEE_CORE_NB_CORE,4)
46else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
47$(call force,CFG_MX6,y)
48$(call force,CFG_MX6D,y)
49$(call force,CFG_TEE_CORE_NB_CORE,2)
50else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
51$(call force,CFG_MX6,y)
52$(call force,CFG_MX6DL,y)
53$(call force,CFG_TEE_CORE_NB_CORE,2)
54else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
55$(call force,CFG_MX6,y)
56$(call force,CFG_MX6S,y)
57$(call force,CFG_TEE_CORE_NB_CORE,1)
58else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
59$(call force,CFG_MX6,y)
60$(call force,CFG_MX6SX,y)
61$(call force,CFG_TEE_CORE_NB_CORE,1)
62else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7-flavorlist)))
63$(call force,CFG_MX7,y)
64CFG_TEE_CORE_NB_CORE ?= 2
65include core/arch/arm/cpu/cortex-a7.mk
66else
67$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
68endif
69
70ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
71CFG_DDR_SIZE ?= 0x40000000
72CFG_NS_ENTRY_ADDR ?= 0x80800000
73$(call force,CFG_TEE_CORE_NB_CORE,2)
74endif
75
76ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
77CFG_DDR_SIZE ?= 0x20000000
78CFG_NS_ENTRY_ADDR ?= 0x80800000
79CFG_BOOT_SECONDARY_REQUEST ?= n
80$(call force,CFG_TEE_CORE_NB_CORE,1)
81endif
82
83ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabresd mx6dlsabresd \
84	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge))
85CFG_DDR_SIZE ?= 0x40000000
86CFG_NS_ENTRY_ADDR ?= 0x12000000
87endif
88
89ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
90CFG_DDR_SIZE ?= 0x40000000
91CFG_NS_ENTRY_ADDR ?= 0x12000000
92endif
93
94ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
95CFG_DDR_SIZE ?= 0x40000000
96CFG_NS_ENTRY_ADDR ?= 0x12000000
97CFG_UART_BASE ?= UART2_BASE
98endif
99
100ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
101CFG_DDR_SIZE ?= 0x80000000
102CFG_NS_ENTRY_ADDR ?= 0x80800000
103endif
104
105ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk))
106CFG_DDR_SIZE ?= 0x20000000
107CFG_NS_ENTRY_ADDR ?= 0x80800000
108endif
109
110# i.MX6 Solo/SoloX/DualLite/Dual/Quad specific config
111ifeq ($(filter y, $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
112      $(CFG_MX6SX)), y)
113include core/arch/arm/cpu/cortex-a9.mk
114
115$(call force,CFG_PL310,y)
116
117CFG_PL310_LOCKED ?= y
118CFG_ENABLE_SCTLR_RR ?= y
119endif
120
121ifeq ($(filter y, $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
122CFG_DRAM_BASE ?= 0x10000000
123endif
124
125ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SX)))
126CFG_DRAM_BASE ?= 0x80000000
127endif
128
129ifeq ($(filter y, $(CFG_MX7)), y)
130CFG_INIT_CNTVOFF ?= y
131CFG_DRAM_BASE ?= 0x80000000
132endif
133
134ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
135$(call force,CFG_GENERIC_BOOT,y)
136$(call force,CFG_GIC,y)
137$(call force,CFG_IMX_UART,y)
138$(call force,CFG_PM_STUBS,y)
139$(call force,CFG_WITH_SOFTWARE_PRNG,y)
140
141CFG_BOOT_SYNC_CPU ?= n
142CFG_BOOT_SECONDARY_REQUEST ?= y
143CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
144CFG_DT ?= y
145CFG_PAGEABLE_ADDR ?= 0
146CFG_PSCI_ARM32 ?= y
147CFG_SECURE_TIME_SOURCE_REE ?= y
148CFG_UART_BASE ?= UART1_BASE
149CFG_WITH_STACK_CANARIES ?= y
150
151CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
152CFG_TZDRAM_SIZE ?= 0x01e00000
153CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
154CFG_SHMEM_SIZE ?= 0x00200000
155
156ta-targets = ta_arm32
157endif
158
159ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
160CFG_HWSUPP_MEM_PERM_WXN = n
161CFG_IMX_WDOG ?= y
162endif
163
164CFG_MMAP_REGIONS ?= 24
165