xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision b9cb8f26a8ebdc7e3a6a8cbbd56d3ecfd75835ec) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8	mx6ulccbv2 \
9
10mx6ull-flavorlist = \
11	mx6ullevk \
12	mx6ulzevk \
13
14mx6q-flavorlist = \
15	mx6qsabrelite \
16	mx6qsabreauto \
17	mx6qsabresd \
18	mx6qhmbedge \
19	mx6qapalis \
20
21mx6qp-flavorlist = \
22	mx6qpsabreauto \
23	mx6qpsabresd \
24
25mx6sl-flavorlist = \
26	mx6slevk
27
28mx6sll-flavorlist = \
29	mx6sllevk
30
31mx6sx-flavorlist = \
32	mx6sxsabreauto \
33	mx6sxsabresd \
34	mx6sxudooneofull \
35
36mx6d-flavorlist = \
37	mx6dhmbedge \
38	mx6dapalis \
39
40mx6dl-flavorlist = \
41	mx6dlsabreauto \
42	mx6dlsabresd \
43	mx6dlhmbedge \
44
45mx6s-flavorlist = \
46	mx6shmbedge \
47	mx6solosabresd \
48	mx6solosabreauto \
49
50mx7d-flavorlist = \
51	mx7dsabresd \
52	mx7dpico_mbl \
53	mx7dclsom \
54
55mx7s-flavorlist = \
56	mx7swarp7 \
57	mx7swarp7_mbl \
58
59mx7ulp-flavorlist = \
60	mx7ulpevk
61
62mx8mq-flavorlist = \
63	mx8mqevk
64
65mx8mm-flavorlist = \
66	mx8mmevk \
67	mx8mm_cl_iot_gate
68
69mx8mn-flavorlist = \
70	mx8mnevk
71
72mx8mp-flavorlist = \
73	mx8mpevk
74
75mx8qm-flavorlist = \
76	mx8qmmek \
77
78mx8qx-flavorlist = \
79	mx8qxpmek \
80
81ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
82$(call force,CFG_MX6,y)
83$(call force,CFG_MX6UL,y)
84$(call force,CFG_TEE_CORE_NB_CORE,1)
85$(call force,CFG_TZC380,y)
86include core/arch/arm/cpu/cortex-a7.mk
87else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
88$(call force,CFG_MX6,y)
89$(call force,CFG_MX6ULL,y)
90$(call force,CFG_TEE_CORE_NB_CORE,1)
91$(call force,CFG_IMX_CAAM,n)
92$(call force,CFG_NXP_CAAM,n)
93$(call force,CFG_IMX_DCP,y)
94include core/arch/arm/cpu/cortex-a7.mk
95else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
96$(call force,CFG_MX6,y)
97$(call force,CFG_MX6Q,y)
98$(call force,CFG_TEE_CORE_NB_CORE,4)
99$(call force,CFG_TZC380,y)
100else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
101$(call force,CFG_MX6,y)
102$(call force,CFG_MX6QP,y)
103$(call force,CFG_TEE_CORE_NB_CORE,4)
104else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
105$(call force,CFG_MX6,y)
106$(call force,CFG_MX6D,y)
107$(call force,CFG_TEE_CORE_NB_CORE,2)
108$(call force,CFG_TZC380,y)
109else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
110$(call force,CFG_MX6,y)
111$(call force,CFG_MX6DL,y)
112$(call force,CFG_TEE_CORE_NB_CORE,2)
113$(call force,CFG_TZC380,y)
114else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
115$(call force,CFG_MX6,y)
116$(call force,CFG_MX6S,y)
117$(call force,CFG_TEE_CORE_NB_CORE,1)
118else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
119$(call force,CFG_MX6,y)
120$(call force,CFG_MX6SL,y)
121$(call force,CFG_TEE_CORE_NB_CORE,1)
122$(call force,CFG_IMX_CAAM,n)
123$(call force,CFG_NXP_CAAM,n)
124$(call force,CFG_IMX_DCP,y)
125else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
126$(call force,CFG_MX6,y)
127$(call force,CFG_MX6SLL,y)
128$(call force,CFG_TEE_CORE_NB_CORE,1)
129$(call force,CFG_IMX_CAAM,n)
130$(call force,CFG_NXP_CAAM,n)
131$(call force,CFG_IMX_DCP,y)
132$(call force,CFG_NO_SMP,y)
133else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
134$(call force,CFG_MX6,y)
135$(call force,CFG_MX6SX,y)
136$(call force,CFG_TEE_CORE_NB_CORE,1)
137else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
138$(call force,CFG_MX7,y)
139$(call force,CFG_TEE_CORE_NB_CORE,1)
140include core/arch/arm/cpu/cortex-a7.mk
141else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
142$(call force,CFG_MX7,y)
143$(call force,CFG_TEE_CORE_NB_CORE,2)
144include core/arch/arm/cpu/cortex-a7.mk
145else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
146$(call force,CFG_MX7ULP,y)
147$(call force,CFG_TEE_CORE_NB_CORE,1)
148$(call force,CFG_TZC380,n)
149$(call force,CFG_CSU,n)
150$(call force,CFG_NXP_CAAM,n)
151include core/arch/arm/cpu/cortex-a7.mk
152else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mq-flavorlist)))
153$(call force,CFG_MX8MQ,y)
154$(call force,CFG_MX8M,y)
155$(call force,CFG_ARM64_core,y)
156CFG_IMX_UART ?= y
157CFG_DRAM_BASE ?= 0x40000000
158CFG_TEE_CORE_NB_CORE ?= 4
159else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist)))
160$(call force,CFG_MX8MM,y)
161$(call force,CFG_MX8M,y)
162$(call force,CFG_ARM64_core,y)
163CFG_IMX_UART ?= y
164CFG_DRAM_BASE ?= 0x40000000
165CFG_TEE_CORE_NB_CORE ?= 4
166else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mn-flavorlist)))
167$(call force,CFG_MX8MN,y)
168$(call force,CFG_MX8M,y)
169$(call force,CFG_ARM64_core,y)
170CFG_IMX_UART ?= y
171CFG_DRAM_BASE ?= 0x40000000
172CFG_TEE_CORE_NB_CORE ?= 4
173else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mp-flavorlist)))
174$(call force,CFG_MX8MP,y)
175$(call force,CFG_MX8M,y)
176$(call force,CFG_ARM64_core,y)
177CFG_IMX_UART ?= y
178CFG_DRAM_BASE ?= 0x40000000
179CFG_TEE_CORE_NB_CORE ?= 4
180else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist)))
181$(call force,CFG_MX8QM,y)
182$(call force,CFG_ARM64_core,y)
183$(call force,CFG_IMX_SNVS,n)
184CFG_IMX_LPUART ?= y
185CFG_DRAM_BASE ?= 0x80000000
186CFG_TEE_CORE_NB_CORE ?= 6
187$(call force,CFG_NXP_CAAM,n)
188else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qx-flavorlist)))
189$(call force,CFG_MX8QX,y)
190$(call force,CFG_ARM64_core,y)
191CFG_IMX_LPUART ?= y
192CFG_DRAM_BASE ?= 0x80000000
193CFG_TEE_CORE_NB_CORE ?= 4
194$(call force,CFG_NXP_CAAM,n)
195else
196$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
197endif
198
199ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
200CFG_DDR_SIZE ?= 0x40000000
201CFG_NS_ENTRY_ADDR ?= 0x80800000
202endif
203
204ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
205CFG_DDR_SIZE ?= 0x40000000
206CFG_UART_BASE ?= UART1_BASE
207endif
208
209ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
210CFG_DDR_SIZE ?= 0x20000000
211CFG_NS_ENTRY_ADDR ?= 0x87800000
212CFG_DT_ADDR ?= 0x83100000
213CFG_UART_BASE ?= UART5_BASE
214CFG_BOOT_SECONDARY_REQUEST ?= n
215CFG_EXTERNAL_DTB_OVERLAY ?= y
216CFG_IMX_WDOG_EXT_RESET ?= y
217endif
218
219ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
220CFG_DDR_SIZE ?= 0x20000000
221CFG_NS_ENTRY_ADDR ?= 0x80800000
222CFG_BOOT_SECONDARY_REQUEST ?= n
223endif
224
225ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
226CFG_DDR_SIZE ?= 0x20000000
227CFG_NS_ENTRY_ADDR ?= 0x87800000
228CFG_DT_ADDR ?= 0x83100000
229CFG_BOOT_SECONDARY_REQUEST ?= n
230CFG_EXTERNAL_DTB_OVERLAY = y
231CFG_IMX_WDOG_EXT_RESET = y
232endif
233
234ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
235CFG_DDR_SIZE ?= 0x40000000
236CFG_NS_ENTRY_ADDR ?= 0x60800000
237CFG_UART_BASE ?= UART4_BASE
238endif
239
240ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
241	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd \
242	mx6dapalis mx6qapalis))
243CFG_DDR_SIZE ?= 0x40000000
244CFG_NS_ENTRY_ADDR ?= 0x12000000
245endif
246
247ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
248	mx6dlsabreauto mx6solosabreauto))
249CFG_DDR_SIZE ?= 0x80000000
250CFG_NS_ENTRY_ADDR ?= 0x12000000
251CFG_UART_BASE ?= UART4_BASE
252endif
253
254ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
255CFG_DDR_SIZE ?= 0x80000000
256CFG_UART_BASE ?= UART1_BASE
257endif
258
259ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
260CFG_DDR_SIZE ?= 0x40000000
261CFG_NS_ENTRY_ADDR ?= 0x12000000
262endif
263
264ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
265CFG_DDR_SIZE ?= 0x40000000
266CFG_NS_ENTRY_ADDR ?= 0x12000000
267CFG_UART_BASE ?= UART2_BASE
268endif
269
270ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
271CFG_NS_ENTRY_ADDR ?= 0x80800000
272CFG_DDR_SIZE ?= 0x40000000
273endif
274
275ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
276CFG_NS_ENTRY_ADDR ?= 0x80800000
277CFG_DDR_SIZE ?= 0x80000000
278endif
279
280ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
281CFG_DDR_SIZE ?= 0x80000000
282CFG_NS_ENTRY_ADDR ?= 0x80800000
283endif
284
285ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
286CFG_DDR_SIZE ?= 0x40000000
287CFG_NS_ENTRY_ADDR ?= 0x80800000
288endif
289
290ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
291CFG_DDR_SIZE ?= 0x40000000
292CFG_UART_BASE ?= UART1_BASE
293endif
294
295ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk mx6ulzevk))
296CFG_DDR_SIZE ?= 0x20000000
297CFG_NS_ENTRY_ADDR ?= 0x80800000
298endif
299
300ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
301CFG_DDR_SIZE ?= 0x10000000
302CFG_NS_ENTRY_ADDR ?= 0x80800000
303CFG_UART_BASE ?= UART5_BASE
304endif
305
306ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
307CFG_DDR_SIZE ?= 0x10000000
308CFG_NS_ENTRY_ADDR ?= 0x80800000
309endif
310
311ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccbv2))
312CFG_DDR_SIZE ?= 0x10000000
313CFG_UART_BASE ?= UART7_BASE
314endif
315
316ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mqevk))
317CFG_DDR_SIZE ?= 0xc0000000
318CFG_UART_BASE ?= UART1_BASE
319endif
320
321ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk))
322CFG_DDR_SIZE ?= 0x80000000
323CFG_UART_BASE ?= UART2_BASE
324endif
325
326ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mm_cl_iot_gate))
327CFG_DDR_SIZE ?= 0x40000000
328CFG_UART_BASE ?= UART3_BASE
329CFG_NSEC_DDR_1_BASE ?= 0x80000000UL
330CFG_NSEC_DDR_1_SIZE ?= 0x40000000UL
331endif
332
333ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk))
334CFG_DDR_SIZE ?= 0x80000000
335CFG_UART_BASE ?= UART2_BASE
336endif
337
338ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mpevk))
339CFG_DDR_SIZE ?= UL(0x180000000)
340CFG_UART_BASE ?= UART2_BASE
341$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
342$(call force,CFG_CORE_ARM64_PA_BITS,36)
343endif
344
345ifneq (,$(filter $(PLATFORM_FLAVOR),mx8qxpmek mx8qmmek))
346CFG_DDR_SIZE ?= 0x80000000
347CFG_UART_BASE ?= UART0_BASE
348CFG_NSEC_DDR_1_BASE ?= 0x880000000UL
349CFG_NSEC_DDR_1_SIZE  ?= 0x380000000UL
350CFG_CORE_ARM64_PA_BITS ?= 40
351endif
352
353# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
354ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
355	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
356include core/arch/arm/cpu/cortex-a9.mk
357
358$(call force,CFG_PL310,y)
359
360CFG_PL310_LOCKED ?= y
361CFG_ENABLE_SCTLR_RR ?= y
362CFG_SCU ?= y
363endif
364
365ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
366CFG_DRAM_BASE ?= 0x10000000
367endif
368
369ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
370	$(CFG_MX6SX)))
371CFG_DRAM_BASE ?= 0x80000000
372endif
373
374ifeq ($(filter y, $(CFG_MX7)), y)
375CFG_INIT_CNTVOFF ?= y
376CFG_DRAM_BASE ?= 0x80000000
377endif
378
379ifeq ($(filter y, $(CFG_MX7ULP)), y)
380CFG_INIT_CNTVOFF ?= y
381CFG_DRAM_BASE ?= UL(0x60000000)
382$(call force,CFG_IMX_LPUART,y)
383$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
384endif
385
386ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
387$(call force,CFG_GIC,y)
388
389CFG_BOOT_SECONDARY_REQUEST ?= y
390CFG_DT ?= y
391CFG_DTB_MAX_SIZE ?= 0x20000
392CFG_PAGEABLE_ADDR ?= 0
393CFG_PSCI_ARM32 ?= y
394CFG_SECURE_TIME_SOURCE_REE ?= y
395CFG_UART_BASE ?= UART1_BASE
396endif
397
398ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX8MM)))
399$(call force,CFG_IMX_UART,y)
400ifeq ($(CFG_RPMB_FS),y)
401CFG_IMX_SNVS ?= y
402endif
403endif
404
405ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
406CFG_CSU ?= y
407endif
408
409ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
410CFG_HWSUPP_MEM_PERM_WXN = n
411CFG_IMX_WDOG ?= y
412endif
413
414ifeq ($(CFG_ARM64_core),y)
415# arm-v8 platforms
416include core/arch/arm/cpu/cortex-armv8-0.mk
417$(call force,CFG_ARM_GICV3,y)
418$(call force,CFG_GIC,y)
419$(call force,CFG_WITH_LPAE,y)
420$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
421$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
422
423CFG_CRYPTO_WITH_CE ?= y
424
425supported-ta-targets = ta_arm64
426endif
427
428CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
429CFG_TZDRAM_SIZE ?= 0x01e00000
430CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
431CFG_SHMEM_SIZE ?= 0x00200000
432
433CFG_NSEC_DDR_0_BASE ?= $(CFG_DRAM_BASE)
434CFG_NSEC_DDR_0_SIZE ?= ($(CFG_DDR_SIZE) - 0x02000000)
435
436CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
437CFG_MMAP_REGIONS ?= 24
438
439# Almost all platforms include CAAM HW Modules, except the
440# ones forced to be disabled
441CFG_NXP_CAAM ?= n
442
443ifeq ($(CFG_NXP_CAAM),y)
444# As NXP CAAM Driver is enabled, disable the small local CAAM driver
445# used just to release Job Rings to Non-Secure world
446$(call force,CFG_IMX_CAAM,n)
447else
448
449ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
450CFG_IMX_CAAM ?= y
451endif
452endif
453
454# Cryptographic configuration
455include core/arch/arm/plat-imx/crypto_conf.mk
456