xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision 7dc37aa656aec7fb51cb399bda096d44648a7280) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8	mx6ulccbv2 \
9
10mx6ull-flavorlist = \
11	mx6ullevk \
12	mx6ulzevk \
13
14mx6q-flavorlist = \
15	mx6qsabrelite \
16	mx6qsabreauto \
17	mx6qsabresd \
18	mx6qhmbedge \
19	mx6qapalis \
20
21mx6qp-flavorlist = \
22	mx6qpsabreauto \
23	mx6qpsabresd \
24
25mx6sl-flavorlist = \
26	mx6slevk
27
28mx6sll-flavorlist = \
29	mx6sllevk
30
31mx6sx-flavorlist = \
32	mx6sxsabreauto \
33	mx6sxsabresd \
34	mx6sxudooneofull \
35
36mx6d-flavorlist = \
37	mx6dhmbedge \
38	mx6dapalis \
39
40mx6dl-flavorlist = \
41	mx6dlsabreauto \
42	mx6dlsabresd \
43	mx6dlhmbedge \
44
45mx6s-flavorlist = \
46	mx6shmbedge \
47	mx6solosabresd \
48	mx6solosabreauto \
49
50mx7d-flavorlist = \
51	mx7dsabresd \
52	mx7dpico_mbl \
53	mx7dclsom \
54
55mx7s-flavorlist = \
56	mx7swarp7 \
57	mx7swarp7_mbl \
58
59mx7ulp-flavorlist = \
60	mx7ulpevk
61
62mx8mq-flavorlist = \
63	mx8mqevk
64
65mx8mm-flavorlist = \
66	mx8mmevk \
67	mx8mm_cl_iot_gate \
68	mx8mm_phyboard_polis \
69	mx8mm_phygate_tauri_l
70
71mx8mn-flavorlist = \
72	mx8mnevk
73
74mx8mp-flavorlist = \
75	mx8mpevk \
76	mx8mp_rsb3720_6g \
77	mx8mp_phyboard_pollux \
78	mx8mp_libra_fpsc
79
80mx8qm-flavorlist = \
81	mx8qmmek \
82
83mx8qx-flavorlist = \
84	mx8qxpmek \
85	mx8dxmek \
86
87mx8dxl-flavorlist = \
88	mx8dxlevk \
89
90mx8ulp-flavorlist = \
91	mx8ulpevk \
92
93mx93-flavorlist = \
94	mx93evk \
95
96mx95-flavorlist = \
97	mx95evk \
98
99mx91-flavorlist = \
100	mx91evk \
101
102mx943-flavorlist = \
103	mx943evk \
104
105ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
106$(call force,CFG_MX6,y)
107$(call force,CFG_MX6UL,y)
108$(call force,CFG_TEE_CORE_NB_CORE,1)
109$(call force,CFG_TZC380,y)
110include core/arch/arm/cpu/cortex-a7.mk
111else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
112$(call force,CFG_MX6,y)
113$(call force,CFG_MX6ULL,y)
114$(call force,CFG_TEE_CORE_NB_CORE,1)
115$(call force,CFG_TZC380,y)
116$(call force,CFG_IMX_CAAM,n)
117$(call force,CFG_NXP_CAAM,n)
118$(call force,CFG_IMX_DCP,y)
119include core/arch/arm/cpu/cortex-a7.mk
120else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
121$(call force,CFG_MX6,y)
122$(call force,CFG_MX6Q,y)
123$(call force,CFG_TEE_CORE_NB_CORE,4)
124$(call force,CFG_TZC380,y)
125$(call force,CFG_CORE_HAS_GENERIC_TIMER,n)
126else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
127$(call force,CFG_MX6,y)
128$(call force,CFG_MX6QP,y)
129$(call force,CFG_TEE_CORE_NB_CORE,4)
130$(call force,CFG_CORE_HAS_GENERIC_TIMER,n)
131else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
132$(call force,CFG_MX6,y)
133$(call force,CFG_MX6D,y)
134$(call force,CFG_TEE_CORE_NB_CORE,2)
135$(call force,CFG_TZC380,y)
136$(call force,CFG_CORE_HAS_GENERIC_TIMER,n)
137else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
138$(call force,CFG_MX6,y)
139$(call force,CFG_MX6DL,y)
140$(call force,CFG_TEE_CORE_NB_CORE,2)
141$(call force,CFG_TZC380,y)
142$(call force,CFG_CORE_HAS_GENERIC_TIMER,n)
143else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
144$(call force,CFG_MX6,y)
145$(call force,CFG_MX6S,y)
146$(call force,CFG_TEE_CORE_NB_CORE,1)
147$(call force,CFG_CORE_HAS_GENERIC_TIMER,n)
148else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
149$(call force,CFG_MX6,y)
150$(call force,CFG_MX6SL,y)
151$(call force,CFG_TEE_CORE_NB_CORE,1)
152$(call force,CFG_IMX_CAAM,n)
153$(call force,CFG_NXP_CAAM,n)
154$(call force,CFG_IMX_DCP,y)
155$(call force,CFG_CORE_HAS_GENERIC_TIMER,n)
156else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
157$(call force,CFG_MX6,y)
158$(call force,CFG_MX6SLL,y)
159$(call force,CFG_TEE_CORE_NB_CORE,1)
160$(call force,CFG_IMX_CAAM,n)
161$(call force,CFG_NXP_CAAM,n)
162$(call force,CFG_IMX_DCP,y)
163$(call force,CFG_NO_SMP,y)
164$(call force,CFG_CORE_HAS_GENERIC_TIMER,n)
165else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
166$(call force,CFG_MX6,y)
167$(call force,CFG_MX6SX,y)
168$(call force,CFG_TEE_CORE_NB_CORE,1)
169$(call force,CFG_CORE_HAS_GENERIC_TIMER,n)
170else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
171$(call force,CFG_MX7,y)
172$(call force,CFG_TEE_CORE_NB_CORE,1)
173include core/arch/arm/cpu/cortex-a7.mk
174else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
175$(call force,CFG_MX7,y)
176$(call force,CFG_TEE_CORE_NB_CORE,2)
177include core/arch/arm/cpu/cortex-a7.mk
178else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
179$(call force,CFG_MX7ULP,y)
180$(call force,CFG_TEE_CORE_NB_CORE,1)
181$(call force,CFG_TZC380,n)
182$(call force,CFG_IMX_CSU,n)
183include core/arch/arm/cpu/cortex-a7.mk
184else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mq-flavorlist)))
185$(call force,CFG_MX8MQ,y)
186$(call force,CFG_MX8M,y)
187$(call force,CFG_ARM64_core,y)
188$(call force,CFG_TZC380,y)
189CFG_DRAM_BASE ?= 0x40000000
190CFG_TEE_CORE_NB_CORE ?= 4
191else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist)))
192$(call force,CFG_MX8MM,y)
193$(call force,CFG_MX8M,y)
194$(call force,CFG_ARM64_core,y)
195$(call force,CFG_TZC380,y)
196CFG_DRAM_BASE ?= 0x40000000
197CFG_TEE_CORE_NB_CORE ?= 4
198else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mn-flavorlist)))
199$(call force,CFG_MX8MN,y)
200$(call force,CFG_MX8M,y)
201$(call force,CFG_ARM64_core,y)
202$(call force,CFG_TZC380,y)
203CFG_DRAM_BASE ?= 0x40000000
204CFG_TEE_CORE_NB_CORE ?= 4
205else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mp-flavorlist)))
206$(call force,CFG_MX8MP,y)
207$(call force,CFG_MX8M,y)
208$(call force,CFG_ARM64_core,y)
209$(call force,CFG_TZC380,y)
210CFG_DRAM_BASE ?= 0x40000000
211CFG_TEE_CORE_NB_CORE ?= 4
212else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist)))
213$(call force,CFG_MX8QM,y)
214$(call force,CFG_ARM64_core,y)
215$(call force,CFG_IMX_SNVS,n)
216CFG_IMX_LPUART ?= y
217CFG_DRAM_BASE ?= 0x80000000
218CFG_TEE_CORE_NB_CORE ?= 6
219$(call force,CFG_IMX_OCOTP,n)
220else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qx-flavorlist)))
221$(call force,CFG_MX8QX,y)
222$(call force,CFG_ARM64_core,y)
223$(call force,CFG_IMX_SNVS,n)
224CFG_IMX_LPUART ?= y
225CFG_DRAM_BASE ?= 0x80000000
226CFG_TEE_CORE_NB_CORE ?= 4
227$(call force,CFG_IMX_OCOTP,n)
228else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8dxl-flavorlist)))
229$(call force,CFG_MX8DXL,y)
230$(call force,CFG_ARM64_core,y)
231$(call force,CFG_IMX_SNVS,n)
232CFG_IMX_LPUART ?= y
233CFG_DRAM_BASE ?= 0x80000000
234$(call force,CFG_TEE_CORE_NB_CORE,2)
235$(call force,CFG_IMX_OCOTP,n)
236else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8ulp-flavorlist)))
237$(call force,CFG_MX8ULP,y)
238$(call force,CFG_ARM64_core,y)
239CFG_IMX_LPUART ?= y
240CFG_DRAM_BASE ?= 0x80000000
241CFG_TEE_CORE_NB_CORE ?= 2
242$(call force,CFG_NXP_SNVS,n)
243$(call force,CFG_IMX_OCOTP,n)
244CFG_IMX_MU ?= y
245CFG_IMX_ELE ?= n
246else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx93-flavorlist)))
247$(call force,CFG_MX93,y)
248$(call force,CFG_ARM64_core,y)
249CFG_IMX_LPUART ?= y
250CFG_DRAM_BASE ?= 0x80000000
251CFG_TEE_CORE_NB_CORE ?= 2
252$(call force,CFG_NXP_SNVS,n)
253$(call force,CFG_IMX_OCOTP,n)
254$(call force,CFG_TZC380,n)
255$(call force,CFG_CRYPTO_DRIVER,n)
256$(call force,CFG_NXP_CAAM,n)
257CFG_IMX_MU ?= y
258CFG_IMX_ELE ?= y
259else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx95-flavorlist)))
260$(call force,CFG_MX95,y)
261$(call force,CFG_ARM64_core,y)
262CFG_IMX_LPUART ?= y
263CFG_DRAM_BASE ?= 0x80000000
264CFG_TEE_CORE_NB_CORE ?= 6
265$(call force,CFG_NXP_SNVS,n)
266$(call force,CFG_IMX_OCOTP,n)
267$(call force,CFG_TZC380,n)
268$(call force,CFG_NXP_CAAM,n)
269CFG_IMX_MU ?= y
270CFG_IMX_ELE ?= y
271else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx91-flavorlist)))
272$(call force,CFG_MX91,y)
273$(call force,CFG_ARM64_core,y)
274CFG_IMX_LPUART ?= y
275CFG_DRAM_BASE ?= 0x80000000
276CFG_TEE_CORE_NB_CORE ?= 1
277$(call force,CFG_NXP_SNVS,n)
278$(call force,CFG_IMX_OCOTP,n)
279$(call force,CFG_TZC380,n)
280$(call force,CFG_NXP_CAAM,n)
281CFG_IMX_MU ?= y
282CFG_IMX_ELE ?= y
283else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx943-flavorlist)))
284$(call force,CFG_MX943,y)
285$(call force,CFG_ARM64_core,y)
286CFG_IMX_LPUART ?= y
287CFG_DRAM_BASE ?= 0x80000000
288CFG_TEE_CORE_NB_CORE ?= 4
289$(call force,CFG_NXP_SNVS,n)
290$(call force,CFG_IMX_OCOTP,n)
291$(call force,CFG_TZC380,n)
292$(call force,CFG_NXP_CAAM,n)
293CFG_IMX_MU ?= y
294CFG_IMX_ELE ?= y
295else
296$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
297endif
298
299ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
300CFG_DDR_SIZE ?= 0x40000000
301CFG_NS_ENTRY_ADDR ?= 0x80800000
302CFG_IMX_WDOG_EXT_RESET ?= y
303endif
304
305ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
306CFG_DDR_SIZE ?= 0x40000000
307CFG_UART_BASE ?= UART1_BASE
308CFG_IMX_WDOG_EXT_RESET ?= y
309endif
310
311ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
312CFG_DDR_SIZE ?= 0x20000000
313CFG_NS_ENTRY_ADDR ?= 0x87800000
314CFG_DT_ADDR ?= 0x83100000
315CFG_UART_BASE ?= UART5_BASE
316CFG_BOOT_SECONDARY_REQUEST ?= n
317CFG_EXTERNAL_DTB_OVERLAY ?= y
318CFG_IMX_WDOG_EXT_RESET ?= y
319endif
320
321ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
322CFG_DDR_SIZE ?= 0x20000000
323CFG_NS_ENTRY_ADDR ?= 0x80800000
324CFG_BOOT_SECONDARY_REQUEST ?= n
325endif
326
327ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
328CFG_DDR_SIZE ?= 0x20000000
329CFG_NS_ENTRY_ADDR ?= 0x87800000
330CFG_DT_ADDR ?= 0x83100000
331CFG_BOOT_SECONDARY_REQUEST ?= n
332CFG_EXTERNAL_DTB_OVERLAY = y
333CFG_IMX_WDOG_EXT_RESET = y
334endif
335
336ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
337CFG_DDR_SIZE ?= 0x40000000
338CFG_NS_ENTRY_ADDR ?= 0x60800000
339CFG_UART_BASE ?= UART4_BASE
340endif
341
342ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
343	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd \
344	mx6dapalis mx6qapalis))
345CFG_DDR_SIZE ?= 0x40000000
346CFG_NS_ENTRY_ADDR ?= 0x12000000
347endif
348
349ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
350	mx6dlsabreauto mx6solosabreauto))
351CFG_DDR_SIZE ?= 0x80000000
352CFG_NS_ENTRY_ADDR ?= 0x12000000
353CFG_UART_BASE ?= UART4_BASE
354endif
355
356ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
357CFG_DDR_SIZE ?= 0x80000000
358CFG_UART_BASE ?= UART1_BASE
359endif
360
361ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
362CFG_DDR_SIZE ?= 0x40000000
363CFG_NS_ENTRY_ADDR ?= 0x12000000
364endif
365
366ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
367CFG_DDR_SIZE ?= 0x40000000
368CFG_NS_ENTRY_ADDR ?= 0x12000000
369CFG_UART_BASE ?= UART2_BASE
370endif
371
372ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
373CFG_NS_ENTRY_ADDR ?= 0x80800000
374CFG_DDR_SIZE ?= 0x40000000
375endif
376
377ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
378CFG_NS_ENTRY_ADDR ?= 0x80800000
379CFG_DDR_SIZE ?= 0x80000000
380endif
381
382ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
383CFG_DDR_SIZE ?= 0x80000000
384CFG_NS_ENTRY_ADDR ?= 0x80800000
385endif
386
387ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
388CFG_DDR_SIZE ?= 0x40000000
389CFG_NS_ENTRY_ADDR ?= 0x80800000
390endif
391
392ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
393CFG_DDR_SIZE ?= 0x40000000
394CFG_UART_BASE ?= UART1_BASE
395endif
396
397ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk mx6ulzevk))
398CFG_DDR_SIZE ?= 0x20000000
399CFG_NS_ENTRY_ADDR ?= 0x80800000
400endif
401
402ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
403CFG_DDR_SIZE ?= 0x10000000
404CFG_NS_ENTRY_ADDR ?= 0x80800000
405CFG_UART_BASE ?= UART5_BASE
406endif
407
408ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
409CFG_DDR_SIZE ?= 0x10000000
410CFG_NS_ENTRY_ADDR ?= 0x80800000
411endif
412
413ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccbv2))
414CFG_DDR_SIZE ?= 0x10000000
415CFG_UART_BASE ?= UART7_BASE
416endif
417
418ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mqevk))
419CFG_DDR_SIZE ?= 0xc0000000
420CFG_UART_BASE ?= UART1_BASE
421endif
422
423ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk))
424CFG_DDR_SIZE ?= 0x80000000
425CFG_UART_BASE ?= UART2_BASE
426endif
427
428ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mm_cl_iot_gate))
429CFG_DDR_SIZE ?= 0x40000000
430CFG_UART_BASE ?= UART3_BASE
431CFG_NSEC_DDR_1_BASE ?= 0x80000000UL
432CFG_NSEC_DDR_1_SIZE ?= 0x40000000UL
433endif
434
435ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mm_phyboard_polis))
436CFG_DDR_SIZE ?= 0x40000000
437CFG_UART_BASE ?= UART3_BASE
438$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
439$(call force,CFG_CORE_ARM64_PA_BITS,36)
440endif
441
442ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mm_phygate_tauri_l))
443CFG_DDR_SIZE ?= 0x80000000
444CFG_UART_BASE ?= UART3_BASE
445$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
446$(call force,CFG_CORE_ARM64_PA_BITS,36)
447endif
448
449ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk))
450CFG_DDR_SIZE ?= 0x80000000
451CFG_UART_BASE ?= UART2_BASE
452endif
453
454ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mpevk))
455CFG_DDR_SIZE ?= UL(0x180000000)
456CFG_UART_BASE ?= UART2_BASE
457$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
458$(call force,CFG_CORE_ARM64_PA_BITS,36)
459endif
460
461ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mp_libra_fpsc))
462CFG_DDR_SIZE ?= 0x40000000
463CFG_UART_BASE ?= UART4_BASE
464$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
465$(call force,CFG_CORE_ARM64_PA_BITS,36)
466endif
467
468ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mp_phyboard_pollux))
469CFG_DDR_SIZE ?= 0x40000000
470CFG_UART_BASE ?= UART1_BASE
471$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
472$(call force,CFG_CORE_ARM64_PA_BITS,36)
473endif
474
475ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mp_rsb3720_6g))
476CFG_DDR_SIZE ?= UL(0x180000000)
477CFG_UART_BASE ?= UART3_BASE
478CFG_TZDRAM_START ?= 0x56000000
479$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
480$(call force,CFG_CORE_ARM64_PA_BITS,36)
481endif
482
483ifneq (,$(filter $(PLATFORM_FLAVOR),mx8qxpmek mx8qmmek))
484CFG_DDR_SIZE ?= 0x80000000
485CFG_UART_BASE ?= UART0_BASE
486CFG_NSEC_DDR_1_BASE ?= 0x880000000UL
487CFG_NSEC_DDR_1_SIZE  ?= 0x380000000UL
488CFG_CORE_ARM64_PA_BITS ?= 40
489endif
490
491ifneq (,$(filter $(PLATFORM_FLAVOR),mx8dxmek))
492CFG_DDR_SIZE ?= 0x40000000
493CFG_UART_BASE ?= UART0_BASE
494$(call force,CFG_MX8DX,y)
495endif
496
497ifneq (,$(filter $(PLATFORM_FLAVOR),mx8dxlevk))
498CFG_DDR_SIZE ?= 0x40000000
499CFG_UART_BASE ?= UART0_BASE
500CFG_NSEC_DDR_1_BASE ?= 0x800000000UL
501CFG_NSEC_DDR_1_SIZE ?= 0x400000000UL
502CFG_CORE_ARM64_PA_BITS ?= 40
503endif
504
505ifneq (,$(filter $(PLATFORM_FLAVOR),mx8ulpevk))
506CFG_DDR_SIZE ?= 0x80000000
507CFG_UART_BASE ?= UART5_BASE
508endif
509
510ifneq (,$(filter $(PLATFORM_FLAVOR),mx93evk mx91evk))
511CFG_DDR_SIZE ?= 0x80000000
512CFG_UART_BASE ?= UART1_BASE
513endif
514
515ifneq (,$(filter $(PLATFORM_FLAVOR),mx95evk mx943evk))
516CFG_DDR_SIZE ?= 0x80000000
517CFG_UART_BASE ?= UART1_BASE
518CFG_NSEC_DDR_1_BASE ?= 0x100000000UL
519CFG_NSEC_DDR_1_SIZE ?= 0x380000000UL
520CFG_CORE_ARM64_PA_BITS ?= 40
521endif
522
523# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
524ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
525	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
526include core/arch/arm/cpu/cortex-a9.mk
527
528$(call force,CFG_PL310,y)
529
530CFG_PL310_LOCKED ?= y
531CFG_ENABLE_SCTLR_RR ?= y
532CFG_IMX_SCU ?= y
533endif
534
535ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
536CFG_DRAM_BASE ?= 0x10000000
537endif
538
539ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
540	$(CFG_MX6SX)))
541CFG_DRAM_BASE ?= 0x80000000
542endif
543
544ifeq ($(filter y, $(CFG_MX7)), y)
545CFG_INIT_CNTVOFF ?= y
546CFG_DRAM_BASE ?= 0x80000000
547endif
548
549ifeq ($(filter y, $(CFG_MX7ULP)), y)
550CFG_INIT_CNTVOFF ?= y
551CFG_DRAM_BASE ?= UL(0x60000000)
552$(call force,CFG_IMX_LPUART,y)
553$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
554endif
555
556ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
557$(call force,CFG_GIC,y)
558
559CFG_BOOT_SECONDARY_REQUEST ?= y
560CFG_DT ?= y
561CFG_DTB_MAX_SIZE ?= 0x20000
562CFG_PAGEABLE_ADDR ?= 0
563CFG_PSCI_ARM32 ?= y
564CFG_SECURE_TIME_SOURCE_REE ?= y
565CFG_UART_BASE ?= UART1_BASE
566endif
567
568ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX8M)))
569$(call force,CFG_IMX_UART,y)
570CFG_IMX_SNVS ?= y
571endif
572
573ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
574CFG_IMX_CSU ?= y
575endif
576
577ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
578CFG_HWSUPP_MEM_PERM_WXN = n
579CFG_IMX_WDOG ?= y
580endif
581
582ifeq ($(CFG_ARM64_core),y)
583# arm-v8 platforms
584include core/arch/arm/cpu/cortex-armv8-0.mk
585$(call force,CFG_ARM_GICV3,y)
586$(call force,CFG_GIC,y)
587$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
588$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
589
590CFG_CRYPTO_WITH_CE ?= y
591
592supported-ta-targets = ta_arm64
593endif
594
595CFG_TZDRAM_SIZE ?= 0x01e00000
596CFG_SHMEM_SIZE ?= 0x00200000
597CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - $(CFG_TZDRAM_SIZE) - $(CFG_SHMEM_SIZE) + $(CFG_DDR_SIZE))
598CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
599
600# Enable embedded tests by default
601CFG_ENABLE_EMBEDDED_TESTS ?= y
602CFG_ATTESTATION_PTA ?= y
603
604# Set default heap size for imx platforms to 128k
605CFG_CORE_HEAP_SIZE ?= 131072
606
607CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
608CFG_MMAP_REGIONS ?= 24
609
610# SE05X and OCOTP both implement tee_otp_get_die_id()
611ifeq ($(CFG_NXP_SE05X),y)
612$(call force,CFG_IMX_OCOTP,n)
613$(call force,CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID,n)
614endif
615CFG_IMX_OCOTP ?= y
616CFG_IMX_DIGPROG ?= y
617CFG_PKCS11_TA ?= y
618CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID ?= y
619
620# Almost all platforms include CAAM HW Modules, except the
621# ones forced to be disabled
622CFG_NXP_CAAM ?= n
623
624ifeq ($(CFG_NXP_CAAM),y)
625ifeq ($(filter y, $(CFG_MX8QM) $(CFG_MX8QX) $(CFG_MX8DXL)), y)
626CFG_IMX_SC ?= y
627CFG_IMX_MU ?= y
628endif
629
630else
631
632ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
633CFG_IMX_CAAM ?= y
634endif
635
636endif
637