xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision 64de482ec1a4cab6835e439729bac08ab8ef6651) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8
9mx6ull-flavorlist = \
10	mx6ullevk \
11
12mx6q-flavorlist = \
13	mx6qsabrelite \
14	mx6qsabreauto \
15	mx6qsabresd \
16	mx6qhmbedge \
17
18mx6qp-flavorlist = \
19	mx6qpsabreauto \
20	mx6qpsabresd \
21
22mx6sl-flavorlist = \
23	mx6slevk
24
25mx6sx-flavorlist = \
26	mx6sxsabreauto \
27	mx6sxsabresd \
28	mx6sxudooneofull \
29
30mx6d-flavorlist = \
31	mx6dhmbedge \
32
33mx6dl-flavorlist = \
34	mx6dlsabreauto \
35	mx6dlsabresd \
36	mx6dlhmbedge \
37
38mx6s-flavorlist = \
39	mx6shmbedge \
40	mx6solosabresd \
41	mx6solosabreauto \
42
43mx7d-flavorlist = \
44	mx7dsabresd \
45	mx7dpico_mbl \
46	mx7dclsom \
47
48mx7s-flavorlist = \
49	mx7swarp7 \
50	mx7swarp7_mbl \
51
52imx8mq-flavorlist = \
53	imx8mqevk
54
55imx8mm-flavorlist = \
56	imx8mmevk
57
58ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
59$(call force,CFG_MX6,y)
60$(call force,CFG_MX6UL,y)
61$(call force,CFG_TEE_CORE_NB_CORE,1)
62include core/arch/arm/cpu/cortex-a7.mk
63else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
64$(call force,CFG_MX6,y)
65$(call force,CFG_MX6ULL,y)
66$(call force,CFG_TEE_CORE_NB_CORE,1)
67$(call force,CFG_IMX_CAAM,n)
68include core/arch/arm/cpu/cortex-a7.mk
69else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
70$(call force,CFG_MX6,y)
71$(call force,CFG_MX6Q,y)
72$(call force,CFG_TEE_CORE_NB_CORE,4)
73else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
74$(call force,CFG_MX6,y)
75$(call force,CFG_MX6QP,y)
76$(call force,CFG_TEE_CORE_NB_CORE,4)
77else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
78$(call force,CFG_MX6,y)
79$(call force,CFG_MX6D,y)
80$(call force,CFG_TEE_CORE_NB_CORE,2)
81else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
82$(call force,CFG_MX6,y)
83$(call force,CFG_MX6DL,y)
84$(call force,CFG_TEE_CORE_NB_CORE,2)
85else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
86$(call force,CFG_MX6,y)
87$(call force,CFG_MX6S,y)
88$(call force,CFG_TEE_CORE_NB_CORE,1)
89else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
90$(call force,CFG_MX6,y)
91$(call force,CFG_MX6SL,y)
92$(call force,CFG_TEE_CORE_NB_CORE,1)
93$(call force,CFG_IMX_CAAM,n)
94else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
95$(call force,CFG_MX6,y)
96$(call force,CFG_MX6SX,y)
97$(call force,CFG_TEE_CORE_NB_CORE,1)
98else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
99$(call force,CFG_MX7,y)
100$(call force,CFG_TEE_CORE_NB_CORE,1)
101include core/arch/arm/cpu/cortex-a7.mk
102else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
103$(call force,CFG_MX7,y)
104$(call force,CFG_TEE_CORE_NB_CORE,2)
105include core/arch/arm/cpu/cortex-a7.mk
106else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mq-flavorlist)))
107$(call force,CFG_IMX8MQ,y)
108$(call force,CFG_ARM64_core,y)
109CFG_IMX_UART ?= y
110CFG_DRAM_BASE ?= 0x40000000
111CFG_TEE_CORE_NB_CORE ?= 4
112else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mm-flavorlist)))
113$(call force,CFG_IMX8MM,y)
114$(call force,CFG_ARM64_core,y)
115CFG_IMX_UART ?= y
116CFG_DRAM_BASE ?= 0x40000000
117CFG_TEE_CORE_NB_CORE ?= 4
118else
119$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
120endif
121
122ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
123CFG_DDR_SIZE ?= 0x40000000
124CFG_NS_ENTRY_ADDR ?= 0x80800000
125endif
126
127ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
128CFG_DDR_SIZE ?= 0x40000000
129CFG_UART_BASE ?= UART1_BASE
130endif
131
132ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
133CFG_DDR_SIZE ?= 0x20000000
134CFG_NS_ENTRY_ADDR ?= 0x87800000
135CFG_DT_ADDR ?= 0x83100000
136CFG_UART_BASE ?= UART5_BASE
137CFG_BOOT_SECONDARY_REQUEST ?= n
138CFG_EXTERNAL_DTB_OVERLAY ?= y
139CFG_IMX_WDOG_EXT_RESET ?= y
140endif
141
142ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
143CFG_DDR_SIZE ?= 0x20000000
144CFG_NS_ENTRY_ADDR ?= 0x80800000
145CFG_BOOT_SECONDARY_REQUEST ?= n
146endif
147
148ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
149CFG_DDR_SIZE ?= 0x20000000
150CFG_NS_ENTRY_ADDR ?= 0x87800000
151CFG_DT_ADDR ?= 0x83100000
152CFG_BOOT_SECONDARY_REQUEST ?= n
153CFG_EXTERNAL_DTB_OVERLAY = y
154CFG_IMX_WDOG_EXT_RESET = y
155endif
156
157ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
158	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd))
159CFG_DDR_SIZE ?= 0x40000000
160CFG_NS_ENTRY_ADDR ?= 0x12000000
161endif
162
163ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
164	mx6dlsabreauto mx6solosabreauto))
165CFG_DDR_SIZE ?= 0x80000000
166CFG_NS_ENTRY_ADDR ?= 0x12000000
167endif
168
169ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
170CFG_DDR_SIZE ?= 0x80000000
171CFG_UART_BASE ?= UART1_BASE
172endif
173
174ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
175CFG_DDR_SIZE ?= 0x40000000
176CFG_NS_ENTRY_ADDR ?= 0x12000000
177endif
178
179ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
180CFG_DDR_SIZE ?= 0x40000000
181CFG_NS_ENTRY_ADDR ?= 0x12000000
182CFG_UART_BASE ?= UART2_BASE
183endif
184
185ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
186CFG_NS_ENTRY_ADDR ?= 0x80800000
187CFG_DDR_SIZE ?= 0x40000000
188endif
189
190ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
191CFG_DDR_SIZE ?= 0x80000000
192CFG_NS_ENTRY_ADDR ?= 0x80800000
193endif
194
195ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
196CFG_DDR_SIZE ?= 0x40000000
197CFG_NS_ENTRY_ADDR ?= 0x80800000
198endif
199
200ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
201CFG_DDR_SIZE ?= 0x40000000
202CFG_UART_BASE ?= UART1_BASE
203endif
204
205ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk))
206CFG_DDR_SIZE ?= 0x20000000
207CFG_NS_ENTRY_ADDR ?= 0x80800000
208endif
209
210ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
211CFG_DDR_SIZE ?= 0x10000000
212CFG_NS_ENTRY_ADDR ?= 0x80800000
213CFG_UART_BASE ?= UART5_BASE
214endif
215
216ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
217CFG_DDR_SIZE ?= 0x10000000
218CFG_NS_ENTRY_ADDR ?= 0x80800000
219endif
220
221ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mqevk))
222CFG_DDR_SIZE ?= 0xc0000000
223CFG_UART_BASE ?= UART1_BASE
224endif
225
226ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mmevk))
227CFG_DDR_SIZE ?= 0x80000000
228CFG_UART_BASE ?= UART2_BASE
229endif
230
231# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
232ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
233      $(CFG_MX6SL) $(CFG_MX6SX)), y)
234include core/arch/arm/cpu/cortex-a9.mk
235
236$(call force,CFG_PL310,y)
237
238CFG_PL310_LOCKED ?= y
239CFG_ENABLE_SCTLR_RR ?= y
240CFG_SCU ?= y
241endif
242
243ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
244CFG_DRAM_BASE ?= 0x10000000
245endif
246
247ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SX)))
248CFG_DRAM_BASE ?= 0x80000000
249endif
250
251ifeq ($(filter y, $(CFG_MX7)), y)
252CFG_INIT_CNTVOFF ?= y
253CFG_DRAM_BASE ?= 0x80000000
254endif
255
256ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
257$(call force,CFG_GENERIC_BOOT,y)
258$(call force,CFG_GIC,y)
259$(call force,CFG_IMX_UART,y)
260$(call force,CFG_PM_STUBS,y)
261$(call force,CFG_WITH_SOFTWARE_PRNG,y)
262
263CFG_BOOT_SYNC_CPU ?= n
264CFG_BOOT_SECONDARY_REQUEST ?= y
265CFG_DT ?= y
266CFG_PAGEABLE_ADDR ?= 0
267CFG_PSCI_ARM32 ?= y
268CFG_SECURE_TIME_SOURCE_REE ?= y
269CFG_CSU ?= y
270CFG_UART_BASE ?= UART1_BASE
271CFG_IMX_CAAM ?= y
272endif
273
274ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
275CFG_HWSUPP_MEM_PERM_WXN = n
276CFG_IMX_WDOG ?= y
277endif
278
279ifeq ($(CFG_ARM64_core),y)
280# arm-v8 platforms
281include core/arch/arm/cpu/cortex-armv8-0.mk
282$(call force,CFG_ARM_GICV3,y)
283$(call force,CFG_GENERIC_BOOT,y)
284$(call force,CFG_GIC,y)
285$(call force,CFG_WITH_LPAE,y)
286$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
287$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
288
289CFG_CRYPTO_WITH_CE ?= y
290CFG_PM_STUBS ?= y
291
292supported-ta-targets = ta_arm64
293endif
294
295CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
296CFG_TZDRAM_SIZE ?= 0x01e00000
297CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
298CFG_SHMEM_SIZE ?= 0x00200000
299
300CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
301CFG_WITH_STACK_CANARIES ?= y
302CFG_MMAP_REGIONS ?= 24
303