xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision 6230dd0f07e25e5c026d3817d48df2f59d443ab4)
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ulccimx6ulsbcpro \
7
8mx6ull-flavorlist = \
9	mx6ullevk \
10
11mx6q-flavorlist = \
12	mx6qsabrelite \
13	mx6qsabresd \
14	mx6qhmbedge \
15
16mx6sx-flavorlist = \
17	mx6sxsabreauto \
18	mx6sxudooneofull \
19
20mx6d-flavorlist = \
21	mx6dhmbedge \
22
23mx6dl-flavorlist = \
24	mx6dlsabresd \
25	mx6dlhmbedge \
26
27mx6s-flavorlist = \
28	mx6shmbedge \
29
30mx7-flavorlist = \
31	mx7dsabresd \
32	mx7dpico_mbl \
33	mx7swarp7 \
34	mx7swarp7_mbl \
35	mx7dclsom \
36
37imx8mq-flavorlist = \
38	imx8mqevk
39
40imx8mm-flavorlist = \
41	imx8mmevk
42
43ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
44$(call force,CFG_MX6,y)
45$(call force,CFG_MX6UL,y)
46$(call force,CFG_TEE_CORE_NB_CORE,1)
47include core/arch/arm/cpu/cortex-a7.mk
48else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
49$(call force,CFG_MX6,y)
50$(call force,CFG_MX6ULL,y)
51$(call force,CFG_TEE_CORE_NB_CORE,1)
52$(call force,CFG_IMX_CAAM,n)
53include core/arch/arm/cpu/cortex-a7.mk
54else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
55$(call force,CFG_MX6,y)
56$(call force,CFG_MX6Q,y)
57$(call force,CFG_TEE_CORE_NB_CORE,4)
58else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
59$(call force,CFG_MX6,y)
60$(call force,CFG_MX6D,y)
61$(call force,CFG_TEE_CORE_NB_CORE,2)
62else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
63$(call force,CFG_MX6,y)
64$(call force,CFG_MX6DL,y)
65$(call force,CFG_TEE_CORE_NB_CORE,2)
66else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
67$(call force,CFG_MX6,y)
68$(call force,CFG_MX6S,y)
69$(call force,CFG_TEE_CORE_NB_CORE,1)
70else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
71$(call force,CFG_MX6,y)
72$(call force,CFG_MX6SX,y)
73$(call force,CFG_TEE_CORE_NB_CORE,1)
74else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7-flavorlist)))
75$(call force,CFG_MX7,y)
76CFG_TEE_CORE_NB_CORE ?= 2
77include core/arch/arm/cpu/cortex-a7.mk
78else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mq-flavorlist)))
79$(call force,CFG_IMX8MQ,y)
80$(call force,CFG_ARM64_core,y)
81CFG_IMX_UART ?= y
82CFG_DRAM_BASE ?= 0x40000000
83CFG_TEE_CORE_NB_CORE ?= 4
84else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mm-flavorlist)))
85$(call force,CFG_IMX8MM,y)
86$(call force,CFG_ARM64_core,y)
87CFG_IMX_UART ?= y
88CFG_DRAM_BASE ?= 0x40000000
89CFG_TEE_CORE_NB_CORE ?= 4
90else
91$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
92endif
93
94ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
95CFG_DDR_SIZE ?= 0x40000000
96CFG_NS_ENTRY_ADDR ?= 0x80800000
97$(call force,CFG_TEE_CORE_NB_CORE,2)
98endif
99
100ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
101CFG_DDR_SIZE ?= 0x40000000
102CFG_UART_BASE ?= UART1_BASE
103endif
104
105ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
106CFG_DDR_SIZE ?= 0x20000000
107CFG_NS_ENTRY_ADDR ?= 0x87800000
108CFG_DT_ADDR ?= 0x83100000
109CFG_UART_BASE ?= UART5_BASE
110CFG_BOOT_SECONDARY_REQUEST ?= n
111CFG_EXTERNAL_DTB_OVERLAY ?= y
112CFG_IMX_WDOG_EXT_RESET ?= y
113$(call force,CFG_TEE_CORE_NB_CORE,2)
114endif
115
116ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
117CFG_DDR_SIZE ?= 0x20000000
118CFG_NS_ENTRY_ADDR ?= 0x80800000
119CFG_BOOT_SECONDARY_REQUEST ?= n
120$(call force,CFG_TEE_CORE_NB_CORE,1)
121endif
122
123ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
124CFG_DDR_SIZE ?= 0x20000000
125CFG_NS_ENTRY_ADDR ?= 0x87800000
126CFG_DT_ADDR ?= 0x83100000
127CFG_BOOT_SECONDARY_REQUEST ?= n
128CFG_EXTERNAL_DTB_OVERLAY = y
129CFG_IMX_WDOG_EXT_RESET = y
130$(call force,CFG_TEE_CORE_NB_CORE,1)
131endif
132
133ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabresd mx6dlsabresd \
134	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge))
135CFG_DDR_SIZE ?= 0x40000000
136CFG_NS_ENTRY_ADDR ?= 0x12000000
137endif
138
139ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
140CFG_DDR_SIZE ?= 0x80000000
141CFG_UART_BASE ?= UART1_BASE
142endif
143
144ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
145CFG_DDR_SIZE ?= 0x40000000
146CFG_NS_ENTRY_ADDR ?= 0x12000000
147endif
148
149ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
150CFG_DDR_SIZE ?= 0x40000000
151CFG_NS_ENTRY_ADDR ?= 0x12000000
152CFG_UART_BASE ?= UART2_BASE
153endif
154
155ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
156CFG_DDR_SIZE ?= 0x80000000
157CFG_NS_ENTRY_ADDR ?= 0x80800000
158endif
159
160ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
161CFG_DDR_SIZE ?= 0x40000000
162CFG_UART_BASE ?= UART1_BASE
163endif
164
165ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk))
166CFG_DDR_SIZE ?= 0x20000000
167CFG_NS_ENTRY_ADDR ?= 0x80800000
168endif
169
170ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
171CFG_DDR_SIZE ?= 0x10000000
172CFG_NS_ENTRY_ADDR ?= 0x80800000
173CFG_UART_BASE ?= UART5_BASE
174endif
175
176ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mqevk))
177CFG_DDR_SIZE ?= 0xc0000000
178CFG_UART_BASE ?= UART1_BASE
179endif
180
181ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mmevk))
182CFG_DDR_SIZE ?= 0x80000000
183CFG_UART_BASE ?= UART2_BASE
184endif
185
186# i.MX6 Solo/SoloX/DualLite/Dual/Quad specific config
187ifeq ($(filter y, $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
188      $(CFG_MX6SX)), y)
189include core/arch/arm/cpu/cortex-a9.mk
190
191$(call force,CFG_PL310,y)
192
193CFG_PL310_LOCKED ?= y
194CFG_ENABLE_SCTLR_RR ?= y
195CFG_SCU ?= y
196endif
197
198ifeq ($(filter y, $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
199CFG_DRAM_BASE ?= 0x10000000
200endif
201
202ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SX)))
203CFG_DRAM_BASE ?= 0x80000000
204endif
205
206ifeq ($(filter y, $(CFG_MX7)), y)
207CFG_INIT_CNTVOFF ?= y
208CFG_DRAM_BASE ?= 0x80000000
209endif
210
211ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
212$(call force,CFG_GENERIC_BOOT,y)
213$(call force,CFG_GIC,y)
214$(call force,CFG_IMX_UART,y)
215$(call force,CFG_PM_STUBS,y)
216$(call force,CFG_WITH_SOFTWARE_PRNG,y)
217
218CFG_BOOT_SYNC_CPU ?= n
219CFG_BOOT_SECONDARY_REQUEST ?= y
220CFG_DT ?= y
221CFG_PAGEABLE_ADDR ?= 0
222CFG_PSCI_ARM32 ?= y
223CFG_SECURE_TIME_SOURCE_REE ?= y
224CFG_CSU ?= y
225CFG_UART_BASE ?= UART1_BASE
226CFG_IMX_CAAM ?= y
227endif
228
229ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
230CFG_HWSUPP_MEM_PERM_WXN = n
231CFG_IMX_WDOG ?= y
232endif
233
234ifeq ($(CFG_ARM64_core),y)
235# arm-v8 platforms
236include core/arch/arm/cpu/cortex-armv8-0.mk
237$(call force,CFG_ARM_GICV3,y)
238$(call force,CFG_GENERIC_BOOT,y)
239$(call force,CFG_GIC,y)
240$(call force,CFG_WITH_LPAE,y)
241$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
242$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
243
244CFG_CRYPTO_WITH_CE ?= y
245CFG_PM_STUBS ?= y
246
247supported-ta-targets = ta_arm64
248endif
249
250CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
251CFG_TZDRAM_SIZE ?= 0x01e00000
252CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
253CFG_SHMEM_SIZE ?= 0x00200000
254
255CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
256CFG_WITH_STACK_CANARIES ?= y
257CFG_MMAP_REGIONS ?= 24
258