1PLATFORM_FLAVOR ?= mx6ulevk 2 3# Get SoC associated with the PLATFORM_FLAVOR 4mx6ul-flavorlist = \ 5 mx6ulevk \ 6 mx6ul9x9evk \ 7 mx6ulccimx6ulsbcpro \ 8 mx6ulccbv2 \ 9 10mx6ull-flavorlist = \ 11 mx6ullevk \ 12 mx6ulzevk \ 13 14mx6q-flavorlist = \ 15 mx6qsabrelite \ 16 mx6qsabreauto \ 17 mx6qsabresd \ 18 mx6qhmbedge \ 19 mx6qapalis \ 20 21mx6qp-flavorlist = \ 22 mx6qpsabreauto \ 23 mx6qpsabresd \ 24 25mx6sl-flavorlist = \ 26 mx6slevk 27 28mx6sll-flavorlist = \ 29 mx6sllevk 30 31mx6sx-flavorlist = \ 32 mx6sxsabreauto \ 33 mx6sxsabresd \ 34 mx6sxudooneofull \ 35 36mx6d-flavorlist = \ 37 mx6dhmbedge \ 38 mx6dapalis \ 39 40mx6dl-flavorlist = \ 41 mx6dlsabreauto \ 42 mx6dlsabresd \ 43 mx6dlhmbedge \ 44 45mx6s-flavorlist = \ 46 mx6shmbedge \ 47 mx6solosabresd \ 48 mx6solosabreauto \ 49 50mx7d-flavorlist = \ 51 mx7dsabresd \ 52 mx7dpico_mbl \ 53 mx7dclsom \ 54 55mx7s-flavorlist = \ 56 mx7swarp7 \ 57 mx7swarp7_mbl \ 58 59mx7ulp-flavorlist = \ 60 mx7ulpevk 61 62mx8mq-flavorlist = \ 63 mx8mqevk 64 65mx8mm-flavorlist = \ 66 mx8mmevk \ 67 mx8mm_cl_iot_gate 68 69mx8mn-flavorlist = \ 70 mx8mnevk 71 72mx8mp-flavorlist = \ 73 mx8mpevk \ 74 mx8mp_rsb3720_6g \ 75 mx8mp_phyboard_pollux 76 77mx8qm-flavorlist = \ 78 mx8qmmek \ 79 80mx8qx-flavorlist = \ 81 mx8qxpmek \ 82 mx8dxmek \ 83 84mx8dxl-flavorlist = \ 85 mx8dxlevk \ 86 87mx8ulp-flavorlist = \ 88 mx8ulpevk \ 89 90mx93-flavorlist = \ 91 mx93evk \ 92 93mx95-flavorlist = \ 94 mx95evk \ 95 96mx91-flavorlist = \ 97 mx91evk \ 98 99ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist))) 100$(call force,CFG_MX6,y) 101$(call force,CFG_MX6UL,y) 102$(call force,CFG_TEE_CORE_NB_CORE,1) 103$(call force,CFG_TZC380,y) 104include core/arch/arm/cpu/cortex-a7.mk 105else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist))) 106$(call force,CFG_MX6,y) 107$(call force,CFG_MX6ULL,y) 108$(call force,CFG_TEE_CORE_NB_CORE,1) 109$(call force,CFG_TZC380,y) 110$(call force,CFG_IMX_CAAM,n) 111$(call force,CFG_NXP_CAAM,n) 112$(call force,CFG_IMX_DCP,y) 113include core/arch/arm/cpu/cortex-a7.mk 114else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist))) 115$(call force,CFG_MX6,y) 116$(call force,CFG_MX6Q,y) 117$(call force,CFG_TEE_CORE_NB_CORE,4) 118$(call force,CFG_TZC380,y) 119else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist))) 120$(call force,CFG_MX6,y) 121$(call force,CFG_MX6QP,y) 122$(call force,CFG_TEE_CORE_NB_CORE,4) 123else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist))) 124$(call force,CFG_MX6,y) 125$(call force,CFG_MX6D,y) 126$(call force,CFG_TEE_CORE_NB_CORE,2) 127$(call force,CFG_TZC380,y) 128else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist))) 129$(call force,CFG_MX6,y) 130$(call force,CFG_MX6DL,y) 131$(call force,CFG_TEE_CORE_NB_CORE,2) 132$(call force,CFG_TZC380,y) 133else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist))) 134$(call force,CFG_MX6,y) 135$(call force,CFG_MX6S,y) 136$(call force,CFG_TEE_CORE_NB_CORE,1) 137else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist))) 138$(call force,CFG_MX6,y) 139$(call force,CFG_MX6SL,y) 140$(call force,CFG_TEE_CORE_NB_CORE,1) 141$(call force,CFG_IMX_CAAM,n) 142$(call force,CFG_NXP_CAAM,n) 143$(call force,CFG_IMX_DCP,y) 144else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist))) 145$(call force,CFG_MX6,y) 146$(call force,CFG_MX6SLL,y) 147$(call force,CFG_TEE_CORE_NB_CORE,1) 148$(call force,CFG_IMX_CAAM,n) 149$(call force,CFG_NXP_CAAM,n) 150$(call force,CFG_IMX_DCP,y) 151$(call force,CFG_NO_SMP,y) 152else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist))) 153$(call force,CFG_MX6,y) 154$(call force,CFG_MX6SX,y) 155$(call force,CFG_TEE_CORE_NB_CORE,1) 156else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist))) 157$(call force,CFG_MX7,y) 158$(call force,CFG_TEE_CORE_NB_CORE,1) 159include core/arch/arm/cpu/cortex-a7.mk 160else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist))) 161$(call force,CFG_MX7,y) 162$(call force,CFG_TEE_CORE_NB_CORE,2) 163include core/arch/arm/cpu/cortex-a7.mk 164else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist))) 165$(call force,CFG_MX7ULP,y) 166$(call force,CFG_TEE_CORE_NB_CORE,1) 167$(call force,CFG_TZC380,n) 168$(call force,CFG_IMX_CSU,n) 169include core/arch/arm/cpu/cortex-a7.mk 170else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mq-flavorlist))) 171$(call force,CFG_MX8MQ,y) 172$(call force,CFG_MX8M,y) 173$(call force,CFG_ARM64_core,y) 174$(call force,CFG_TZC380,y) 175CFG_DRAM_BASE ?= 0x40000000 176CFG_TEE_CORE_NB_CORE ?= 4 177else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist))) 178$(call force,CFG_MX8MM,y) 179$(call force,CFG_MX8M,y) 180$(call force,CFG_ARM64_core,y) 181$(call force,CFG_TZC380,y) 182CFG_DRAM_BASE ?= 0x40000000 183CFG_TEE_CORE_NB_CORE ?= 4 184else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mn-flavorlist))) 185$(call force,CFG_MX8MN,y) 186$(call force,CFG_MX8M,y) 187$(call force,CFG_ARM64_core,y) 188$(call force,CFG_TZC380,y) 189CFG_DRAM_BASE ?= 0x40000000 190CFG_TEE_CORE_NB_CORE ?= 4 191else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mp-flavorlist))) 192$(call force,CFG_MX8MP,y) 193$(call force,CFG_MX8M,y) 194$(call force,CFG_ARM64_core,y) 195$(call force,CFG_TZC380,y) 196CFG_DRAM_BASE ?= 0x40000000 197CFG_TEE_CORE_NB_CORE ?= 4 198else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist))) 199$(call force,CFG_MX8QM,y) 200$(call force,CFG_ARM64_core,y) 201$(call force,CFG_IMX_SNVS,n) 202CFG_IMX_LPUART ?= y 203CFG_DRAM_BASE ?= 0x80000000 204CFG_TEE_CORE_NB_CORE ?= 6 205$(call force,CFG_IMX_OCOTP,n) 206else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qx-flavorlist))) 207$(call force,CFG_MX8QX,y) 208$(call force,CFG_ARM64_core,y) 209$(call force,CFG_IMX_SNVS,n) 210CFG_IMX_LPUART ?= y 211CFG_DRAM_BASE ?= 0x80000000 212CFG_TEE_CORE_NB_CORE ?= 4 213$(call force,CFG_IMX_OCOTP,n) 214else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8dxl-flavorlist))) 215$(call force,CFG_MX8DXL,y) 216$(call force,CFG_ARM64_core,y) 217$(call force,CFG_IMX_SNVS,n) 218CFG_IMX_LPUART ?= y 219CFG_DRAM_BASE ?= 0x80000000 220$(call force,CFG_TEE_CORE_NB_CORE,2) 221$(call force,CFG_IMX_OCOTP,n) 222else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8ulp-flavorlist))) 223$(call force,CFG_MX8ULP,y) 224$(call force,CFG_ARM64_core,y) 225CFG_IMX_LPUART ?= y 226CFG_DRAM_BASE ?= 0x80000000 227CFG_TEE_CORE_NB_CORE ?= 2 228$(call force,CFG_NXP_SNVS,n) 229$(call force,CFG_IMX_OCOTP,n) 230CFG_IMX_MU ?= y 231CFG_IMX_ELE ?= y 232else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx93-flavorlist))) 233$(call force,CFG_MX93,y) 234$(call force,CFG_ARM64_core,y) 235CFG_IMX_LPUART ?= y 236CFG_DRAM_BASE ?= 0x80000000 237CFG_TEE_CORE_NB_CORE ?= 2 238$(call force,CFG_NXP_SNVS,n) 239$(call force,CFG_IMX_OCOTP,n) 240$(call force,CFG_TZC380,n) 241$(call force,CFG_CRYPTO_DRIVER,n) 242$(call force,CFG_NXP_CAAM,n) 243CFG_IMX_MU ?= y 244CFG_IMX_ELE ?= y 245else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx95-flavorlist))) 246$(call force,CFG_MX95,y) 247$(call force,CFG_ARM64_core,y) 248CFG_IMX_LPUART ?= y 249CFG_DRAM_BASE ?= 0x80000000 250CFG_TEE_CORE_NB_CORE ?= 6 251$(call force,CFG_NXP_SNVS,n) 252$(call force,CFG_IMX_OCOTP,n) 253$(call force,CFG_TZC380,n) 254$(call force,CFG_NXP_CAAM,n) 255else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx91-flavorlist))) 256$(call force,CFG_MX91,y) 257$(call force,CFG_ARM64_core,y) 258CFG_IMX_LPUART ?= y 259CFG_DRAM_BASE ?= 0x80000000 260CFG_TEE_CORE_NB_CORE ?= 1 261$(call force,CFG_NXP_SNVS,n) 262$(call force,CFG_IMX_OCOTP,n) 263$(call force,CFG_TZC380,n) 264$(call force,CFG_NXP_CAAM,n) 265CFG_IMX_MU ?= y 266CFG_IMX_ELE ?= y 267else 268$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)") 269endif 270 271ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd)) 272CFG_DDR_SIZE ?= 0x40000000 273CFG_NS_ENTRY_ADDR ?= 0x80800000 274CFG_IMX_WDOG_EXT_RESET ?= y 275endif 276 277ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom)) 278CFG_DDR_SIZE ?= 0x40000000 279CFG_UART_BASE ?= UART1_BASE 280CFG_IMX_WDOG_EXT_RESET ?= y 281endif 282 283ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl)) 284CFG_DDR_SIZE ?= 0x20000000 285CFG_NS_ENTRY_ADDR ?= 0x87800000 286CFG_DT_ADDR ?= 0x83100000 287CFG_UART_BASE ?= UART5_BASE 288CFG_BOOT_SECONDARY_REQUEST ?= n 289CFG_EXTERNAL_DTB_OVERLAY ?= y 290CFG_IMX_WDOG_EXT_RESET ?= y 291endif 292 293ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7)) 294CFG_DDR_SIZE ?= 0x20000000 295CFG_NS_ENTRY_ADDR ?= 0x80800000 296CFG_BOOT_SECONDARY_REQUEST ?= n 297endif 298 299ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl)) 300CFG_DDR_SIZE ?= 0x20000000 301CFG_NS_ENTRY_ADDR ?= 0x87800000 302CFG_DT_ADDR ?= 0x83100000 303CFG_BOOT_SECONDARY_REQUEST ?= n 304CFG_EXTERNAL_DTB_OVERLAY = y 305CFG_IMX_WDOG_EXT_RESET = y 306endif 307 308ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk)) 309CFG_DDR_SIZE ?= 0x40000000 310CFG_NS_ENTRY_ADDR ?= 0x60800000 311CFG_UART_BASE ?= UART4_BASE 312endif 313 314ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \ 315 mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd \ 316 mx6dapalis mx6qapalis)) 317CFG_DDR_SIZE ?= 0x40000000 318CFG_NS_ENTRY_ADDR ?= 0x12000000 319endif 320 321ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \ 322 mx6dlsabreauto mx6solosabreauto)) 323CFG_DDR_SIZE ?= 0x80000000 324CFG_NS_ENTRY_ADDR ?= 0x12000000 325CFG_UART_BASE ?= UART4_BASE 326endif 327 328ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge)) 329CFG_DDR_SIZE ?= 0x80000000 330CFG_UART_BASE ?= UART1_BASE 331endif 332 333ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge)) 334CFG_DDR_SIZE ?= 0x40000000 335CFG_NS_ENTRY_ADDR ?= 0x12000000 336endif 337 338ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite)) 339CFG_DDR_SIZE ?= 0x40000000 340CFG_NS_ENTRY_ADDR ?= 0x12000000 341CFG_UART_BASE ?= UART2_BASE 342endif 343 344ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk)) 345CFG_NS_ENTRY_ADDR ?= 0x80800000 346CFG_DDR_SIZE ?= 0x40000000 347endif 348 349ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk)) 350CFG_NS_ENTRY_ADDR ?= 0x80800000 351CFG_DDR_SIZE ?= 0x80000000 352endif 353 354ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto)) 355CFG_DDR_SIZE ?= 0x80000000 356CFG_NS_ENTRY_ADDR ?= 0x80800000 357endif 358 359ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd)) 360CFG_DDR_SIZE ?= 0x40000000 361CFG_NS_ENTRY_ADDR ?= 0x80800000 362endif 363 364ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull) 365CFG_DDR_SIZE ?= 0x40000000 366CFG_UART_BASE ?= UART1_BASE 367endif 368 369ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk mx6ulzevk)) 370CFG_DDR_SIZE ?= 0x20000000 371CFG_NS_ENTRY_ADDR ?= 0x80800000 372endif 373 374ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro)) 375CFG_DDR_SIZE ?= 0x10000000 376CFG_NS_ENTRY_ADDR ?= 0x80800000 377CFG_UART_BASE ?= UART5_BASE 378endif 379 380ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk)) 381CFG_DDR_SIZE ?= 0x10000000 382CFG_NS_ENTRY_ADDR ?= 0x80800000 383endif 384 385ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccbv2)) 386CFG_DDR_SIZE ?= 0x10000000 387CFG_UART_BASE ?= UART7_BASE 388endif 389 390ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mqevk)) 391CFG_DDR_SIZE ?= 0xc0000000 392CFG_UART_BASE ?= UART1_BASE 393endif 394 395ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk)) 396CFG_DDR_SIZE ?= 0x80000000 397CFG_UART_BASE ?= UART2_BASE 398endif 399 400ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mm_cl_iot_gate)) 401CFG_DDR_SIZE ?= 0x40000000 402CFG_UART_BASE ?= UART3_BASE 403CFG_NSEC_DDR_1_BASE ?= 0x80000000UL 404CFG_NSEC_DDR_1_SIZE ?= 0x40000000UL 405endif 406 407ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk)) 408CFG_DDR_SIZE ?= 0x80000000 409CFG_UART_BASE ?= UART2_BASE 410endif 411 412ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mpevk)) 413CFG_DDR_SIZE ?= UL(0x180000000) 414CFG_UART_BASE ?= UART2_BASE 415$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 416$(call force,CFG_CORE_ARM64_PA_BITS,36) 417endif 418 419ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mp_phyboard_pollux)) 420CFG_DDR_SIZE ?= 0x80000000 421CFG_UART_BASE ?= UART1_BASE 422$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 423$(call force,CFG_CORE_ARM64_PA_BITS,36) 424endif 425 426ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mp_rsb3720_6g)) 427CFG_DDR_SIZE ?= UL(0x180000000) 428CFG_UART_BASE ?= UART3_BASE 429CFG_TZDRAM_START ?= 0x56000000 430$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 431$(call force,CFG_CORE_ARM64_PA_BITS,36) 432endif 433 434ifneq (,$(filter $(PLATFORM_FLAVOR),mx8qxpmek mx8qmmek)) 435CFG_DDR_SIZE ?= 0x80000000 436CFG_UART_BASE ?= UART0_BASE 437CFG_NSEC_DDR_1_BASE ?= 0x880000000UL 438CFG_NSEC_DDR_1_SIZE ?= 0x380000000UL 439CFG_CORE_ARM64_PA_BITS ?= 40 440endif 441 442ifneq (,$(filter $(PLATFORM_FLAVOR),mx8dxmek)) 443CFG_DDR_SIZE ?= 0x40000000 444CFG_UART_BASE ?= UART0_BASE 445$(call force,CFG_MX8DX,y) 446endif 447 448ifneq (,$(filter $(PLATFORM_FLAVOR),mx8dxlevk)) 449CFG_DDR_SIZE ?= 0x40000000 450CFG_UART_BASE ?= UART0_BASE 451CFG_NSEC_DDR_1_BASE ?= 0x800000000UL 452CFG_NSEC_DDR_1_SIZE ?= 0x400000000UL 453CFG_CORE_ARM64_PA_BITS ?= 40 454endif 455 456ifneq (,$(filter $(PLATFORM_FLAVOR),mx8ulpevk)) 457CFG_DDR_SIZE ?= 0x80000000 458CFG_UART_BASE ?= UART5_BASE 459endif 460 461ifneq (,$(filter $(PLATFORM_FLAVOR),mx93evk mx91evk)) 462CFG_DDR_SIZE ?= 0x80000000 463CFG_UART_BASE ?= UART1_BASE 464endif 465 466ifneq (,$(filter $(PLATFORM_FLAVOR),mx95evk)) 467CFG_DDR_SIZE ?= 0x80000000 468CFG_UART_BASE ?= UART1_BASE 469CFG_NSEC_DDR_1_BASE ?= 0x100000000UL 470CFG_NSEC_DDR_1_SIZE ?= 0x380000000UL 471CFG_CORE_ARM64_PA_BITS ?= 40 472endif 473 474# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config 475ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \ 476 $(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y) 477include core/arch/arm/cpu/cortex-a9.mk 478 479$(call force,CFG_PL310,y) 480 481CFG_PL310_LOCKED ?= y 482CFG_ENABLE_SCTLR_RR ?= y 483CFG_IMX_SCU ?= y 484endif 485 486ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y) 487CFG_DRAM_BASE ?= 0x10000000 488endif 489 490ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \ 491 $(CFG_MX6SX))) 492CFG_DRAM_BASE ?= 0x80000000 493endif 494 495ifeq ($(filter y, $(CFG_MX7)), y) 496CFG_INIT_CNTVOFF ?= y 497CFG_DRAM_BASE ?= 0x80000000 498endif 499 500ifeq ($(filter y, $(CFG_MX7ULP)), y) 501CFG_INIT_CNTVOFF ?= y 502CFG_DRAM_BASE ?= UL(0x60000000) 503$(call force,CFG_IMX_LPUART,y) 504$(call force,CFG_BOOT_SECONDARY_REQUEST,n) 505endif 506 507ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP))) 508$(call force,CFG_GIC,y) 509 510CFG_BOOT_SECONDARY_REQUEST ?= y 511CFG_DT ?= y 512CFG_DTB_MAX_SIZE ?= 0x20000 513CFG_PAGEABLE_ADDR ?= 0 514CFG_PSCI_ARM32 ?= y 515CFG_SECURE_TIME_SOURCE_REE ?= y 516CFG_UART_BASE ?= UART1_BASE 517endif 518 519ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX8M))) 520$(call force,CFG_IMX_UART,y) 521CFG_IMX_SNVS ?= y 522endif 523 524ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7))) 525CFG_IMX_CSU ?= y 526endif 527 528ifeq ($(filter y, $(CFG_PSCI_ARM32)), y) 529CFG_HWSUPP_MEM_PERM_WXN = n 530CFG_IMX_WDOG ?= y 531endif 532 533ifeq ($(CFG_ARM64_core),y) 534# arm-v8 platforms 535include core/arch/arm/cpu/cortex-armv8-0.mk 536$(call force,CFG_ARM_GICV3,y) 537$(call force,CFG_GIC,y) 538$(call force,CFG_WITH_ARM_TRUSTED_FW,y) 539$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 540 541CFG_CRYPTO_WITH_CE ?= y 542 543supported-ta-targets = ta_arm64 544endif 545 546CFG_TZDRAM_SIZE ?= 0x01e00000 547CFG_SHMEM_SIZE ?= 0x00200000 548CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - $(CFG_TZDRAM_SIZE) - $(CFG_SHMEM_SIZE) + $(CFG_DDR_SIZE)) 549CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE)) 550 551# Enable embedded tests by default 552CFG_ENABLE_EMBEDDED_TESTS ?= y 553CFG_ATTESTATION_PTA ?= y 554 555# Set default heap size for imx platforms to 128k 556CFG_CORE_HEAP_SIZE ?= 131072 557 558CFG_CRYPTO_SIZE_OPTIMIZATION ?= n 559CFG_MMAP_REGIONS ?= 24 560 561# SE05X and OCOTP both implement tee_otp_get_die_id() 562ifeq ($(CFG_NXP_SE05X),y) 563$(call force,CFG_IMX_OCOTP,n) 564endif 565CFG_IMX_OCOTP ?= y 566CFG_IMX_DIGPROG ?= y 567CFG_PKCS11_TA ?= y 568CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID ?= y 569 570# Almost all platforms include CAAM HW Modules, except the 571# ones forced to be disabled 572CFG_NXP_CAAM ?= n 573 574ifeq ($(CFG_NXP_CAAM),y) 575ifeq ($(filter y, $(CFG_MX8QM) $(CFG_MX8QX) $(CFG_MX8DXL)), y) 576CFG_IMX_SC ?= y 577CFG_IMX_MU ?= y 578endif 579 580else 581 582ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP))) 583CFG_IMX_CAAM ?= y 584endif 585 586endif 587