xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision 2f4d97e7664270c92f4fd9d35fcddcfa4fd5f667) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8	mx6ulccbv2 \
9
10mx6ull-flavorlist = \
11	mx6ullevk \
12	mx6ulzevk \
13
14mx6q-flavorlist = \
15	mx6qsabrelite \
16	mx6qsabreauto \
17	mx6qsabresd \
18	mx6qhmbedge \
19	mx6qapalis \
20
21mx6qp-flavorlist = \
22	mx6qpsabreauto \
23	mx6qpsabresd \
24
25mx6sl-flavorlist = \
26	mx6slevk
27
28mx6sll-flavorlist = \
29	mx6sllevk
30
31mx6sx-flavorlist = \
32	mx6sxsabreauto \
33	mx6sxsabresd \
34	mx6sxudooneofull \
35
36mx6d-flavorlist = \
37	mx6dhmbedge \
38	mx6dapalis \
39
40mx6dl-flavorlist = \
41	mx6dlsabreauto \
42	mx6dlsabresd \
43	mx6dlhmbedge \
44
45mx6s-flavorlist = \
46	mx6shmbedge \
47	mx6solosabresd \
48	mx6solosabreauto \
49
50mx7d-flavorlist = \
51	mx7dsabresd \
52	mx7dpico_mbl \
53	mx7dclsom \
54
55mx7s-flavorlist = \
56	mx7swarp7 \
57	mx7swarp7_mbl \
58
59mx7ulp-flavorlist = \
60	mx7ulpevk
61
62mx8mq-flavorlist = \
63	mx8mqevk
64
65mx8mm-flavorlist = \
66	mx8mmevk \
67	mx8mm_cl_iot_gate
68
69mx8mn-flavorlist = \
70	mx8mnevk
71
72mx8mp-flavorlist = \
73	mx8mpevk \
74	mx8mp_rsb3720_6g
75
76mx8qm-flavorlist = \
77	mx8qmmek \
78
79mx8qx-flavorlist = \
80	mx8qxpmek \
81
82mx8dxl-flavorlist = \
83	mx8dxlevk \
84
85mx8ulp-flavorlist = \
86	mx8ulpevk \
87
88mx93-flavorlist = \
89	mx93evk \
90
91ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
92$(call force,CFG_MX6,y)
93$(call force,CFG_MX6UL,y)
94$(call force,CFG_TEE_CORE_NB_CORE,1)
95$(call force,CFG_TZC380,y)
96include core/arch/arm/cpu/cortex-a7.mk
97else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
98$(call force,CFG_MX6,y)
99$(call force,CFG_MX6ULL,y)
100$(call force,CFG_TEE_CORE_NB_CORE,1)
101$(call force,CFG_TZC380,y)
102$(call force,CFG_IMX_CAAM,n)
103$(call force,CFG_NXP_CAAM,n)
104$(call force,CFG_IMX_DCP,y)
105include core/arch/arm/cpu/cortex-a7.mk
106else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
107$(call force,CFG_MX6,y)
108$(call force,CFG_MX6Q,y)
109$(call force,CFG_TEE_CORE_NB_CORE,4)
110$(call force,CFG_TZC380,y)
111else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
112$(call force,CFG_MX6,y)
113$(call force,CFG_MX6QP,y)
114$(call force,CFG_TEE_CORE_NB_CORE,4)
115else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
116$(call force,CFG_MX6,y)
117$(call force,CFG_MX6D,y)
118$(call force,CFG_TEE_CORE_NB_CORE,2)
119$(call force,CFG_TZC380,y)
120else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
121$(call force,CFG_MX6,y)
122$(call force,CFG_MX6DL,y)
123$(call force,CFG_TEE_CORE_NB_CORE,2)
124$(call force,CFG_TZC380,y)
125else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
126$(call force,CFG_MX6,y)
127$(call force,CFG_MX6S,y)
128$(call force,CFG_TEE_CORE_NB_CORE,1)
129else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
130$(call force,CFG_MX6,y)
131$(call force,CFG_MX6SL,y)
132$(call force,CFG_TEE_CORE_NB_CORE,1)
133$(call force,CFG_IMX_CAAM,n)
134$(call force,CFG_NXP_CAAM,n)
135$(call force,CFG_IMX_DCP,y)
136else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
137$(call force,CFG_MX6,y)
138$(call force,CFG_MX6SLL,y)
139$(call force,CFG_TEE_CORE_NB_CORE,1)
140$(call force,CFG_IMX_CAAM,n)
141$(call force,CFG_NXP_CAAM,n)
142$(call force,CFG_IMX_DCP,y)
143$(call force,CFG_NO_SMP,y)
144else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
145$(call force,CFG_MX6,y)
146$(call force,CFG_MX6SX,y)
147$(call force,CFG_TEE_CORE_NB_CORE,1)
148else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
149$(call force,CFG_MX7,y)
150$(call force,CFG_TEE_CORE_NB_CORE,1)
151include core/arch/arm/cpu/cortex-a7.mk
152else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
153$(call force,CFG_MX7,y)
154$(call force,CFG_TEE_CORE_NB_CORE,2)
155include core/arch/arm/cpu/cortex-a7.mk
156else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
157$(call force,CFG_MX7ULP,y)
158$(call force,CFG_TEE_CORE_NB_CORE,1)
159$(call force,CFG_TZC380,n)
160$(call force,CFG_CSU,n)
161include core/arch/arm/cpu/cortex-a7.mk
162else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mq-flavorlist)))
163$(call force,CFG_MX8MQ,y)
164$(call force,CFG_MX8M,y)
165$(call force,CFG_ARM64_core,y)
166CFG_DRAM_BASE ?= 0x40000000
167CFG_TEE_CORE_NB_CORE ?= 4
168else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist)))
169$(call force,CFG_MX8MM,y)
170$(call force,CFG_MX8M,y)
171$(call force,CFG_ARM64_core,y)
172CFG_DRAM_BASE ?= 0x40000000
173CFG_TEE_CORE_NB_CORE ?= 4
174else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mn-flavorlist)))
175$(call force,CFG_MX8MN,y)
176$(call force,CFG_MX8M,y)
177$(call force,CFG_ARM64_core,y)
178CFG_DRAM_BASE ?= 0x40000000
179CFG_TEE_CORE_NB_CORE ?= 4
180else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mp-flavorlist)))
181$(call force,CFG_MX8MP,y)
182$(call force,CFG_MX8M,y)
183$(call force,CFG_ARM64_core,y)
184CFG_DRAM_BASE ?= 0x40000000
185CFG_TEE_CORE_NB_CORE ?= 4
186else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist)))
187$(call force,CFG_MX8QM,y)
188$(call force,CFG_ARM64_core,y)
189$(call force,CFG_IMX_SNVS,n)
190CFG_IMX_LPUART ?= y
191CFG_DRAM_BASE ?= 0x80000000
192CFG_TEE_CORE_NB_CORE ?= 6
193$(call force,CFG_IMX_OCOTP,n)
194else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qx-flavorlist)))
195$(call force,CFG_MX8QX,y)
196$(call force,CFG_ARM64_core,y)
197$(call force,CFG_IMX_SNVS,n)
198CFG_IMX_LPUART ?= y
199CFG_DRAM_BASE ?= 0x80000000
200CFG_TEE_CORE_NB_CORE ?= 4
201$(call force,CFG_IMX_OCOTP,n)
202else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8dxl-flavorlist)))
203$(call force,CFG_MX8DXL,y)
204$(call force,CFG_ARM64_core,y)
205$(call force,CFG_IMX_SNVS,n)
206CFG_IMX_LPUART ?= y
207CFG_DRAM_BASE ?= 0x80000000
208$(call force,CFG_TEE_CORE_NB_CORE,2)
209$(call force,CFG_IMX_OCOTP,n)
210$(call force,CFG_NXP_CAAM,n)
211else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8ulp-flavorlist)))
212$(call force,CFG_MX8ULP,y)
213$(call force,CFG_ARM64_core,y)
214CFG_IMX_LPUART ?= y
215CFG_DRAM_BASE ?= 0x80000000
216CFG_TEE_CORE_NB_CORE ?= 2
217$(call force,CFG_NXP_SNVS,n)
218$(call force,CFG_IMX_OCOTP,n)
219else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx93-flavorlist)))
220$(call force,CFG_MX93,y)
221$(call force,CFG_ARM64_core,y)
222CFG_IMX_LPUART ?= y
223CFG_DRAM_BASE ?= 0x80000000
224CFG_TEE_CORE_NB_CORE ?= 2
225$(call force,CFG_NXP_SNVS,n)
226$(call force,CFG_IMX_OCOTP,n)
227$(call force,CFG_TZC380,n)
228$(call force,CFG_CRYPTO_DRIVER,n)
229$(call force,CFG_NXP_CAAM,n)
230else
231$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
232endif
233
234ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
235CFG_DDR_SIZE ?= 0x40000000
236CFG_NS_ENTRY_ADDR ?= 0x80800000
237CFG_IMX_WDOG_EXT_RESET ?= y
238endif
239
240ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
241CFG_DDR_SIZE ?= 0x40000000
242CFG_UART_BASE ?= UART1_BASE
243CFG_IMX_WDOG_EXT_RESET ?= y
244endif
245
246ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
247CFG_DDR_SIZE ?= 0x20000000
248CFG_NS_ENTRY_ADDR ?= 0x87800000
249CFG_DT_ADDR ?= 0x83100000
250CFG_UART_BASE ?= UART5_BASE
251CFG_BOOT_SECONDARY_REQUEST ?= n
252CFG_EXTERNAL_DTB_OVERLAY ?= y
253CFG_IMX_WDOG_EXT_RESET ?= y
254endif
255
256ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
257CFG_DDR_SIZE ?= 0x20000000
258CFG_NS_ENTRY_ADDR ?= 0x80800000
259CFG_BOOT_SECONDARY_REQUEST ?= n
260endif
261
262ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
263CFG_DDR_SIZE ?= 0x20000000
264CFG_NS_ENTRY_ADDR ?= 0x87800000
265CFG_DT_ADDR ?= 0x83100000
266CFG_BOOT_SECONDARY_REQUEST ?= n
267CFG_EXTERNAL_DTB_OVERLAY = y
268CFG_IMX_WDOG_EXT_RESET = y
269endif
270
271ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
272CFG_DDR_SIZE ?= 0x40000000
273CFG_NS_ENTRY_ADDR ?= 0x60800000
274CFG_UART_BASE ?= UART4_BASE
275endif
276
277ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
278	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd \
279	mx6dapalis mx6qapalis))
280CFG_DDR_SIZE ?= 0x40000000
281CFG_NS_ENTRY_ADDR ?= 0x12000000
282endif
283
284ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
285	mx6dlsabreauto mx6solosabreauto))
286CFG_DDR_SIZE ?= 0x80000000
287CFG_NS_ENTRY_ADDR ?= 0x12000000
288CFG_UART_BASE ?= UART4_BASE
289endif
290
291ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
292CFG_DDR_SIZE ?= 0x80000000
293CFG_UART_BASE ?= UART1_BASE
294endif
295
296ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
297CFG_DDR_SIZE ?= 0x40000000
298CFG_NS_ENTRY_ADDR ?= 0x12000000
299endif
300
301ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
302CFG_DDR_SIZE ?= 0x40000000
303CFG_NS_ENTRY_ADDR ?= 0x12000000
304CFG_UART_BASE ?= UART2_BASE
305endif
306
307ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
308CFG_NS_ENTRY_ADDR ?= 0x80800000
309CFG_DDR_SIZE ?= 0x40000000
310endif
311
312ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
313CFG_NS_ENTRY_ADDR ?= 0x80800000
314CFG_DDR_SIZE ?= 0x80000000
315endif
316
317ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
318CFG_DDR_SIZE ?= 0x80000000
319CFG_NS_ENTRY_ADDR ?= 0x80800000
320endif
321
322ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
323CFG_DDR_SIZE ?= 0x40000000
324CFG_NS_ENTRY_ADDR ?= 0x80800000
325endif
326
327ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
328CFG_DDR_SIZE ?= 0x40000000
329CFG_UART_BASE ?= UART1_BASE
330endif
331
332ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk mx6ulzevk))
333CFG_DDR_SIZE ?= 0x20000000
334CFG_NS_ENTRY_ADDR ?= 0x80800000
335endif
336
337ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
338CFG_DDR_SIZE ?= 0x10000000
339CFG_NS_ENTRY_ADDR ?= 0x80800000
340CFG_UART_BASE ?= UART5_BASE
341endif
342
343ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
344CFG_DDR_SIZE ?= 0x10000000
345CFG_NS_ENTRY_ADDR ?= 0x80800000
346endif
347
348ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccbv2))
349CFG_DDR_SIZE ?= 0x10000000
350CFG_UART_BASE ?= UART7_BASE
351endif
352
353ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mqevk))
354CFG_DDR_SIZE ?= 0xc0000000
355CFG_UART_BASE ?= UART1_BASE
356endif
357
358ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk))
359CFG_DDR_SIZE ?= 0x80000000
360CFG_UART_BASE ?= UART2_BASE
361endif
362
363ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mm_cl_iot_gate))
364CFG_DDR_SIZE ?= 0x40000000
365CFG_UART_BASE ?= UART3_BASE
366CFG_NSEC_DDR_1_BASE ?= 0x80000000UL
367CFG_NSEC_DDR_1_SIZE ?= 0x40000000UL
368endif
369
370ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk))
371CFG_DDR_SIZE ?= 0x80000000
372CFG_UART_BASE ?= UART2_BASE
373endif
374
375ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mpevk))
376CFG_DDR_SIZE ?= UL(0x180000000)
377CFG_UART_BASE ?= UART2_BASE
378$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
379$(call force,CFG_CORE_ARM64_PA_BITS,36)
380endif
381
382ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mp_rsb3720_6g))
383CFG_DDR_SIZE ?= UL(0x180000000)
384CFG_UART_BASE ?= UART3_BASE
385CFG_TZDRAM_START ?= 0x56000000
386$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
387$(call force,CFG_CORE_ARM64_PA_BITS,36)
388endif
389
390ifneq (,$(filter $(PLATFORM_FLAVOR),mx8qxpmek mx8qmmek))
391CFG_DDR_SIZE ?= 0x80000000
392CFG_UART_BASE ?= UART0_BASE
393CFG_NSEC_DDR_1_BASE ?= 0x880000000UL
394CFG_NSEC_DDR_1_SIZE  ?= 0x380000000UL
395CFG_CORE_ARM64_PA_BITS ?= 40
396endif
397
398ifneq (,$(filter $(PLATFORM_FLAVOR),mx8dxlevk))
399CFG_DDR_SIZE ?= 0x40000000
400CFG_UART_BASE ?= UART0_BASE
401endif
402
403ifneq (,$(filter $(PLATFORM_FLAVOR),mx8ulpevk))
404CFG_DDR_SIZE ?= 0x80000000
405CFG_UART_BASE ?= UART5_BASE
406endif
407
408ifneq (,$(filter $(PLATFORM_FLAVOR),mx93evk))
409CFG_DDR_SIZE ?= 0x80000000
410CFG_UART_BASE ?= UART1_BASE
411endif
412
413# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
414ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
415	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
416include core/arch/arm/cpu/cortex-a9.mk
417
418$(call force,CFG_PL310,y)
419
420CFG_PL310_LOCKED ?= y
421CFG_ENABLE_SCTLR_RR ?= y
422CFG_SCU ?= y
423endif
424
425ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
426CFG_DRAM_BASE ?= 0x10000000
427endif
428
429ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
430	$(CFG_MX6SX)))
431CFG_DRAM_BASE ?= 0x80000000
432endif
433
434ifeq ($(filter y, $(CFG_MX7)), y)
435CFG_INIT_CNTVOFF ?= y
436CFG_DRAM_BASE ?= 0x80000000
437endif
438
439ifeq ($(filter y, $(CFG_MX7ULP)), y)
440CFG_INIT_CNTVOFF ?= y
441CFG_DRAM_BASE ?= UL(0x60000000)
442$(call force,CFG_IMX_LPUART,y)
443$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
444endif
445
446ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
447$(call force,CFG_GIC,y)
448
449CFG_BOOT_SECONDARY_REQUEST ?= y
450CFG_DT ?= y
451CFG_DTB_MAX_SIZE ?= 0x20000
452CFG_PAGEABLE_ADDR ?= 0
453CFG_PSCI_ARM32 ?= y
454CFG_SECURE_TIME_SOURCE_REE ?= y
455CFG_UART_BASE ?= UART1_BASE
456endif
457
458ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX8M)))
459$(call force,CFG_IMX_UART,y)
460CFG_IMX_SNVS ?= y
461endif
462
463ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
464CFG_CSU ?= y
465endif
466
467ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
468CFG_HWSUPP_MEM_PERM_WXN = n
469CFG_IMX_WDOG ?= y
470endif
471
472ifeq ($(CFG_ARM64_core),y)
473# arm-v8 platforms
474include core/arch/arm/cpu/cortex-armv8-0.mk
475$(call force,CFG_ARM_GICV3,y)
476$(call force,CFG_GIC,y)
477$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
478$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
479
480CFG_CRYPTO_WITH_CE ?= y
481
482supported-ta-targets = ta_arm64
483endif
484
485CFG_TZDRAM_SIZE ?= 0x01e00000
486CFG_SHMEM_SIZE ?= 0x00200000
487CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - $(CFG_TZDRAM_SIZE) - $(CFG_SHMEM_SIZE) + $(CFG_DDR_SIZE))
488CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
489
490CFG_NSEC_DDR_0_BASE ?= $(CFG_DRAM_BASE)
491CFG_NSEC_DDR_0_SIZE ?= ($(CFG_DDR_SIZE) - $(CFG_TZDRAM_SIZE) - $(CFG_SHMEM_SIZE))
492
493CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
494CFG_MMAP_REGIONS ?= 24
495
496# SE05X and OCOTP both implement tee_otp_get_die_id()
497ifeq ($(CFG_NXP_SE05X),y)
498$(call force,CFG_IMX_OCOTP,n)
499endif
500CFG_IMX_OCOTP ?= y
501
502# Almost all platforms include CAAM HW Modules, except the
503# ones forced to be disabled
504CFG_NXP_CAAM ?= n
505
506ifeq ($(CFG_NXP_CAAM),y)
507ifeq ($(filter y, $(CFG_MX8QM) $(CFG_MX8QX) $(CFG_MX8DXL)), y)
508CFG_IMX_SC ?= y
509endif
510
511# As NXP CAAM Driver is enabled, disable the small local CAAM driver
512# used just to release Job Rings to Non-Secure world
513$(call force,CFG_IMX_CAAM,n)
514else
515
516ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
517CFG_IMX_CAAM ?= y
518endif
519endif
520
521# Cryptographic configuration
522include core/arch/arm/plat-imx/crypto_conf.mk
523