xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision 279bfce83bac403aa516516574af9ca403d31290) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8	mx6ulccbv2 \
9
10mx6ull-flavorlist = \
11	mx6ullevk \
12	mx6ulzevk \
13
14mx6q-flavorlist = \
15	mx6qsabrelite \
16	mx6qsabreauto \
17	mx6qsabresd \
18	mx6qhmbedge \
19	mx6qapalis \
20
21mx6qp-flavorlist = \
22	mx6qpsabreauto \
23	mx6qpsabresd \
24
25mx6sl-flavorlist = \
26	mx6slevk
27
28mx6sll-flavorlist = \
29	mx6sllevk
30
31mx6sx-flavorlist = \
32	mx6sxsabreauto \
33	mx6sxsabresd \
34	mx6sxudooneofull \
35
36mx6d-flavorlist = \
37	mx6dhmbedge \
38	mx6dapalis \
39
40mx6dl-flavorlist = \
41	mx6dlsabreauto \
42	mx6dlsabresd \
43	mx6dlhmbedge \
44
45mx6s-flavorlist = \
46	mx6shmbedge \
47	mx6solosabresd \
48	mx6solosabreauto \
49
50mx7d-flavorlist = \
51	mx7dsabresd \
52	mx7dpico_mbl \
53	mx7dclsom \
54
55mx7s-flavorlist = \
56	mx7swarp7 \
57	mx7swarp7_mbl \
58
59mx7ulp-flavorlist = \
60	mx7ulpevk
61
62mx8mq-flavorlist = \
63	mx8mqevk
64
65mx8mm-flavorlist = \
66	mx8mmevk \
67	mx8mm_cl_iot_gate
68
69mx8mn-flavorlist = \
70	mx8mnevk
71
72mx8mp-flavorlist = \
73	mx8mpevk
74
75mx8qm-flavorlist = \
76	mx8qmmek \
77
78mx8qx-flavorlist = \
79	mx8qxpmek \
80
81ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
82$(call force,CFG_MX6,y)
83$(call force,CFG_MX6UL,y)
84$(call force,CFG_TEE_CORE_NB_CORE,1)
85$(call force,CFG_TZC380,y)
86include core/arch/arm/cpu/cortex-a7.mk
87else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
88$(call force,CFG_MX6,y)
89$(call force,CFG_MX6ULL,y)
90$(call force,CFG_TEE_CORE_NB_CORE,1)
91$(call force,CFG_TZC380,y)
92$(call force,CFG_IMX_CAAM,n)
93$(call force,CFG_NXP_CAAM,n)
94$(call force,CFG_IMX_DCP,y)
95include core/arch/arm/cpu/cortex-a7.mk
96else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
97$(call force,CFG_MX6,y)
98$(call force,CFG_MX6Q,y)
99$(call force,CFG_TEE_CORE_NB_CORE,4)
100$(call force,CFG_TZC380,y)
101else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
102$(call force,CFG_MX6,y)
103$(call force,CFG_MX6QP,y)
104$(call force,CFG_TEE_CORE_NB_CORE,4)
105else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
106$(call force,CFG_MX6,y)
107$(call force,CFG_MX6D,y)
108$(call force,CFG_TEE_CORE_NB_CORE,2)
109$(call force,CFG_TZC380,y)
110else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
111$(call force,CFG_MX6,y)
112$(call force,CFG_MX6DL,y)
113$(call force,CFG_TEE_CORE_NB_CORE,2)
114$(call force,CFG_TZC380,y)
115else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
116$(call force,CFG_MX6,y)
117$(call force,CFG_MX6S,y)
118$(call force,CFG_TEE_CORE_NB_CORE,1)
119else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
120$(call force,CFG_MX6,y)
121$(call force,CFG_MX6SL,y)
122$(call force,CFG_TEE_CORE_NB_CORE,1)
123$(call force,CFG_IMX_CAAM,n)
124$(call force,CFG_NXP_CAAM,n)
125$(call force,CFG_IMX_DCP,y)
126else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
127$(call force,CFG_MX6,y)
128$(call force,CFG_MX6SLL,y)
129$(call force,CFG_TEE_CORE_NB_CORE,1)
130$(call force,CFG_IMX_CAAM,n)
131$(call force,CFG_NXP_CAAM,n)
132$(call force,CFG_IMX_DCP,y)
133$(call force,CFG_NO_SMP,y)
134else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
135$(call force,CFG_MX6,y)
136$(call force,CFG_MX6SX,y)
137$(call force,CFG_TEE_CORE_NB_CORE,1)
138else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
139$(call force,CFG_MX7,y)
140$(call force,CFG_TEE_CORE_NB_CORE,1)
141include core/arch/arm/cpu/cortex-a7.mk
142else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
143$(call force,CFG_MX7,y)
144$(call force,CFG_TEE_CORE_NB_CORE,2)
145include core/arch/arm/cpu/cortex-a7.mk
146else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
147$(call force,CFG_MX7ULP,y)
148$(call force,CFG_TEE_CORE_NB_CORE,1)
149$(call force,CFG_TZC380,n)
150$(call force,CFG_CSU,n)
151$(call force,CFG_NXP_CAAM,n)
152include core/arch/arm/cpu/cortex-a7.mk
153else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mq-flavorlist)))
154$(call force,CFG_MX8MQ,y)
155$(call force,CFG_MX8M,y)
156$(call force,CFG_ARM64_core,y)
157CFG_IMX_UART ?= y
158CFG_DRAM_BASE ?= 0x40000000
159CFG_TEE_CORE_NB_CORE ?= 4
160else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist)))
161$(call force,CFG_MX8MM,y)
162$(call force,CFG_MX8M,y)
163$(call force,CFG_ARM64_core,y)
164CFG_IMX_UART ?= y
165CFG_DRAM_BASE ?= 0x40000000
166CFG_TEE_CORE_NB_CORE ?= 4
167else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mn-flavorlist)))
168$(call force,CFG_MX8MN,y)
169$(call force,CFG_MX8M,y)
170$(call force,CFG_ARM64_core,y)
171CFG_IMX_UART ?= y
172CFG_DRAM_BASE ?= 0x40000000
173CFG_TEE_CORE_NB_CORE ?= 4
174else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mp-flavorlist)))
175$(call force,CFG_MX8MP,y)
176$(call force,CFG_MX8M,y)
177$(call force,CFG_ARM64_core,y)
178CFG_IMX_UART ?= y
179CFG_DRAM_BASE ?= 0x40000000
180CFG_TEE_CORE_NB_CORE ?= 4
181else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist)))
182$(call force,CFG_MX8QM,y)
183$(call force,CFG_ARM64_core,y)
184$(call force,CFG_IMX_SNVS,n)
185CFG_IMX_LPUART ?= y
186CFG_DRAM_BASE ?= 0x80000000
187CFG_TEE_CORE_NB_CORE ?= 6
188$(call force,CFG_NXP_CAAM,n)
189$(call force,CFG_IMX_OCOTP,n)
190else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qx-flavorlist)))
191$(call force,CFG_MX8QX,y)
192$(call force,CFG_ARM64_core,y)
193$(call force,CFG_IMX_SNVS,n)
194CFG_IMX_LPUART ?= y
195CFG_DRAM_BASE ?= 0x80000000
196CFG_TEE_CORE_NB_CORE ?= 4
197$(call force,CFG_NXP_CAAM,n)
198$(call force,CFG_IMX_OCOTP,n)
199else
200$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
201endif
202
203ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
204CFG_DDR_SIZE ?= 0x40000000
205CFG_NS_ENTRY_ADDR ?= 0x80800000
206endif
207
208ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
209CFG_DDR_SIZE ?= 0x40000000
210CFG_UART_BASE ?= UART1_BASE
211endif
212
213ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
214CFG_DDR_SIZE ?= 0x20000000
215CFG_NS_ENTRY_ADDR ?= 0x87800000
216CFG_DT_ADDR ?= 0x83100000
217CFG_UART_BASE ?= UART5_BASE
218CFG_BOOT_SECONDARY_REQUEST ?= n
219CFG_EXTERNAL_DTB_OVERLAY ?= y
220CFG_IMX_WDOG_EXT_RESET ?= y
221endif
222
223ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
224CFG_DDR_SIZE ?= 0x20000000
225CFG_NS_ENTRY_ADDR ?= 0x80800000
226CFG_BOOT_SECONDARY_REQUEST ?= n
227endif
228
229ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
230CFG_DDR_SIZE ?= 0x20000000
231CFG_NS_ENTRY_ADDR ?= 0x87800000
232CFG_DT_ADDR ?= 0x83100000
233CFG_BOOT_SECONDARY_REQUEST ?= n
234CFG_EXTERNAL_DTB_OVERLAY = y
235CFG_IMX_WDOG_EXT_RESET = y
236endif
237
238ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
239CFG_DDR_SIZE ?= 0x40000000
240CFG_NS_ENTRY_ADDR ?= 0x60800000
241CFG_UART_BASE ?= UART4_BASE
242endif
243
244ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
245	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd \
246	mx6dapalis mx6qapalis))
247CFG_DDR_SIZE ?= 0x40000000
248CFG_NS_ENTRY_ADDR ?= 0x12000000
249endif
250
251ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
252	mx6dlsabreauto mx6solosabreauto))
253CFG_DDR_SIZE ?= 0x80000000
254CFG_NS_ENTRY_ADDR ?= 0x12000000
255CFG_UART_BASE ?= UART4_BASE
256endif
257
258ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
259CFG_DDR_SIZE ?= 0x80000000
260CFG_UART_BASE ?= UART1_BASE
261endif
262
263ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
264CFG_DDR_SIZE ?= 0x40000000
265CFG_NS_ENTRY_ADDR ?= 0x12000000
266endif
267
268ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
269CFG_DDR_SIZE ?= 0x40000000
270CFG_NS_ENTRY_ADDR ?= 0x12000000
271CFG_UART_BASE ?= UART2_BASE
272endif
273
274ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
275CFG_NS_ENTRY_ADDR ?= 0x80800000
276CFG_DDR_SIZE ?= 0x40000000
277endif
278
279ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
280CFG_NS_ENTRY_ADDR ?= 0x80800000
281CFG_DDR_SIZE ?= 0x80000000
282endif
283
284ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
285CFG_DDR_SIZE ?= 0x80000000
286CFG_NS_ENTRY_ADDR ?= 0x80800000
287endif
288
289ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
290CFG_DDR_SIZE ?= 0x40000000
291CFG_NS_ENTRY_ADDR ?= 0x80800000
292endif
293
294ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
295CFG_DDR_SIZE ?= 0x40000000
296CFG_UART_BASE ?= UART1_BASE
297endif
298
299ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk mx6ulzevk))
300CFG_DDR_SIZE ?= 0x20000000
301CFG_NS_ENTRY_ADDR ?= 0x80800000
302endif
303
304ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
305CFG_DDR_SIZE ?= 0x10000000
306CFG_NS_ENTRY_ADDR ?= 0x80800000
307CFG_UART_BASE ?= UART5_BASE
308endif
309
310ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
311CFG_DDR_SIZE ?= 0x10000000
312CFG_NS_ENTRY_ADDR ?= 0x80800000
313endif
314
315ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccbv2))
316CFG_DDR_SIZE ?= 0x10000000
317CFG_UART_BASE ?= UART7_BASE
318endif
319
320ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mqevk))
321CFG_DDR_SIZE ?= 0xc0000000
322CFG_UART_BASE ?= UART1_BASE
323endif
324
325ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk))
326CFG_DDR_SIZE ?= 0x80000000
327CFG_UART_BASE ?= UART2_BASE
328endif
329
330ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mm_cl_iot_gate))
331CFG_DDR_SIZE ?= 0x40000000
332CFG_UART_BASE ?= UART3_BASE
333CFG_NSEC_DDR_1_BASE ?= 0x80000000UL
334CFG_NSEC_DDR_1_SIZE ?= 0x40000000UL
335endif
336
337ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk))
338CFG_DDR_SIZE ?= 0x80000000
339CFG_UART_BASE ?= UART2_BASE
340endif
341
342ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mpevk))
343CFG_DDR_SIZE ?= UL(0x180000000)
344CFG_UART_BASE ?= UART2_BASE
345$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
346$(call force,CFG_CORE_ARM64_PA_BITS,36)
347endif
348
349ifneq (,$(filter $(PLATFORM_FLAVOR),mx8qxpmek mx8qmmek))
350CFG_DDR_SIZE ?= 0x80000000
351CFG_UART_BASE ?= UART0_BASE
352CFG_NSEC_DDR_1_BASE ?= 0x880000000UL
353CFG_NSEC_DDR_1_SIZE  ?= 0x380000000UL
354CFG_CORE_ARM64_PA_BITS ?= 40
355endif
356
357# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
358ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
359	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
360include core/arch/arm/cpu/cortex-a9.mk
361
362$(call force,CFG_PL310,y)
363
364CFG_PL310_LOCKED ?= y
365CFG_ENABLE_SCTLR_RR ?= y
366CFG_SCU ?= y
367endif
368
369ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
370CFG_DRAM_BASE ?= 0x10000000
371endif
372
373ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
374	$(CFG_MX6SX)))
375CFG_DRAM_BASE ?= 0x80000000
376endif
377
378ifeq ($(filter y, $(CFG_MX7)), y)
379CFG_INIT_CNTVOFF ?= y
380CFG_DRAM_BASE ?= 0x80000000
381endif
382
383ifeq ($(filter y, $(CFG_MX7ULP)), y)
384CFG_INIT_CNTVOFF ?= y
385CFG_DRAM_BASE ?= UL(0x60000000)
386$(call force,CFG_IMX_LPUART,y)
387$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
388endif
389
390ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
391$(call force,CFG_GIC,y)
392
393CFG_BOOT_SECONDARY_REQUEST ?= y
394CFG_DT ?= y
395CFG_DTB_MAX_SIZE ?= 0x20000
396CFG_PAGEABLE_ADDR ?= 0
397CFG_PSCI_ARM32 ?= y
398CFG_SECURE_TIME_SOURCE_REE ?= y
399CFG_UART_BASE ?= UART1_BASE
400endif
401
402ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX8MM)))
403$(call force,CFG_IMX_UART,y)
404ifeq ($(CFG_RPMB_FS),y)
405CFG_IMX_SNVS ?= y
406endif
407endif
408
409ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
410CFG_CSU ?= y
411endif
412
413ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
414CFG_HWSUPP_MEM_PERM_WXN = n
415CFG_IMX_WDOG ?= y
416endif
417
418ifeq ($(CFG_ARM64_core),y)
419# arm-v8 platforms
420include core/arch/arm/cpu/cortex-armv8-0.mk
421$(call force,CFG_ARM_GICV3,y)
422$(call force,CFG_GIC,y)
423$(call force,CFG_WITH_LPAE,y)
424$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
425$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
426
427CFG_CRYPTO_WITH_CE ?= y
428
429supported-ta-targets = ta_arm64
430endif
431
432CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
433CFG_TZDRAM_SIZE ?= 0x01e00000
434CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
435CFG_SHMEM_SIZE ?= 0x00200000
436
437CFG_NSEC_DDR_0_BASE ?= $(CFG_DRAM_BASE)
438CFG_NSEC_DDR_0_SIZE ?= ($(CFG_DDR_SIZE) - 0x02000000)
439
440CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
441CFG_MMAP_REGIONS ?= 24
442
443# SE05X and OCOTP both implement tee_otp_get_die_id()
444ifeq ($(CFG_NXP_SE05X),y)
445$(call force,CFG_IMX_OCOTP,n)
446endif
447CFG_IMX_OCOTP ?= y
448
449# Almost all platforms include CAAM HW Modules, except the
450# ones forced to be disabled
451CFG_NXP_CAAM ?= n
452
453ifeq ($(CFG_NXP_CAAM),y)
454# As NXP CAAM Driver is enabled, disable the small local CAAM driver
455# used just to release Job Rings to Non-Secure world
456$(call force,CFG_IMX_CAAM,n)
457else
458
459ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
460CFG_IMX_CAAM ?= y
461endif
462endif
463
464# Cryptographic configuration
465include core/arch/arm/plat-imx/crypto_conf.mk
466