xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision 19a31ec40245ae01a9adcd206eec2a4bb4479fc9) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8	mx6ulccbv2 \
9
10mx6ull-flavorlist = \
11	mx6ullevk \
12	mx6ulzevk \
13
14mx6q-flavorlist = \
15	mx6qsabrelite \
16	mx6qsabreauto \
17	mx6qsabresd \
18	mx6qhmbedge \
19	mx6qapalis \
20
21mx6qp-flavorlist = \
22	mx6qpsabreauto \
23	mx6qpsabresd \
24
25mx6sl-flavorlist = \
26	mx6slevk
27
28mx6sll-flavorlist = \
29	mx6sllevk
30
31mx6sx-flavorlist = \
32	mx6sxsabreauto \
33	mx6sxsabresd \
34	mx6sxudooneofull \
35
36mx6d-flavorlist = \
37	mx6dhmbedge \
38	mx6dapalis \
39
40mx6dl-flavorlist = \
41	mx6dlsabreauto \
42	mx6dlsabresd \
43	mx6dlhmbedge \
44
45mx6s-flavorlist = \
46	mx6shmbedge \
47	mx6solosabresd \
48	mx6solosabreauto \
49
50mx7d-flavorlist = \
51	mx7dsabresd \
52	mx7dpico_mbl \
53	mx7dclsom \
54
55mx7s-flavorlist = \
56	mx7swarp7 \
57	mx7swarp7_mbl \
58
59mx7ulp-flavorlist = \
60	mx7ulpevk
61
62mx8mq-flavorlist = \
63	mx8mqevk
64
65mx8mm-flavorlist = \
66	mx8mmevk \
67	mx8mm_cl_iot_gate
68
69mx8mn-flavorlist = \
70	mx8mnevk
71
72mx8mp-flavorlist = \
73	mx8mpevk \
74	mx8mp_rsb3720_6g
75
76mx8qm-flavorlist = \
77	mx8qmmek \
78
79mx8qx-flavorlist = \
80	mx8qxpmek \
81	mx8dxmek \
82
83mx8dxl-flavorlist = \
84	mx8dxlevk \
85
86mx8ulp-flavorlist = \
87	mx8ulpevk \
88
89mx93-flavorlist = \
90	mx93evk \
91
92ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
93$(call force,CFG_MX6,y)
94$(call force,CFG_MX6UL,y)
95$(call force,CFG_TEE_CORE_NB_CORE,1)
96$(call force,CFG_TZC380,y)
97include core/arch/arm/cpu/cortex-a7.mk
98else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
99$(call force,CFG_MX6,y)
100$(call force,CFG_MX6ULL,y)
101$(call force,CFG_TEE_CORE_NB_CORE,1)
102$(call force,CFG_TZC380,y)
103$(call force,CFG_IMX_CAAM,n)
104$(call force,CFG_NXP_CAAM,n)
105$(call force,CFG_IMX_DCP,y)
106include core/arch/arm/cpu/cortex-a7.mk
107else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
108$(call force,CFG_MX6,y)
109$(call force,CFG_MX6Q,y)
110$(call force,CFG_TEE_CORE_NB_CORE,4)
111$(call force,CFG_TZC380,y)
112else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
113$(call force,CFG_MX6,y)
114$(call force,CFG_MX6QP,y)
115$(call force,CFG_TEE_CORE_NB_CORE,4)
116else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
117$(call force,CFG_MX6,y)
118$(call force,CFG_MX6D,y)
119$(call force,CFG_TEE_CORE_NB_CORE,2)
120$(call force,CFG_TZC380,y)
121else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
122$(call force,CFG_MX6,y)
123$(call force,CFG_MX6DL,y)
124$(call force,CFG_TEE_CORE_NB_CORE,2)
125$(call force,CFG_TZC380,y)
126else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
127$(call force,CFG_MX6,y)
128$(call force,CFG_MX6S,y)
129$(call force,CFG_TEE_CORE_NB_CORE,1)
130else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
131$(call force,CFG_MX6,y)
132$(call force,CFG_MX6SL,y)
133$(call force,CFG_TEE_CORE_NB_CORE,1)
134$(call force,CFG_IMX_CAAM,n)
135$(call force,CFG_NXP_CAAM,n)
136$(call force,CFG_IMX_DCP,y)
137else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
138$(call force,CFG_MX6,y)
139$(call force,CFG_MX6SLL,y)
140$(call force,CFG_TEE_CORE_NB_CORE,1)
141$(call force,CFG_IMX_CAAM,n)
142$(call force,CFG_NXP_CAAM,n)
143$(call force,CFG_IMX_DCP,y)
144$(call force,CFG_NO_SMP,y)
145else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
146$(call force,CFG_MX6,y)
147$(call force,CFG_MX6SX,y)
148$(call force,CFG_TEE_CORE_NB_CORE,1)
149else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
150$(call force,CFG_MX7,y)
151$(call force,CFG_TEE_CORE_NB_CORE,1)
152include core/arch/arm/cpu/cortex-a7.mk
153else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
154$(call force,CFG_MX7,y)
155$(call force,CFG_TEE_CORE_NB_CORE,2)
156include core/arch/arm/cpu/cortex-a7.mk
157else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
158$(call force,CFG_MX7ULP,y)
159$(call force,CFG_TEE_CORE_NB_CORE,1)
160$(call force,CFG_TZC380,n)
161$(call force,CFG_IMX_CSU,n)
162include core/arch/arm/cpu/cortex-a7.mk
163else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mq-flavorlist)))
164$(call force,CFG_MX8MQ,y)
165$(call force,CFG_MX8M,y)
166$(call force,CFG_ARM64_core,y)
167$(call force,CFG_TZC380,y)
168CFG_DRAM_BASE ?= 0x40000000
169CFG_TEE_CORE_NB_CORE ?= 4
170else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist)))
171$(call force,CFG_MX8MM,y)
172$(call force,CFG_MX8M,y)
173$(call force,CFG_ARM64_core,y)
174$(call force,CFG_TZC380,y)
175CFG_DRAM_BASE ?= 0x40000000
176CFG_TEE_CORE_NB_CORE ?= 4
177else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mn-flavorlist)))
178$(call force,CFG_MX8MN,y)
179$(call force,CFG_MX8M,y)
180$(call force,CFG_ARM64_core,y)
181$(call force,CFG_TZC380,y)
182CFG_DRAM_BASE ?= 0x40000000
183CFG_TEE_CORE_NB_CORE ?= 4
184else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mp-flavorlist)))
185$(call force,CFG_MX8MP,y)
186$(call force,CFG_MX8M,y)
187$(call force,CFG_ARM64_core,y)
188$(call force,CFG_TZC380,y)
189CFG_DRAM_BASE ?= 0x40000000
190CFG_TEE_CORE_NB_CORE ?= 4
191else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist)))
192$(call force,CFG_MX8QM,y)
193$(call force,CFG_ARM64_core,y)
194$(call force,CFG_IMX_SNVS,n)
195CFG_IMX_LPUART ?= y
196CFG_DRAM_BASE ?= 0x80000000
197CFG_TEE_CORE_NB_CORE ?= 6
198$(call force,CFG_IMX_OCOTP,n)
199else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qx-flavorlist)))
200$(call force,CFG_MX8QX,y)
201$(call force,CFG_ARM64_core,y)
202$(call force,CFG_IMX_SNVS,n)
203CFG_IMX_LPUART ?= y
204CFG_DRAM_BASE ?= 0x80000000
205CFG_TEE_CORE_NB_CORE ?= 4
206$(call force,CFG_IMX_OCOTP,n)
207else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8dxl-flavorlist)))
208$(call force,CFG_MX8DXL,y)
209$(call force,CFG_ARM64_core,y)
210$(call force,CFG_IMX_SNVS,n)
211CFG_IMX_LPUART ?= y
212CFG_DRAM_BASE ?= 0x80000000
213$(call force,CFG_TEE_CORE_NB_CORE,2)
214$(call force,CFG_IMX_OCOTP,n)
215else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8ulp-flavorlist)))
216$(call force,CFG_MX8ULP,y)
217$(call force,CFG_ARM64_core,y)
218CFG_IMX_LPUART ?= y
219CFG_DRAM_BASE ?= 0x80000000
220CFG_TEE_CORE_NB_CORE ?= 2
221$(call force,CFG_NXP_SNVS,n)
222$(call force,CFG_IMX_OCOTP,n)
223CFG_IMX_MU ?= y
224CFG_IMX_ELE ?= n
225else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx93-flavorlist)))
226$(call force,CFG_MX93,y)
227$(call force,CFG_ARM64_core,y)
228CFG_IMX_LPUART ?= y
229CFG_DRAM_BASE ?= 0x80000000
230CFG_TEE_CORE_NB_CORE ?= 2
231$(call force,CFG_NXP_SNVS,n)
232$(call force,CFG_IMX_OCOTP,n)
233$(call force,CFG_TZC380,n)
234$(call force,CFG_CRYPTO_DRIVER,n)
235$(call force,CFG_NXP_CAAM,n)
236CFG_IMX_MU ?= y
237CFG_IMX_ELE ?= n
238else
239$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
240endif
241
242ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
243CFG_DDR_SIZE ?= 0x40000000
244CFG_NS_ENTRY_ADDR ?= 0x80800000
245CFG_IMX_WDOG_EXT_RESET ?= y
246endif
247
248ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
249CFG_DDR_SIZE ?= 0x40000000
250CFG_UART_BASE ?= UART1_BASE
251CFG_IMX_WDOG_EXT_RESET ?= y
252endif
253
254ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
255CFG_DDR_SIZE ?= 0x20000000
256CFG_NS_ENTRY_ADDR ?= 0x87800000
257CFG_DT_ADDR ?= 0x83100000
258CFG_UART_BASE ?= UART5_BASE
259CFG_BOOT_SECONDARY_REQUEST ?= n
260CFG_EXTERNAL_DTB_OVERLAY ?= y
261CFG_IMX_WDOG_EXT_RESET ?= y
262endif
263
264ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
265CFG_DDR_SIZE ?= 0x20000000
266CFG_NS_ENTRY_ADDR ?= 0x80800000
267CFG_BOOT_SECONDARY_REQUEST ?= n
268endif
269
270ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
271CFG_DDR_SIZE ?= 0x20000000
272CFG_NS_ENTRY_ADDR ?= 0x87800000
273CFG_DT_ADDR ?= 0x83100000
274CFG_BOOT_SECONDARY_REQUEST ?= n
275CFG_EXTERNAL_DTB_OVERLAY = y
276CFG_IMX_WDOG_EXT_RESET = y
277endif
278
279ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
280CFG_DDR_SIZE ?= 0x40000000
281CFG_NS_ENTRY_ADDR ?= 0x60800000
282CFG_UART_BASE ?= UART4_BASE
283endif
284
285ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
286	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd \
287	mx6dapalis mx6qapalis))
288CFG_DDR_SIZE ?= 0x40000000
289CFG_NS_ENTRY_ADDR ?= 0x12000000
290endif
291
292ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
293	mx6dlsabreauto mx6solosabreauto))
294CFG_DDR_SIZE ?= 0x80000000
295CFG_NS_ENTRY_ADDR ?= 0x12000000
296CFG_UART_BASE ?= UART4_BASE
297endif
298
299ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
300CFG_DDR_SIZE ?= 0x80000000
301CFG_UART_BASE ?= UART1_BASE
302endif
303
304ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
305CFG_DDR_SIZE ?= 0x40000000
306CFG_NS_ENTRY_ADDR ?= 0x12000000
307endif
308
309ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
310CFG_DDR_SIZE ?= 0x40000000
311CFG_NS_ENTRY_ADDR ?= 0x12000000
312CFG_UART_BASE ?= UART2_BASE
313endif
314
315ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
316CFG_NS_ENTRY_ADDR ?= 0x80800000
317CFG_DDR_SIZE ?= 0x40000000
318endif
319
320ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
321CFG_NS_ENTRY_ADDR ?= 0x80800000
322CFG_DDR_SIZE ?= 0x80000000
323endif
324
325ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
326CFG_DDR_SIZE ?= 0x80000000
327CFG_NS_ENTRY_ADDR ?= 0x80800000
328endif
329
330ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
331CFG_DDR_SIZE ?= 0x40000000
332CFG_NS_ENTRY_ADDR ?= 0x80800000
333endif
334
335ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
336CFG_DDR_SIZE ?= 0x40000000
337CFG_UART_BASE ?= UART1_BASE
338endif
339
340ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk mx6ulzevk))
341CFG_DDR_SIZE ?= 0x20000000
342CFG_NS_ENTRY_ADDR ?= 0x80800000
343endif
344
345ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
346CFG_DDR_SIZE ?= 0x10000000
347CFG_NS_ENTRY_ADDR ?= 0x80800000
348CFG_UART_BASE ?= UART5_BASE
349endif
350
351ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
352CFG_DDR_SIZE ?= 0x10000000
353CFG_NS_ENTRY_ADDR ?= 0x80800000
354endif
355
356ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccbv2))
357CFG_DDR_SIZE ?= 0x10000000
358CFG_UART_BASE ?= UART7_BASE
359endif
360
361ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mqevk))
362CFG_DDR_SIZE ?= 0xc0000000
363CFG_UART_BASE ?= UART1_BASE
364endif
365
366ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk))
367CFG_DDR_SIZE ?= 0x80000000
368CFG_UART_BASE ?= UART2_BASE
369endif
370
371ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mm_cl_iot_gate))
372CFG_DDR_SIZE ?= 0x40000000
373CFG_UART_BASE ?= UART3_BASE
374CFG_NSEC_DDR_1_BASE ?= 0x80000000UL
375CFG_NSEC_DDR_1_SIZE ?= 0x40000000UL
376endif
377
378ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk))
379CFG_DDR_SIZE ?= 0x80000000
380CFG_UART_BASE ?= UART2_BASE
381endif
382
383ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mpevk))
384CFG_DDR_SIZE ?= UL(0x180000000)
385CFG_UART_BASE ?= UART2_BASE
386$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
387$(call force,CFG_CORE_ARM64_PA_BITS,36)
388endif
389
390ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mp_rsb3720_6g))
391CFG_DDR_SIZE ?= UL(0x180000000)
392CFG_UART_BASE ?= UART3_BASE
393CFG_TZDRAM_START ?= 0x56000000
394$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
395$(call force,CFG_CORE_ARM64_PA_BITS,36)
396endif
397
398ifneq (,$(filter $(PLATFORM_FLAVOR),mx8qxpmek mx8qmmek))
399CFG_DDR_SIZE ?= 0x80000000
400CFG_UART_BASE ?= UART0_BASE
401CFG_NSEC_DDR_1_BASE ?= 0x880000000UL
402CFG_NSEC_DDR_1_SIZE  ?= 0x380000000UL
403CFG_CORE_ARM64_PA_BITS ?= 40
404endif
405
406ifneq (,$(filter $(PLATFORM_FLAVOR),mx8dxmek))
407CFG_DDR_SIZE ?= 0x40000000
408CFG_UART_BASE ?= UART0_BASE
409$(call force,CFG_MX8DX,y)
410endif
411
412ifneq (,$(filter $(PLATFORM_FLAVOR),mx8dxlevk))
413CFG_DDR_SIZE ?= 0x40000000
414CFG_UART_BASE ?= UART0_BASE
415CFG_NSEC_DDR_1_BASE ?= 0x800000000UL
416CFG_NSEC_DDR_1_SIZE ?= 0x400000000UL
417CFG_CORE_ARM64_PA_BITS ?= 40
418endif
419
420ifneq (,$(filter $(PLATFORM_FLAVOR),mx8ulpevk))
421CFG_DDR_SIZE ?= 0x80000000
422CFG_UART_BASE ?= UART5_BASE
423endif
424
425ifneq (,$(filter $(PLATFORM_FLAVOR),mx93evk))
426CFG_DDR_SIZE ?= 0x80000000
427CFG_UART_BASE ?= UART1_BASE
428endif
429
430# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
431ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
432	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
433include core/arch/arm/cpu/cortex-a9.mk
434
435$(call force,CFG_PL310,y)
436
437CFG_PL310_LOCKED ?= y
438CFG_ENABLE_SCTLR_RR ?= y
439CFG_IMX_SCU ?= y
440endif
441
442ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
443CFG_DRAM_BASE ?= 0x10000000
444endif
445
446ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
447	$(CFG_MX6SX)))
448CFG_DRAM_BASE ?= 0x80000000
449endif
450
451ifeq ($(filter y, $(CFG_MX7)), y)
452CFG_INIT_CNTVOFF ?= y
453CFG_DRAM_BASE ?= 0x80000000
454endif
455
456ifeq ($(filter y, $(CFG_MX7ULP)), y)
457CFG_INIT_CNTVOFF ?= y
458CFG_DRAM_BASE ?= UL(0x60000000)
459$(call force,CFG_IMX_LPUART,y)
460$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
461endif
462
463ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
464$(call force,CFG_GIC,y)
465
466CFG_BOOT_SECONDARY_REQUEST ?= y
467CFG_DT ?= y
468CFG_DTB_MAX_SIZE ?= 0x20000
469CFG_PAGEABLE_ADDR ?= 0
470CFG_PSCI_ARM32 ?= y
471CFG_SECURE_TIME_SOURCE_REE ?= y
472CFG_UART_BASE ?= UART1_BASE
473endif
474
475ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX8M)))
476$(call force,CFG_IMX_UART,y)
477CFG_IMX_SNVS ?= y
478endif
479
480ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
481CFG_IMX_CSU ?= y
482endif
483
484ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
485CFG_HWSUPP_MEM_PERM_WXN = n
486CFG_IMX_WDOG ?= y
487endif
488
489ifeq ($(CFG_ARM64_core),y)
490# arm-v8 platforms
491include core/arch/arm/cpu/cortex-armv8-0.mk
492$(call force,CFG_ARM_GICV3,y)
493$(call force,CFG_GIC,y)
494$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
495$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
496
497CFG_CRYPTO_WITH_CE ?= y
498
499supported-ta-targets = ta_arm64
500endif
501
502CFG_TZDRAM_SIZE ?= 0x01e00000
503CFG_SHMEM_SIZE ?= 0x00200000
504CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - $(CFG_TZDRAM_SIZE) - $(CFG_SHMEM_SIZE) + $(CFG_DDR_SIZE))
505CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
506
507# Enable embedded tests by default
508CFG_ENABLE_EMBEDDED_TESTS ?= y
509
510# Set default heap size for imx platforms to 128k
511CFG_CORE_HEAP_SIZE ?= 131072
512
513CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
514CFG_MMAP_REGIONS ?= 24
515
516# SE05X and OCOTP both implement tee_otp_get_die_id()
517ifeq ($(CFG_NXP_SE05X),y)
518$(call force,CFG_IMX_OCOTP,n)
519endif
520CFG_IMX_OCOTP ?= y
521CFG_IMX_DIGPROG ?= y
522CFG_PKCS11_TA ?= y
523
524# Almost all platforms include CAAM HW Modules, except the
525# ones forced to be disabled
526CFG_NXP_CAAM ?= n
527
528ifeq ($(CFG_NXP_CAAM),y)
529ifeq ($(filter y, $(CFG_MX8QM) $(CFG_MX8QX) $(CFG_MX8DXL)), y)
530CFG_IMX_SC ?= y
531CFG_IMX_MU ?= y
532endif
533
534else
535
536ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
537CFG_IMX_CAAM ?= y
538endif
539
540endif
541