xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision 0d77037f5943c86560dd7c8f473fbc6a55d60a34) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8
9mx6ull-flavorlist = \
10	mx6ullevk \
11
12mx6q-flavorlist = \
13	mx6qsabrelite \
14	mx6qsabreauto \
15	mx6qsabresd \
16	mx6qhmbedge \
17	mx6qapalis \
18
19mx6qp-flavorlist = \
20	mx6qpsabreauto \
21	mx6qpsabresd \
22
23mx6sl-flavorlist = \
24	mx6slevk
25
26mx6sll-flavorlist = \
27	mx6sllevk
28
29mx6sx-flavorlist = \
30	mx6sxsabreauto \
31	mx6sxsabresd \
32	mx6sxudooneofull \
33
34mx6d-flavorlist = \
35	mx6dhmbedge \
36	mx6dapalis \
37
38mx6dl-flavorlist = \
39	mx6dlsabreauto \
40	mx6dlsabresd \
41	mx6dlhmbedge \
42
43mx6s-flavorlist = \
44	mx6shmbedge \
45	mx6solosabresd \
46	mx6solosabreauto \
47
48mx7d-flavorlist = \
49	mx7dsabresd \
50	mx7dpico_mbl \
51	mx7dclsom \
52
53mx7s-flavorlist = \
54	mx7swarp7 \
55	mx7swarp7_mbl \
56
57mx7ulp-flavorlist = \
58	mx7ulpevk
59
60imx8mq-flavorlist = \
61	imx8mqevk
62
63imx8mm-flavorlist = \
64	imx8mmevk
65
66imx8mn-flavorlist = \
67	imx8mnevk
68
69imx8qm-flavorlist = \
70	imx8qmmek \
71
72imx8qx-flavorlist = \
73	imx8qxpmek \
74
75ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
76$(call force,CFG_MX6,y)
77$(call force,CFG_MX6UL,y)
78$(call force,CFG_TEE_CORE_NB_CORE,1)
79include core/arch/arm/cpu/cortex-a7.mk
80else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
81$(call force,CFG_MX6,y)
82$(call force,CFG_MX6ULL,y)
83$(call force,CFG_TEE_CORE_NB_CORE,1)
84$(call force,CFG_IMX_CAAM,n)
85$(call force,CFG_NXP_CAAM,n)
86include core/arch/arm/cpu/cortex-a7.mk
87else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
88$(call force,CFG_MX6,y)
89$(call force,CFG_MX6Q,y)
90$(call force,CFG_TEE_CORE_NB_CORE,4)
91else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
92$(call force,CFG_MX6,y)
93$(call force,CFG_MX6QP,y)
94$(call force,CFG_TEE_CORE_NB_CORE,4)
95else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
96$(call force,CFG_MX6,y)
97$(call force,CFG_MX6D,y)
98$(call force,CFG_TEE_CORE_NB_CORE,2)
99else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
100$(call force,CFG_MX6,y)
101$(call force,CFG_MX6DL,y)
102$(call force,CFG_TEE_CORE_NB_CORE,2)
103else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
104$(call force,CFG_MX6,y)
105$(call force,CFG_MX6S,y)
106$(call force,CFG_TEE_CORE_NB_CORE,1)
107else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
108$(call force,CFG_MX6,y)
109$(call force,CFG_MX6SL,y)
110$(call force,CFG_TEE_CORE_NB_CORE,1)
111$(call force,CFG_IMX_CAAM,n)
112else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
113$(call force,CFG_MX6,y)
114$(call force,CFG_MX6SLL,y)
115$(call force,CFG_TEE_CORE_NB_CORE,1)
116$(call force,CFG_IMX_CAAM,n)
117$(call force,CFG_NXP_CAAM,n)
118else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
119$(call force,CFG_MX6,y)
120$(call force,CFG_MX6SX,y)
121$(call force,CFG_TEE_CORE_NB_CORE,1)
122else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
123$(call force,CFG_MX7,y)
124$(call force,CFG_TEE_CORE_NB_CORE,1)
125include core/arch/arm/cpu/cortex-a7.mk
126else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
127$(call force,CFG_MX7,y)
128$(call force,CFG_TEE_CORE_NB_CORE,2)
129include core/arch/arm/cpu/cortex-a7.mk
130else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
131$(call force,CFG_MX7ULP,y)
132$(call force,CFG_TEE_CORE_NB_CORE,1)
133$(call force,CFG_TZC380,n)
134$(call force,CFG_CSU,n)
135$(call force,CFG_NXP_CAAM,n)
136include core/arch/arm/cpu/cortex-a7.mk
137else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mq-flavorlist)))
138$(call force,CFG_IMX8MQ,y)
139$(call force,CFG_ARM64_core,y)
140CFG_IMX_UART ?= y
141CFG_DRAM_BASE ?= 0x40000000
142CFG_TEE_CORE_NB_CORE ?= 4
143else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mm-flavorlist)))
144$(call force,CFG_IMX8MM,y)
145$(call force,CFG_ARM64_core,y)
146CFG_IMX_UART ?= y
147CFG_DRAM_BASE ?= 0x40000000
148CFG_TEE_CORE_NB_CORE ?= 4
149else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mn-flavorlist)))
150$(call force,CFG_IMX8MN,y)
151$(call force,CFG_ARM64_core,y)
152CFG_IMX_UART ?= y
153CFG_DRAM_BASE ?= 0x40000000
154CFG_TEE_CORE_NB_CORE ?= 4
155else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8qm-flavorlist)))
156$(call force,CFG_IMX8QM,y)
157$(call force,CFG_ARM64_core,y)
158$(call force,CFG_IMX_SNVS,n)
159CFG_IMX_LPUART ?= y
160CFG_DRAM_BASE ?= 0x40000000
161CFG_TEE_CORE_NB_CORE ?= 6
162$(call force,CFG_NXP_CAAM,n)
163else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8qx-flavorlist)))
164$(call force,CFG_IMX8QX,y)
165$(call force,CFG_ARM64_core,y)
166CFG_IMX_LPUART ?= y
167CFG_DRAM_BASE ?= 0x40000000
168CFG_TEE_CORE_NB_CORE ?= 4
169$(call force,CFG_NXP_CAAM,n)
170else
171$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
172endif
173
174ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
175CFG_DDR_SIZE ?= 0x40000000
176CFG_NS_ENTRY_ADDR ?= 0x80800000
177endif
178
179ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
180CFG_DDR_SIZE ?= 0x40000000
181CFG_UART_BASE ?= UART1_BASE
182endif
183
184ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
185CFG_DDR_SIZE ?= 0x20000000
186CFG_NS_ENTRY_ADDR ?= 0x87800000
187CFG_DT_ADDR ?= 0x83100000
188CFG_UART_BASE ?= UART5_BASE
189CFG_BOOT_SECONDARY_REQUEST ?= n
190CFG_EXTERNAL_DTB_OVERLAY ?= y
191CFG_IMX_WDOG_EXT_RESET ?= y
192endif
193
194ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
195CFG_DDR_SIZE ?= 0x20000000
196CFG_NS_ENTRY_ADDR ?= 0x80800000
197CFG_BOOT_SECONDARY_REQUEST ?= n
198endif
199
200ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
201CFG_DDR_SIZE ?= 0x20000000
202CFG_NS_ENTRY_ADDR ?= 0x87800000
203CFG_DT_ADDR ?= 0x83100000
204CFG_BOOT_SECONDARY_REQUEST ?= n
205CFG_EXTERNAL_DTB_OVERLAY = y
206CFG_IMX_WDOG_EXT_RESET = y
207endif
208
209ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
210CFG_DDR_SIZE ?= 0x40000000
211CFG_NS_ENTRY_ADDR ?= 0x60800000
212CFG_UART_BASE ?= UART4_BASE
213endif
214
215ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
216	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd \
217	mx6dapalis mx6qapalis))
218CFG_DDR_SIZE ?= 0x40000000
219CFG_NS_ENTRY_ADDR ?= 0x12000000
220endif
221
222ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
223	mx6dlsabreauto mx6solosabreauto))
224CFG_DDR_SIZE ?= 0x80000000
225CFG_NS_ENTRY_ADDR ?= 0x12000000
226endif
227
228ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
229CFG_DDR_SIZE ?= 0x80000000
230CFG_UART_BASE ?= UART1_BASE
231endif
232
233ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
234CFG_DDR_SIZE ?= 0x40000000
235CFG_NS_ENTRY_ADDR ?= 0x12000000
236endif
237
238ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
239CFG_DDR_SIZE ?= 0x40000000
240CFG_NS_ENTRY_ADDR ?= 0x12000000
241CFG_UART_BASE ?= UART2_BASE
242endif
243
244ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
245CFG_NS_ENTRY_ADDR ?= 0x80800000
246CFG_DDR_SIZE ?= 0x40000000
247endif
248
249ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
250CFG_NS_ENTRY_ADDR ?= 0x80800000
251CFG_DDR_SIZE ?= 0x80000000
252endif
253
254ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
255CFG_DDR_SIZE ?= 0x80000000
256CFG_NS_ENTRY_ADDR ?= 0x80800000
257endif
258
259ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
260CFG_DDR_SIZE ?= 0x40000000
261CFG_NS_ENTRY_ADDR ?= 0x80800000
262endif
263
264ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
265CFG_DDR_SIZE ?= 0x40000000
266CFG_UART_BASE ?= UART1_BASE
267endif
268
269ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk))
270CFG_DDR_SIZE ?= 0x20000000
271CFG_NS_ENTRY_ADDR ?= 0x80800000
272endif
273
274ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
275CFG_DDR_SIZE ?= 0x10000000
276CFG_NS_ENTRY_ADDR ?= 0x80800000
277CFG_UART_BASE ?= UART5_BASE
278endif
279
280ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
281CFG_DDR_SIZE ?= 0x10000000
282CFG_NS_ENTRY_ADDR ?= 0x80800000
283endif
284
285ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mqevk))
286CFG_DDR_SIZE ?= 0xc0000000
287CFG_UART_BASE ?= UART1_BASE
288endif
289
290ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mmevk))
291CFG_DDR_SIZE ?= 0x80000000
292CFG_UART_BASE ?= UART2_BASE
293endif
294
295ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mnevk))
296CFG_DDR_SIZE ?= 0x80000000
297CFG_UART_BASE ?= UART2_BASE
298endif
299
300ifneq (,$(filter $(PLATFORM_FLAVOR),imx8qxpmek imx8qmmek))
301CFG_DDR_SIZE ?= 0x80000000
302CFG_UART_BASE ?= UART0_BASE
303endif
304
305# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
306ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
307	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
308include core/arch/arm/cpu/cortex-a9.mk
309
310$(call force,CFG_PL310,y)
311
312CFG_PL310_LOCKED ?= y
313CFG_ENABLE_SCTLR_RR ?= y
314CFG_SCU ?= y
315endif
316
317ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
318CFG_DRAM_BASE ?= 0x10000000
319endif
320
321ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
322	$(CFG_MX6SX)))
323CFG_DRAM_BASE ?= 0x80000000
324endif
325
326ifeq ($(filter y, $(CFG_MX7)), y)
327CFG_INIT_CNTVOFF ?= y
328CFG_DRAM_BASE ?= 0x80000000
329endif
330
331ifeq ($(filter y, $(CFG_MX7ULP)), y)
332CFG_INIT_CNTVOFF ?= y
333CFG_DRAM_BASE ?= 0x80000000
334$(call force,CFG_IMX_LPUART,y)
335$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
336endif
337
338ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
339$(call force,CFG_GENERIC_BOOT,y)
340$(call force,CFG_GIC,y)
341$(call force,CFG_PM_STUBS,y)
342
343CFG_BOOT_SYNC_CPU ?= n
344CFG_BOOT_SECONDARY_REQUEST ?= y
345CFG_DT ?= y
346CFG_PAGEABLE_ADDR ?= 0
347CFG_PSCI_ARM32 ?= y
348CFG_SECURE_TIME_SOURCE_REE ?= y
349CFG_UART_BASE ?= UART1_BASE
350endif
351
352ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
353$(call force,CFG_IMX_UART,y)
354CFG_CSU ?= y
355endif
356
357ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
358CFG_HWSUPP_MEM_PERM_WXN = n
359CFG_IMX_WDOG ?= y
360endif
361
362ifeq ($(CFG_ARM64_core),y)
363# arm-v8 platforms
364include core/arch/arm/cpu/cortex-armv8-0.mk
365$(call force,CFG_ARM_GICV3,y)
366$(call force,CFG_GENERIC_BOOT,y)
367$(call force,CFG_GIC,y)
368$(call force,CFG_WITH_LPAE,y)
369$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
370$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
371
372CFG_CRYPTO_WITH_CE ?= y
373CFG_PM_STUBS ?= y
374
375supported-ta-targets = ta_arm64
376endif
377
378CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
379CFG_TZDRAM_SIZE ?= 0x01e00000
380CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
381CFG_SHMEM_SIZE ?= 0x00200000
382
383CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
384CFG_WITH_STACK_CANARIES ?= y
385CFG_MMAP_REGIONS ?= 24
386
387# Almost all platforms include CAAM HW Modules, except the
388# ones forced to be disabled
389CFG_NXP_CAAM ?= n
390
391ifeq ($(CFG_NXP_CAAM),y)
392# As NXP CAAM Driver is enabled, disable the small local CAAM driver
393# used just to release Job Rings to Non-Secure world
394$(call force,CFG_IMX_CAAM,n)
395
396# If NXP CAAM Driver is supported, the Crypto Driver interfacing
397# it with generic crypto API can be enabled.
398CFG_CRYPTO_DRIVER ?= y
399# Crypto Driver Debug
400CFG_CRYPTO_DRIVER_DEBUG ?= n
401else
402$(call force,CFG_CRYPTO_DRIVER,n)
403$(call force,CFG_WITH_SOFTWARE_PRNG,y)
404
405ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
406CFG_IMX_CAAM ?= y
407endif
408endif
409
410# Cryptographic configuration
411include core/arch/arm/plat-imx/crypto_conf.mk
412