1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2022, 2025, Arm Limited 4 */ 5 6 #include <console.h> 7 #include <drivers/gic.h> 8 #include <drivers/pl011.h> 9 #include <kernel/boot.h> 10 #include <mm/core_mmu.h> 11 #include <platform_config.h> 12 #include <stdint.h> 13 #include <trace.h> 14 15 static struct pl011_data console_data __nex_bss; 16 17 register_ddr(DRAM0_BASE, DRAM0_SIZE); 18 19 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, PL011_REG_SIZE); 20 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICD_BASE, GIC_DIST_REG_SIZE); 21 22 #ifdef CFG_ARM_GICV3 23 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICR_BASE, GIC_REDIST_REG_SIZE); 24 #else 25 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICC_BASE, GIC_CPU_REG_SIZE); 26 #endif 27 28 void boot_primary_init_intc(void) 29 { 30 #ifdef CFG_ARM_GICV3 31 gic_init_v3(0, GICD_BASE, GICR_BASE); 32 #else 33 gic_init(GICC_BASE, GICD_BASE); 34 #endif 35 } 36 37 void boot_secondary_init_intc(void) 38 { 39 gic_init_per_cpu(); 40 } 41 42 void plat_console_init(void) 43 { 44 pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ, 45 CONSOLE_BAUDRATE); 46 register_serial_console(&console_data.chip); 47 } 48