1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3 * Copyright (c) 2022, 2025-2026, Arm Limited
4 */
5
6 #include <console.h>
7 #include <drivers/gic.h>
8 #include <drivers/pl011.h>
9 #include <kernel/boot.h>
10 #include <mm/core_mmu.h>
11 #include <platform_config.h>
12 #include <stdint.h>
13 #include <trace.h>
14
15 static struct pl011_data console_data __nex_bss;
16
17 register_ddr(DRAM0_BASE, DRAM0_SIZE);
18
19 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
20 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICD_BASE, GIC_DIST_REG_SIZE);
21
22 #ifdef _CFG_ARM_V3_OR_V4
23 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICR_BASE,
24 GIC_REDIST_REG_SIZE * CFG_TEE_CORE_NB_CORE);
25 #else
26 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICC_BASE, GIC_CPU_REG_SIZE);
27 #endif
28
boot_primary_init_intc(void)29 void boot_primary_init_intc(void)
30 {
31 #ifdef _CFG_ARM_V3_OR_V4
32 gic_init_v3(0, GICD_BASE, GICR_BASE);
33 #else
34 gic_init(GICC_BASE, GICD_BASE);
35 #endif
36 }
37
boot_secondary_init_intc(void)38 void boot_secondary_init_intc(void)
39 {
40 gic_init_per_cpu();
41 }
42
plat_console_init(void)43 void plat_console_init(void)
44 {
45 pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ,
46 CONSOLE_BAUDRATE);
47 register_serial_console(&console_data.chip);
48 }
49