1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright 2019 Broadcom. 4 */ 5 6 #include <bcm_elog.h> 7 #include <console.h> 8 #include <drivers/gic.h> 9 #include <drivers/serial8250_uart.h> 10 #include <kernel/generic_boot.h> 11 #include <kernel/interrupt.h> 12 #include <kernel/panic.h> 13 #include <kernel/pm_stubs.h> 14 #include <mm/core_memprot.h> 15 #include <mm/tee_pager.h> 16 #include <platform_config.h> 17 #include <stdint.h> 18 #include <tee/entry_fast.h> 19 #include <tee/entry_std.h> 20 21 static const struct thread_handlers handlers = { 22 .cpu_on = cpu_on_handler, 23 .cpu_off = pm_do_nothing, 24 .cpu_suspend = pm_do_nothing, 25 .cpu_resume = pm_do_nothing, 26 .system_off = pm_do_nothing, 27 .system_reset = pm_do_nothing, 28 }; 29 30 static struct gic_data gic_data; 31 struct serial8250_uart_data console_data; 32 33 #ifdef BCM_DEVICE0_BASE 34 register_phys_mem_pgdir(MEM_AREA_IO_SEC, BCM_DEVICE0_BASE, BCM_DEVICE0_SIZE); 35 #endif 36 #ifdef BCM_DEVICE1_BASE 37 register_phys_mem_pgdir(MEM_AREA_IO_SEC, BCM_DEVICE1_BASE, BCM_DEVICE1_SIZE); 38 #endif 39 #ifdef BCM_DEVICE2_BASE 40 register_phys_mem_pgdir(MEM_AREA_IO_SEC, BCM_DEVICE2_BASE, BCM_DEVICE2_SIZE); 41 #endif 42 #ifdef BCM_DEVICE3_BASE 43 register_phys_mem_pgdir(MEM_AREA_IO_SEC, BCM_DEVICE3_BASE, BCM_DEVICE3_SIZE); 44 #endif 45 #ifdef BCM_DEVICE4_BASE 46 register_phys_mem_pgdir(MEM_AREA_IO_SEC, BCM_DEVICE4_BASE, BCM_DEVICE4_SIZE); 47 #endif 48 #ifdef BCM_DEVICE5_BASE 49 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, BCM_DEVICE5_BASE, BCM_DEVICE5_SIZE); 50 #endif 51 #ifdef BCM_DRAM0_NS_BASE 52 register_dynamic_shm(BCM_DRAM0_NS_BASE, BCM_DRAM0_NS_SIZE); 53 #endif 54 #ifdef BCM_DRAM1_NS_BASE 55 register_dynamic_shm(BCM_DRAM1_NS_BASE, BCM_DRAM1_NS_SIZE); 56 #endif 57 #ifdef BCM_DRAM2_NS_BASE 58 register_dynamic_shm(BCM_DRAM2_NS_BASE, BCM_DRAM2_NS_SIZE); 59 #endif 60 #ifdef BCM_DRAM0_SEC_BASE 61 register_phys_mem(MEM_AREA_RAM_SEC, BCM_DRAM0_SEC_BASE, BCM_DRAM0_SEC_SIZE); 62 #endif 63 #ifdef CFG_BCM_ELOG_AP_UART_LOG_BASE 64 register_phys_mem(MEM_AREA_IO_NSEC, CFG_BCM_ELOG_AP_UART_LOG_BASE, 65 CFG_BCM_ELOG_AP_UART_LOG_SIZE); 66 #endif 67 #ifdef CFG_BCM_ELOG_BASE 68 register_phys_mem(MEM_AREA_RAM_NSEC, CFG_BCM_ELOG_BASE, CFG_BCM_ELOG_SIZE); 69 #endif 70 71 const struct thread_handlers *generic_boot_get_handlers(void) 72 { 73 return &handlers; 74 } 75 76 void plat_trace_ext_puts(const char *str) 77 { 78 const char *p; 79 80 for (p = str; *p; p++) 81 bcm_elog_putchar(*p); 82 } 83 84 void console_init(void) 85 { 86 serial8250_uart_init(&console_data, CONSOLE_UART_BASE, 87 CONSOLE_UART_CLK_IN_HZ, CONSOLE_BAUDRATE); 88 register_serial_console(&console_data.chip); 89 90 bcm_elog_init(CFG_BCM_ELOG_AP_UART_LOG_BASE, 91 CFG_BCM_ELOG_AP_UART_LOG_SIZE); 92 } 93 94 void itr_core_handler(void) 95 { 96 gic_it_handle(&gic_data); 97 } 98 99 void main_init_gic(void) 100 { 101 vaddr_t gicd_base; 102 103 gicd_base = core_mmu_get_va(GICD_BASE, MEM_AREA_IO_SEC); 104 105 if (!gicd_base) 106 panic(); 107 108 gic_init_base_addr(&gic_data, 0, gicd_base); 109 itr_init(&gic_data.chip); 110 111 } 112