History log of /optee_os/core/arch/arm/plat-bcm/main.c (Results 1 – 18 of 18)
Revision Date Author Comments
# 55ab8f06 27-Feb-2024 Alvin Chang <alvinga@andestech.com>

core: Refactor console_init() and introduce plat_console_init()

Since there are some cross-platform console drivers, we let
console_init() be common code to have a chance to initialize those
console

core: Refactor console_init() and introduce plat_console_init()

Since there are some cross-platform console drivers, we let
console_init() be common code to have a chance to initialize those
console drivers (e.g., semihosting console).

If the cross-platform console drivers are not configured to be compiled,
plat_console_init() will be invoked to initialize platform-specific
console driver.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# df913c6d 02-Aug-2023 Alvin Chang <alvinga@andestech.com>

core: arm: Rename primary_init_intc() to boot_primary_init_intc()

Since interrupt controllers are usually initialized in boot stage,
rename primary_init_intc() to boot_primary_init_intc().

Signed-o

core: arm: Rename primary_init_intc() to boot_primary_init_intc()

Since interrupt controllers are usually initialized in boot stage,
rename primary_init_intc() to boot_primary_init_intc().

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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# ef50391e 19-Jul-2023 Marouene Boubakri <marouene.boubakri@nxp.com>

core: rename interrupt controller functions

This commit renames interrupt controller function names
to be more generic:
- Rename main_init_gic() to primary_init_intc()
- Rename secondary_init_gic()

core: rename interrupt controller functions

This commit renames interrupt controller function names
to be more generic:
- Rename main_init_gic() to primary_init_intc()
- Rename secondary_init_gic() to secondary_init_intc()

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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# 0ee3f52e 16-May-2023 Etienne Carriere <etienne.carriere@linaro.org>

drivers: gic: factorize call to gic_init() or gic_init_base_addr()

Platforms call either gic_init() or gic_init_base_addr() depending
on whether CFG_WITH_ARM_TRUSTED_FW is defined or not. This chang

drivers: gic: factorize call to gic_init() or gic_init_base_addr()

Platforms call either gic_init() or gic_init_base_addr() depending
on whether CFG_WITH_ARM_TRUSTED_FW is defined or not. This change
factorize this logic from gic_init() implementation and makes
gic_init_base_addr() local to gic.c.

For that purpose functions gic_init_base_address() and gic_dt_get_irq()
are moved inside gic.c source file.
source file.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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# 67e55c51 16-May-2023 Etienne Carriere <etienne.carriere@linaro.org>

core: define main interrupt controller data from its driver

All but one platforms define CPU core interrupt controller from their
platform main.c source file next to its main interrupt handler.
This

core: define main interrupt controller data from its driver

All but one platforms define CPU core interrupt controller from their
platform main.c source file next to its main interrupt handler.
This change factorize these implementation by moving the definition
of the controller data instance straight in the controller driver
source file. This change makes each controller driver to implement
straight itr_core_handler() function, preventing a extra branch on
interrupt execution. Interrupt controller driver initialization
function now straight calls itr_core_init().

This changes treats case when CFG_CORE_WORKAROUND_ARM_NMFI is enable
to not conflict with core/arch/arm/kernel/thread.c that already
overrides itr_core_handler() weak implementation.

With this change, the main controller initialization function
(gic_init(), gic_init_base_addr(), gic_cpu_init() and hfic_init())
no more gets the controller data as input argument.

As a consequence, definition of struct hfic_data and struct gic_data
moves from their respective driver header file to the respective
driver source file.

As a consequence, gic_dump() no more requires an argument.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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# 3c108a74 08-Jul-2022 Andrew Mustea <andrew.mustea@microsoft.com>

core: plat-bcm: remove virtual address lookup from main_init_gic()

- Commit 60801696667d ("plat: arm: refactor GIC initialization")
refactored GIC initialization to have gic_init_base_addr() take

core: plat-bcm: remove virtual address lookup from main_init_gic()

- Commit 60801696667d ("plat: arm: refactor GIC initialization")
refactored GIC initialization to have gic_init_base_addr() take in a
physical address instead of a virtual one, meaning that a virtual
address lookup is no longer necessary within a platform's gic_init().
- BCM's main_init_gic() would still perform a virtual memory lookup and
hand over its virtual address instead of the expected physical one.
This caused the lookup in gic_init_base_addr() to fail and panic.
- This new commit removes the virtual memory lookup from BCM's
main_gic_init() and instead hands gic_init_base_addr() a physical
address.

Signed-off-by: Andrew Mustea <andrew.mustea@microsoft.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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# c2e4eb43 23-May-2021 Anton Rybakov <a.rybakov@omp.ru>

core_mmu: fix phys_to_virt() to check length

phys_to_virt() function without length parameter doesn`t
always have ability to find the correct mapping for
requested physical address. This is because

core_mmu: fix phys_to_virt() to check length

phys_to_virt() function without length parameter doesn`t
always have ability to find the correct mapping for
requested physical address. This is because physical
address can be mapped in the same time in different virtual
regions with different length. So the first found region
which contains the requested physical address possibly
doesn`t have enough mapped data. This is fixed by adding
the length parameter to phys_to_virt() function. Length
parameter can be set to 1 if caller knows that requested
(pa + len) doesn`t cross mapping granule boundary.

core_mmu_get_va() and io_pa_or_va() functions now are
take length parameter too as they based on phys_to_virt()
in case of MMU enabled.

Signed-off-by: Anton Rybakov <a.rybakov@omp.ru>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek)

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# 651d7537 07-Jun-2020 Jens Wiklander <jens.wiklander@linaro.org>

core: remove boot_get_handlers()

struct thread_handlers is used to pass the entry functions
for different power management events. In practice only .cpu_on is used
and with the default function at t

core: remove boot_get_handlers()

struct thread_handlers is used to pass the entry functions
for different power management events. In practice only .cpu_on is used
and with the default function at that. In the ARMv7 case where the
secure monitor replaces TF-A not even that function entry is used.

Remove struct thread_handlers and boot_get_handlers(). When configured
with TF-A initialize thread_*_handler_ptr with __weak default functions.

The __weak default PM functions
- thread_cpu_off_handler()
- thread_cpu_suspend_handler()
- thread_cpu_resume_handler()
- thread_system_off_handler()
- thread_system_reset_handler()
can be overridden by platforms when needed.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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# 65401337 07-Jun-2020 Jens Wiklander <jens.wiklander@linaro.org>

core: remove generic_ from generic_boot

Now that the CFG_GENERIC_BOOT configuration flag has been removed also
remove "generic_" prefix from and in the related files.

Acked-by: Etienne Carriere <et

core: remove generic_ from generic_boot

Now that the CFG_GENERIC_BOOT configuration flag has been removed also
remove "generic_" prefix from and in the related files.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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# e605fbdf 02-Aug-2019 Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>

pta: bcm: Add PTA to handle Broadcom error logs

Add PTA to handle Broadcom error logs.
The PTA supports following ops:
- Obtaining error logs
- Obtaining crash dumps and
- Loading firmware into s

pta: bcm: Add PTA to handle Broadcom error logs

Add PTA to handle Broadcom error logs.
The PTA supports following ops:
- Obtaining error logs
- Obtaining crash dumps and
- Loading firmware into secure ddr memory region

Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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# 9348a85a 14-Aug-2019 Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>

plat-bcm: Add Broadcom platform specific err log support

Add Broadcom platform specific err logging support

Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Acked-by: Jerome Forissie

plat-bcm: Add Broadcom platform specific err log support

Add Broadcom platform specific err logging support

Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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# 95bec10a 17-Jul-2019 Vikas Gupta <vikas.gupta@broadcom.com>

drivers: bnxt: add Broadcom bnxt driver

Add Broadcom bnxt driver which helps to load the
firmware on bnxt device

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Sheetal Tigadol

drivers: bnxt: add Broadcom bnxt driver

Add Broadcom bnxt driver which helps to load the
firmware on bnxt device

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Reviewed-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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# e9f46c74 13-Aug-2019 Jens Wiklander <jens.wiklander@linaro.org>

core: replace thread_nintr_handler_ptr with weak function

Removes registration of platform specific secure interrupt handler in
thread_nintr_handler_ptr. Instead a __weak overridable
itr_core_handle

core: replace thread_nintr_handler_ptr with weak function

Removes registration of platform specific secure interrupt handler in
thread_nintr_handler_ptr. Instead a __weak overridable
itr_core_handler() is provided. Platforms which expects to receive
secure interrupts must override the default function. The default
function calls panic() if called.

With this also nintr is removed from struct thread_handlers and
consequently all platforms are updated to stop using that field.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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# 612791d0 13-Aug-2019 Jens Wiklander <jens.wiklander@linaro.org>

core: replace thread_fast_smc_handler_ptr with weak function

Removes registration of platform specific fast SMC entry function in
thread_fast_smc_handler_ptr. Instead a __weak overridable
tee_entry_

core: replace thread_fast_smc_handler_ptr with weak function

Removes registration of platform specific fast SMC entry function in
thread_fast_smc_handler_ptr. Instead a __weak overridable
tee_entry_fast() is provided. Platforms that need a special
tee_entry_fast() (currently on plat-zynq7k) provides their own
tee_entry_fast() instead which at the end should call __tee_entry_fast()
which does the generic fast call handling.

With this also fast_smc is removed from struct thread_handlers and
consequently all platforms are updated to stop using that field.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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# 2dd2ca5f 13-Aug-2019 Jens Wiklander <jens.wiklander@linaro.org>

core: replace thread_std_smc_handler_ptr with weak function

Removes registration of platform specific standard SMC entry function in
thread_std_smc_handler_ptr. Instead a __weak overridable tee_entr

core: replace thread_std_smc_handler_ptr with weak function

Removes registration of platform specific standard SMC entry function in
thread_std_smc_handler_ptr. Instead a __weak overridable tee_entry_std()
is provided. Platforms that need a special tee_entry_std() (currently on
some STM platform) provides their own tee_entry_std() instead which at
the end should call __tee_entry_std() which does the generic standard
call handling.

With this also std_smc is removed from struct thread_handlers and
consequently all platforms are updated to stop using that field.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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# 7695df05 02-Apr-2019 Sandeep Tripathy <sandeep.tripathy@broadcom.com>

plat-bcm: update platform configurations

-add more device ranges and definitions.
-fix dynamic shm api.
-cleanup plaform def.
-enable PL022 SPI, bcm HWRNG and bcm SOTP driver.

Acked-by: Etienne Car

plat-bcm: update platform configurations

-add more device ranges and definitions.
-fix dynamic shm api.
-cleanup plaform def.
-enable PL022 SPI, bcm HWRNG and bcm SOTP driver.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>

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# a5e82dc7 11-Feb-2019 Jerome Forissier <jerome.forissier@linaro.org>

core_mmu: do not restrict device memory mapping to PGDIR_SIZE granularity

Device memory registered via register_phys_mem() is currently rounded
up/down to CORE_MMU_PGDIR_SIZE (1 MiB, or 2 MiB for LP

core_mmu: do not restrict device memory mapping to PGDIR_SIZE granularity

Device memory registered via register_phys_mem() is currently rounded
up/down to CORE_MMU_PGDIR_SIZE (1 MiB, or 2 MiB for LPAE). This is not
needed and possibly incorrect for SoCs that define I/O memory maps with
regions aligned on a small page (4 KiB), because using a larger
granularity could result in overlaps between secure and non-secure
mappings. This could cause issues depending on the type of memory
firewall used by the SoC and its configuration. In any case, memory
types other than MEM_AREA_IO_{SEC,NSEC} *can* be mapped with small page
granularity using register_phys_mem(), so the situation is a bit
inconsistent.

This commit removes the rounding by default and provides a new macro:
register_phys_mem_pgdir(). Platforms that still need to use PGDIR_SIZE
granularity (typically because it consumes less page table space) need
to replace register_phys_mem() by register_phys_mem_pgdir().

In order to avoid any functional change in platform code, all calls to
register_phys_mem() with device memory are replaced with
register_phys_mem_pgdir(). In addition, CORE_MMU_DEVICE_SIZE is removed
and replaced with CORE_MMU_PGDIR_SIZE since there is no unique mapping
size for device memory anymore.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reported-by: Zeng Tao <prime.zeng@hisilicon.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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# 1a4fa97d 25-Jan-2019 Sandeep Tripathy <sandeep.tripathy@broadcom.com>

plat-bcm: Add Broadcom ARMv8-A SoC ns3

Add base platform support for Broadcom ns3 SoC.
Broadcom ns3 is ARMv8-A based SoS with Cortex-A72 cores
and GICv3. It is configured to run with TF-A.

Signed-o

plat-bcm: Add Broadcom ARMv8-A SoC ns3

Add base platform support for Broadcom ns3 SoC.
Broadcom ns3 is ARMv8-A based SoS with Cortex-A72 cores
and GICv3. It is configured to run with TF-A.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Reviewed-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Pramod Kumar <pramod.kumar@broadcom.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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