1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright (c) 2017-2023, Linaro Limited 4 */ 5 #ifndef __SM_PSCI_H 6 #define __SM_PSCI_H 7 8 #include <kernel/thread.h> 9 #include <sm/sm.h> 10 #include <stdint.h> 11 12 #define PSCI_VERSION_0_2 U(0x00000002) 13 #define PSCI_VERSION_1_0 U(0x00010000) 14 #define PSCI_VERSION_1_1 U(0x00010001) 15 #define PSCI_VERSION U(0x84000000) 16 #define PSCI_CPU_SUSPEND U(0x84000001) 17 #define PSCI_CPU_OFF U(0x84000002) 18 #define PSCI_CPU_ON U(0x84000003) 19 #define PSCI_CPU_ON_SMC64 (PSCI_CPU_ON | U(0x40000000)) 20 #define PSCI_AFFINITY_INFO U(0x84000004) 21 #define PSCI_MIGRATE U(0x84000005) 22 #define PSCI_MIGRATE_INFO_TYPE U(0x84000006) 23 #define PSCI_MIGRATE_INFO_UP_CPU U(0x84000007) 24 #define PSCI_SYSTEM_OFF U(0x84000008) 25 #define PSCI_SYSTEM_RESET U(0x84000009) 26 #define PSCI_PSCI_FEATURES U(0x8400000a) 27 #define PSCI_CPU_FREEZE U(0x8400000b) 28 #define PSCI_CPU_DEFAULT_SUSPEND U(0x8400000c) 29 #define PSCI_NODE_HW_STATE U(0x8400000d) 30 #define PSCI_SYSTEM_SUSPEND U(0x8400000e) 31 #define PSCI_PSCI_SET_SUSPEND_MODE U(0x8400000f) 32 #define PSCI_FN_STAT_RESIDENCY U(0x84000010) 33 #define PSCI_FN_STAT_COUNT U(0x84000011) 34 #define PSCI_SYSTEM_RESET2 U(0x84000012) 35 #define PSCI_MEM_PROTECT U(0x84000013) 36 #define PSCI_MEM_PROTECT_CHECK_RANGE U(0x84000014) 37 38 #define PSCI_NUM_CALLS U(21) 39 40 #define PSCI_AFFINITY_LEVEL_ON U(0) 41 #define PSCI_AFFINITY_LEVEL_OFF U(1) 42 #define PSCI_AFFINITY_LEVEL_ON_PENDING U(2) 43 44 #define PSCI_POWER_STATE_ID_MASK U(0xffff) 45 #define PSCI_POWER_STATE_ID_SHIFT U(0) 46 #define PSCI_POWER_STATE_TYPE_SHIFT U(16) 47 #define PSCI_POWER_STATE_TYPE_MASK BIT32(PSCI_POWER_STATE_TYPE_SHIFT) 48 #define PSCI_POWER_STATE_AFFL_SHIFT U(24) 49 #define PSCI_POWER_STATE_AFFL_MASK SHIFT_U32(0x3, \ 50 PSCI_POWER_STATE_AFFL_SHIFT) 51 52 #define PSCI_POWER_STATE_TYPE_STANDBY U(0) 53 #define PSCI_POWER_STATE_TYPE_POWER_DOWN U(1) 54 55 #define PSCI_RET_SUCCESS (0) 56 #define PSCI_RET_NOT_SUPPORTED (-1) 57 #define PSCI_RET_INVALID_PARAMETERS (-2) 58 #define PSCI_RET_DENIED (-3) 59 #define PSCI_RET_ALREADY_ON (-4) 60 #define PSCI_RET_ON_PENDING (-5) 61 #define PSCI_RET_INTERNAL_FAILURE (-6) 62 #define PSCI_RET_NOT_PRESENT (-7) 63 #define PSCI_RET_DISABLED (-8) 64 #define PSCI_RET_INVALID_ADDRESS (-9) 65 66 uint32_t psci_version(void); 67 int psci_cpu_suspend(uint32_t power_state, uintptr_t entry, 68 uint32_t context_id, struct sm_nsec_ctx *nsec); 69 int psci_cpu_off(void); 70 int psci_cpu_on(uint32_t cpu_id, uint32_t entry, uint32_t context_id); 71 int psci_affinity_info(uint32_t affinity, uint32_t lowest_affnity_level); 72 int psci_migrate(uint32_t cpu_id); 73 int psci_migrate_info_type(void); 74 int psci_migrate_info_up_cpu(void); 75 void psci_system_off(void); 76 void psci_system_reset(void); 77 int psci_features(uint32_t psci_fid); 78 int psci_system_reset2(uint32_t reset_type, uint32_t cookie); 79 int psci_mem_protect(uint32_t enable); 80 int psci_mem_chk_range(paddr_t base, size_t length); 81 int psci_node_hw_state(uint32_t cpu_id, uint32_t power_level); 82 int psci_system_suspend(uintptr_t entry, uint32_t context_id, 83 struct sm_nsec_ctx *nsec); 84 int psci_stat_residency(uint32_t cpu_id, uint32_t power_state); 85 int psci_stat_count(uint32_t cpu_id, uint32_t power_state); 86 void tee_psci_handler(struct thread_smc_args *args, struct sm_nsec_ctx *nsec); 87 88 void psci_armv7_cpu_off(void); 89 #endif /* __SM_PSCI_H */ 90