1// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) 2/* 3 * Copyright (C) STMicroelectronics 2024 - All Rights Reserved 4 */ 5 6/* Break alphabetical to group RIF configuration by feature to ease DT readability */ 7 8&rifsc { 9 st,protreg = < 10 RIFPROT(STM32MP25_RIFSC_TIM1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 11 RIFPROT(STM32MP25_RIFSC_TIM2_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 12 RIFPROT(STM32MP25_RIFSC_TIM3_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 13 RIFPROT(STM32MP25_RIFSC_TIM4_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 14 RIFPROT(STM32MP25_RIFSC_TIM5_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 15 RIFPROT(STM32MP25_RIFSC_TIM6_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 16 RIFPROT(STM32MP25_RIFSC_TIM7_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 17 RIFPROT(STM32MP25_RIFSC_TIM8_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 18 RIFPROT(STM32MP25_RIFSC_TIM10_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 19 RIFPROT(STM32MP25_RIFSC_TIM11_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 20 RIFPROT(STM32MP25_RIFSC_TIM12_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 21 RIFPROT(STM32MP25_RIFSC_TIM13_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 22 RIFPROT(STM32MP25_RIFSC_TIM14_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 23 RIFPROT(STM32MP25_RIFSC_TIM15_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 24 RIFPROT(STM32MP25_RIFSC_TIM16_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 25 RIFPROT(STM32MP25_RIFSC_TIM17_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 26 RIFPROT(STM32MP25_RIFSC_TIM20_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 27 RIFPROT(STM32MP25_RIFSC_LPTIM1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 28 RIFPROT(STM32MP25_RIFSC_LPTIM2_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 29 RIFPROT(STM32MP25_RIFSC_LPTIM3_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 30 RIFPROT(STM32MP25_RIFSC_LPTIM4_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 31 RIFPROT(STM32MP25_RIFSC_LPTIM5_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 32 RIFPROT(STM32MP25_RIFSC_SPI1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 33 RIFPROT(STM32MP25_RIFSC_SPI2_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 34 RIFPROT(STM32MP25_RIFSC_SPI3_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 35 RIFPROT(STM32MP25_RIFSC_SPI4_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 36 RIFPROT(STM32MP25_RIFSC_SPI5_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 37 RIFPROT(STM32MP25_RIFSC_SPI6_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 38 RIFPROT(STM32MP25_RIFSC_SPI7_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 39 RIFPROT(STM32MP25_RIFSC_SPI8_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 40 RIFPROT(STM32MP25_RIFSC_SPDIFRX_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 41 RIFPROT(STM32MP25_RIFSC_USART1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 42 RIFPROT(STM32MP25_RIFSC_USART2_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 43 RIFPROT(STM32MP25_RIFSC_USART3_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 44 RIFPROT(STM32MP25_RIFSC_UART4_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 45 RIFPROT(STM32MP25_RIFSC_UART5_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 46 RIFPROT(STM32MP25_RIFSC_USART6_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 47 RIFPROT(STM32MP25_RIFSC_UART7_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 48 RIFPROT(STM32MP25_RIFSC_UART8_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 49 RIFPROT(STM32MP25_RIFSC_UART9_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 50 RIFPROT(STM32MP25_RIFSC_LPUART1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 51 RIFPROT(STM32MP25_RIFSC_I2C1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 52 RIFPROT(STM32MP25_RIFSC_I2C2_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 53 RIFPROT(STM32MP25_RIFSC_I2C3_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 54 RIFPROT(STM32MP25_RIFSC_I2C4_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 55 RIFPROT(STM32MP25_RIFSC_I2C5_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 56 RIFPROT(STM32MP25_RIFSC_I2C6_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 57 RIFPROT(STM32MP25_RIFSC_I2C7_ID, RIF_UNUSED, RIF_UNLOCK, RIF_SEC, RIF_PRIV, RIF_CID1, RIF_SEM_DIS, RIF_CFEN) 58 RIFPROT(STM32MP25_RIFSC_I2C8_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 59 RIFPROT(STM32MP25_RIFSC_SAI1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 60 RIFPROT(STM32MP25_RIFSC_SAI2_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 61 RIFPROT(STM32MP25_RIFSC_SAI3_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 62 RIFPROT(STM32MP25_RIFSC_SAI4_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 63 RIFPROT(STM32MP25_RIFSC_MDF1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 64 RIFPROT(STM32MP25_RIFSC_ADF1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 65 RIFPROT(STM32MP25_RIFSC_FDCAN_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 66 RIFPROT(STM32MP25_RIFSC_HDP_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 67 RIFPROT(STM32MP25_RIFSC_ADC12_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 68 RIFPROT(STM32MP25_RIFSC_ADC3_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 69 RIFPROT(STM32MP25_RIFSC_ETH1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 70 RIFPROT(STM32MP25_RIFSC_ETH2_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 71 RIFPROT(STM32MP25_RIFSC_ETHSW_DEIP_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 72 RIFPROT(STM32MP25_RIFSC_ETHSW_ACM_MSGBUF_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 73 RIFPROT(STM32MP25_RIFSC_ETHSW_ACM_CFG_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 74 RIFPROT(STM32MP25_RIFSC_USBH_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 75 RIFPROT(STM32MP25_RIFSC_USB3DR_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 76 RIFPROT(STM32MP25_RIFSC_COMBOPHY_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 77 RIFPROT(STM32MP25_RIFSC_PCIE_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 78 RIFPROT(STM32MP25_RIFSC_UCPD1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 79 RIFPROT(STM32MP25_RIFSC_STGEN_ID, RIF_UNUSED, RIF_LOCK, RIF_SEC, RIF_PRIV, RIF_CID1, RIF_SEM_DIS, RIF_CFEN) 80 RIFPROT(STM32MP25_RIFSC_SDMMC1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 81 RIFPROT(STM32MP25_RIFSC_SDMMC2_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 82 RIFPROT(STM32MP25_RIFSC_SDMMC3_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 83 RIFPROT(STM32MP25_RIFSC_GPU_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 84 RIFPROT(STM32MP25_RIFSC_LTDC_CMN_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 85 RIFPROT(STM32MP25_RIFSC_LTDC_L0L1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 86 RIFPROT(STM32MP25_RIFSC_LTDC_L2_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 87 RIFPROT(STM32MP25_RIFSC_LTDC_ROT_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 88 RIFPROT(STM32MP25_RIFSC_DSI_CMN_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 89 RIFPROT(STM32MP25_RIFSC_DSI_TRIG_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 90 RIFPROT(STM32MP25_RIFSC_DSI_RDFIFO_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 91 RIFPROT(STM32MP25_RIFSC_LVDS_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 92 RIFPROT(STM32MP25_RIFSC_CSI_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 93 RIFPROT(STM32MP25_RIFSC_DCMIPP_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 94 RIFPROT(STM32MP25_RIFSC_DCMI_PSSI_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 95 RIFPROT(STM32MP25_RIFSC_VDEC_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 96 RIFPROT(STM32MP25_RIFSC_VENC_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 97 RIFPROT(STM32MP25_RIFSC_RNG_ID, RIF_CID1_BF|RIF_CID2_BF, RIF_LOCK, RIF_SEC, RIF_PRIV, RIF_UNUSED, RIF_SEM_EN, RIF_CFEN) 98 RIFPROT(STM32MP25_RIFSC_PKA_ID, RIF_CID1_BF|RIF_CID2_BF, RIF_LOCK, RIF_SEC, RIF_PRIV, RIF_UNUSED, RIF_SEM_EN, RIF_CFEN) 99 RIFPROT(STM32MP25_RIFSC_SAES_ID, RIF_CID1_BF|RIF_CID2_BF, RIF_LOCK, RIF_SEC, RIF_PRIV, RIF_UNUSED, RIF_SEM_EN, RIF_CFEN) 100 RIFPROT(STM32MP25_RIFSC_HASH_ID, RIF_UNUSED, RIF_LOCK, RIF_SEC, RIF_PRIV, RIF_CID1, RIF_SEM_DIS, RIF_CFEN) 101 RIFPROT(STM32MP25_RIFSC_CRYP1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 102 RIFPROT(STM32MP25_RIFSC_CRYP2_ID, RIF_UNUSED, RIF_UNLOCK, RIF_SEC, RIF_PRIV, RIF_CID2, RIF_SEM_DIS, RIF_CFEN) 103 RIFPROT(STM32MP25_RIFSC_IWDG1_ID, RIF_UNUSED, RIF_LOCK, RIF_SEC, RIF_PRIV, RIF_CID1, RIF_SEM_DIS, RIF_CFEN) 104 RIFPROT(STM32MP25_RIFSC_IWDG2_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 105 RIFPROT(STM32MP25_RIFSC_IWDG3_ID, RIF_UNUSED, RIF_UNLOCK, RIF_SEC, RIF_PRIV, RIF_CID2, RIF_SEM_DIS, RIF_CFEN) 106 RIFPROT(STM32MP25_RIFSC_IWDG4_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 107 RIFPROT(STM32MP25_RIFSC_IWDG5_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 108 RIFPROT(STM32MP25_RIFSC_WWDG1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 109 RIFPROT(STM32MP25_RIFSC_WWDG2_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 110 RIFPROT(STM32MP25_RIFSC_VREFBUF_ID, RIF_UNUSED, RIF_UNLOCK, RIF_SEC, RIF_PRIV, RIF_CID1, RIF_SEM_DIS, RIF_CFEN) 111 RIFPROT(STM32MP25_RIFSC_DTS_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 112 RIFPROT(STM32MP25_RIFSC_RAMCFG_ID, RIF_UNUSED, RIF_UNLOCK, RIF_SEC, RIF_PRIV, RIF_CID1, RIF_SEM_DIS, RIF_CFEN) 113 RIFPROT(STM32MP25_RIFSC_CRC_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 114 RIFPROT(STM32MP25_RIFSC_SERC_ID, RIF_UNUSED, RIF_UNLOCK, RIF_SEC, RIF_PRIV, RIF_CID1, RIF_SEM_DIS, RIF_CFEN) 115 RIFPROT(STM32MP25_RIFSC_GICV2M_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 116 RIFPROT(STM32MP25_RIFSC_I3C1_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 117 RIFPROT(STM32MP25_RIFSC_I3C2_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 118 RIFPROT(STM32MP25_RIFSC_I3C3_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 119 RIFPROT(STM32MP25_RIFSC_I3C4_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 120 RIFPROT(STM32MP25_RIFSC_ICACHE_DCACHE_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_UNUSED, RIF_SEM_DIS, RIF_CFDIS) 121 >; 122 st,rimu = < 123 RIMUPROT(RIMU_ID(0), RIF_CID1, RIF_NSEC, RIF_NPRIV, RIF_CIDSEL_M) 124 RIMUPROT(RIMU_ID(1), RIF_UNUSED, RIF_NSEC, RIF_PRIV, RIF_CIDSEL_P) 125 RIMUPROT(RIMU_ID(2), RIF_UNUSED, RIF_NSEC, RIF_PRIV, RIF_CIDSEL_P) 126 RIMUPROT(RIMU_ID(3), RIF_UNUSED, RIF_NSEC, RIF_PRIV, RIF_CIDSEL_P) 127 RIMUPROT(RIMU_ID(4), RIF_UNUSED, RIF_NSEC, RIF_PRIV, RIF_CIDSEL_P) 128 RIMUPROT(RIMU_ID(5), RIF_UNUSED, RIF_NSEC, RIF_PRIV, RIF_CIDSEL_P) 129 RIMUPROT(RIMU_ID(6), RIF_UNUSED, RIF_NSEC, RIF_PRIV, RIF_CIDSEL_P) 130 RIMUPROT(RIMU_ID(7), RIF_UNUSED, RIF_NSEC, RIF_PRIV, RIF_CIDSEL_P) 131 RIMUPROT(RIMU_ID(8), RIF_UNUSED, RIF_NSEC, RIF_PRIV, RIF_CIDSEL_P) 132 RIMUPROT(RIMU_ID(9), RIF_CID1, RIF_NSEC, RIF_PRIV, RIF_CIDSEL_M) 133 RIMUPROT(RIMU_ID(10), RIF_UNUSED, RIF_NSEC, RIF_PRIV, RIF_CIDSEL_P) 134 RIMUPROT(RIMU_ID(11), RIF_CID4, RIF_NSEC, RIF_PRIV, RIF_CIDSEL_M) 135 RIMUPROT(RIMU_ID(12), RIF_CID4, RIF_NSEC, RIF_PRIV, RIF_CIDSEL_M) 136 RIMUPROT(RIMU_ID(13), RIF_CID4, RIF_NSEC, RIF_PRIV, RIF_CIDSEL_M) 137 RIMUPROT(RIMU_ID(14), RIF_UNUSED, RIF_NSEC, RIF_PRIV, RIF_CIDSEL_P) 138 RIMUPROT(RIMU_ID(15), RIF_UNUSED, RIF_NSEC, RIF_PRIV, RIF_CIDSEL_P) 139 >; 140 st,glocked = <RIFSC_RIMU_GLOCK>; 141}; 142 143&gpioa { 144 st,protreg = < 145 RIFPROT(RIF_IOPORT_PIN(0), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 146 RIFPROT(RIF_IOPORT_PIN(1), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 147 RIFPROT(RIF_IOPORT_PIN(2), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 148 RIFPROT(RIF_IOPORT_PIN(3), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 149 RIFPROT(RIF_IOPORT_PIN(4), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 150 RIFPROT(RIF_IOPORT_PIN(5), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 151 RIFPROT(RIF_IOPORT_PIN(6), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 152 RIFPROT(RIF_IOPORT_PIN(7), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 153 RIFPROT(RIF_IOPORT_PIN(8), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 154 RIFPROT(RIF_IOPORT_PIN(9), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 155 RIFPROT(RIF_IOPORT_PIN(10), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 156 RIFPROT(RIF_IOPORT_PIN(11), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 157 RIFPROT(RIF_IOPORT_PIN(12), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 158 RIFPROT(RIF_IOPORT_PIN(13), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 159 RIFPROT(RIF_IOPORT_PIN(14), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 160 RIFPROT(RIF_IOPORT_PIN(15), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 161 >; 162}; 163 164&gpiob { 165 st,protreg = < 166 RIFPROT(RIF_IOPORT_PIN(0), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 167 RIFPROT(RIF_IOPORT_PIN(1), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 168 RIFPROT(RIF_IOPORT_PIN(2), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 169 RIFPROT(RIF_IOPORT_PIN(3), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 170 RIFPROT(RIF_IOPORT_PIN(4), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 171 RIFPROT(RIF_IOPORT_PIN(5), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 172 RIFPROT(RIF_IOPORT_PIN(6), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 173 RIFPROT(RIF_IOPORT_PIN(7), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 174 RIFPROT(RIF_IOPORT_PIN(8), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 175 RIFPROT(RIF_IOPORT_PIN(9), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 176 RIFPROT(RIF_IOPORT_PIN(10), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 177 RIFPROT(RIF_IOPORT_PIN(11), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 178 RIFPROT(RIF_IOPORT_PIN(12), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 179 RIFPROT(RIF_IOPORT_PIN(13), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 180 RIFPROT(RIF_IOPORT_PIN(14), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 181 RIFPROT(RIF_IOPORT_PIN(15), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 182 >; 183}; 184 185&gpioc { 186 st,protreg = < 187 RIFPROT(RIF_IOPORT_PIN(0), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 188 RIFPROT(RIF_IOPORT_PIN(1), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 189 RIFPROT(RIF_IOPORT_PIN(2), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 190 RIFPROT(RIF_IOPORT_PIN(3), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 191 RIFPROT(RIF_IOPORT_PIN(4), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 192 RIFPROT(RIF_IOPORT_PIN(5), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 193 RIFPROT(RIF_IOPORT_PIN(6), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 194 RIFPROT(RIF_IOPORT_PIN(7), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 195 RIFPROT(RIF_IOPORT_PIN(8), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 196 RIFPROT(RIF_IOPORT_PIN(9), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 197 RIFPROT(RIF_IOPORT_PIN(10), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 198 RIFPROT(RIF_IOPORT_PIN(11), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 199 RIFPROT(RIF_IOPORT_PIN(12), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 200 RIFPROT(RIF_IOPORT_PIN(13), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 201 >; 202}; 203 204&gpiod { 205 st,protreg = < 206 RIFPROT(RIF_IOPORT_PIN(0), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 207 RIFPROT(RIF_IOPORT_PIN(1), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 208 RIFPROT(RIF_IOPORT_PIN(2), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 209 RIFPROT(RIF_IOPORT_PIN(3), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 210 RIFPROT(RIF_IOPORT_PIN(4), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 211 RIFPROT(RIF_IOPORT_PIN(5), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 212 RIFPROT(RIF_IOPORT_PIN(6), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 213 RIFPROT(RIF_IOPORT_PIN(7), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 214 RIFPROT(RIF_IOPORT_PIN(8), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 215 RIFPROT(RIF_IOPORT_PIN(9), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 216 RIFPROT(RIF_IOPORT_PIN(10), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 217 RIFPROT(RIF_IOPORT_PIN(11), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 218 RIFPROT(RIF_IOPORT_PIN(12), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 219 RIFPROT(RIF_IOPORT_PIN(13), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 220 RIFPROT(RIF_IOPORT_PIN(14), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 221 RIFPROT(RIF_IOPORT_PIN(15), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 222 >; 223}; 224 225&gpioe { 226 st,protreg = < 227 RIFPROT(RIF_IOPORT_PIN(0), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 228 RIFPROT(RIF_IOPORT_PIN(1), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 229 RIFPROT(RIF_IOPORT_PIN(2), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 230 RIFPROT(RIF_IOPORT_PIN(3), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 231 RIFPROT(RIF_IOPORT_PIN(4), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 232 RIFPROT(RIF_IOPORT_PIN(5), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 233 RIFPROT(RIF_IOPORT_PIN(6), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 234 RIFPROT(RIF_IOPORT_PIN(7), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 235 RIFPROT(RIF_IOPORT_PIN(8), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 236 RIFPROT(RIF_IOPORT_PIN(9), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 237 RIFPROT(RIF_IOPORT_PIN(10), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 238 RIFPROT(RIF_IOPORT_PIN(11), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 239 RIFPROT(RIF_IOPORT_PIN(12), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 240 RIFPROT(RIF_IOPORT_PIN(13), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 241 RIFPROT(RIF_IOPORT_PIN(14), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 242 RIFPROT(RIF_IOPORT_PIN(15), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 243 >; 244}; 245 246&gpiof { 247 st,protreg = < 248 RIFPROT(RIF_IOPORT_PIN(0), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 249 RIFPROT(RIF_IOPORT_PIN(1), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 250 RIFPROT(RIF_IOPORT_PIN(2), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 251 RIFPROT(RIF_IOPORT_PIN(3), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 252 RIFPROT(RIF_IOPORT_PIN(4), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 253 RIFPROT(RIF_IOPORT_PIN(5), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 254 RIFPROT(RIF_IOPORT_PIN(6), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 255 RIFPROT(RIF_IOPORT_PIN(7), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 256 RIFPROT(RIF_IOPORT_PIN(8), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 257 RIFPROT(RIF_IOPORT_PIN(9), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 258 RIFPROT(RIF_IOPORT_PIN(10), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 259 RIFPROT(RIF_IOPORT_PIN(11), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 260 RIFPROT(RIF_IOPORT_PIN(12), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 261 RIFPROT(RIF_IOPORT_PIN(13), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 262 RIFPROT(RIF_IOPORT_PIN(14), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 263 RIFPROT(RIF_IOPORT_PIN(15), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 264 >; 265}; 266 267&gpiog { 268 st,protreg = < 269 RIFPROT(RIF_IOPORT_PIN(0), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 270 RIFPROT(RIF_IOPORT_PIN(1), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 271 RIFPROT(RIF_IOPORT_PIN(2), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 272 RIFPROT(RIF_IOPORT_PIN(3), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 273 RIFPROT(RIF_IOPORT_PIN(4), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 274 RIFPROT(RIF_IOPORT_PIN(5), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 275 RIFPROT(RIF_IOPORT_PIN(6), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 276 RIFPROT(RIF_IOPORT_PIN(7), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 277 RIFPROT(RIF_IOPORT_PIN(8), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 278 RIFPROT(RIF_IOPORT_PIN(9), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 279 RIFPROT(RIF_IOPORT_PIN(10), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 280 RIFPROT(RIF_IOPORT_PIN(11), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 281 RIFPROT(RIF_IOPORT_PIN(12), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 282 RIFPROT(RIF_IOPORT_PIN(13), EMPTY_SEMWL, RIF_UNLOCK, RIF_SEC, RIF_PRIV, RIF_CID1, RIF_SEM_DIS, RIF_CFEN) 283 RIFPROT(RIF_IOPORT_PIN(14), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 284 RIFPROT(RIF_IOPORT_PIN(15), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 285 >; 286}; 287 288&gpioh { 289 st,protreg = < 290 RIFPROT(RIF_IOPORT_PIN(0), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 291 RIFPROT(RIF_IOPORT_PIN(1), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 292 RIFPROT(RIF_IOPORT_PIN(2), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 293 RIFPROT(RIF_IOPORT_PIN(3), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 294 RIFPROT(RIF_IOPORT_PIN(4), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 295 RIFPROT(RIF_IOPORT_PIN(5), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 296 RIFPROT(RIF_IOPORT_PIN(6), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 297 RIFPROT(RIF_IOPORT_PIN(7), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 298 RIFPROT(RIF_IOPORT_PIN(8), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 299 RIFPROT(RIF_IOPORT_PIN(9), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 300 RIFPROT(RIF_IOPORT_PIN(10), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 301 RIFPROT(RIF_IOPORT_PIN(11), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 302 RIFPROT(RIF_IOPORT_PIN(12), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 303 RIFPROT(RIF_IOPORT_PIN(13), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 304 >; 305}; 306 307&gpioi { 308 st,protreg = < 309 RIFPROT(RIF_IOPORT_PIN(0), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 310 RIFPROT(RIF_IOPORT_PIN(1), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 311 RIFPROT(RIF_IOPORT_PIN(2), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 312 RIFPROT(RIF_IOPORT_PIN(3), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 313 RIFPROT(RIF_IOPORT_PIN(4), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 314 RIFPROT(RIF_IOPORT_PIN(5), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 315 RIFPROT(RIF_IOPORT_PIN(6), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 316 RIFPROT(RIF_IOPORT_PIN(7), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 317 RIFPROT(RIF_IOPORT_PIN(8), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 318 RIFPROT(RIF_IOPORT_PIN(9), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 319 RIFPROT(RIF_IOPORT_PIN(10), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 320 RIFPROT(RIF_IOPORT_PIN(11), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 321 RIFPROT(RIF_IOPORT_PIN(12), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 322 RIFPROT(RIF_IOPORT_PIN(13), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 323 RIFPROT(RIF_IOPORT_PIN(14), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 324 RIFPROT(RIF_IOPORT_PIN(15), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 325 >; 326}; 327 328&gpioj { 329 st,protreg = < 330 RIFPROT(RIF_IOPORT_PIN(0), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 331 RIFPROT(RIF_IOPORT_PIN(1), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 332 RIFPROT(RIF_IOPORT_PIN(2), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 333 RIFPROT(RIF_IOPORT_PIN(3), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 334 RIFPROT(RIF_IOPORT_PIN(4), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 335 RIFPROT(RIF_IOPORT_PIN(5), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 336 RIFPROT(RIF_IOPORT_PIN(6), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 337 RIFPROT(RIF_IOPORT_PIN(7), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 338 RIFPROT(RIF_IOPORT_PIN(8), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 339 RIFPROT(RIF_IOPORT_PIN(9), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 340 RIFPROT(RIF_IOPORT_PIN(10), EMPTY_SEMWL, RIF_UNLOCK, RIF_SEC, RIF_PRIV, RIF_CID1, RIF_SEM_DIS, RIF_CFEN) 341 RIFPROT(RIF_IOPORT_PIN(11), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 342 RIFPROT(RIF_IOPORT_PIN(12), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 343 RIFPROT(RIF_IOPORT_PIN(13), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 344 RIFPROT(RIF_IOPORT_PIN(14), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 345 RIFPROT(RIF_IOPORT_PIN(15), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 346 >; 347}; 348 349&gpiok { 350 st,protreg = < 351 RIFPROT(RIF_IOPORT_PIN(0), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 352 RIFPROT(RIF_IOPORT_PIN(1), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 353 RIFPROT(RIF_IOPORT_PIN(2), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 354 RIFPROT(RIF_IOPORT_PIN(3), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 355 RIFPROT(RIF_IOPORT_PIN(4), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 356 RIFPROT(RIF_IOPORT_PIN(5), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 357 RIFPROT(RIF_IOPORT_PIN(6), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 358 RIFPROT(RIF_IOPORT_PIN(7), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 359 >; 360}; 361 362&gpioz { 363 st,protreg = < 364 RIFPROT(RIF_IOPORT_PIN(0), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 365 RIFPROT(RIF_IOPORT_PIN(1), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 366 RIFPROT(RIF_IOPORT_PIN(2), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 367 RIFPROT(RIF_IOPORT_PIN(3), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 368 RIFPROT(RIF_IOPORT_PIN(4), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 369 RIFPROT(RIF_IOPORT_PIN(5), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 370 RIFPROT(RIF_IOPORT_PIN(6), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 371 RIFPROT(RIF_IOPORT_PIN(7), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 372 RIFPROT(RIF_IOPORT_PIN(8), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 373 RIFPROT(RIF_IOPORT_PIN(9), EMPTY_SEMWL, RIF_UNLOCK, RIF_NSEC, RIF_NPRIV, RIF_CID0, RIF_SEM_DIS, RIF_CFDIS) 374 >; 375}; 376 377&tfa_bl31 { 378 st,protreg = <RISABPROT(RIF_DDCID_DIS, RIF_UNUSED, RIF_SEC, RIF_UNUSED, RIF_CFEN, RIF_CID1_BF, RIF_CID1_BF, RIF_CID1_BF)>; 379}; 380 381&hpdma_lli { 382 st,protreg = <RISABPROT(RIF_DDCID_DIS, RIF_UNUSED, RIF_NSEC, RIF_PRIV, RIF_CFDIS, RIF_UNUSED, RIF_UNUSED, RIF_UNUSED)>; 383}; 384 385&bsec_mirror { 386 st,protreg = <RISABPROT(RIF_DDCID_DIS, RIF_UNUSED, RIF_SEC, RIF_NPRIV, RIF_CFDIS, RIF_UNUSED, RIF_UNUSED, RIF_UNUSED)>; 387}; 388 389&cm33_sram1 { 390 st,protreg = <RISABPROT(RIF_DDCID_DIS, RIF_UNUSED, RIF_NSEC, RIF_NPRIV, RIF_CFDIS, RIF_UNUSED, RIF_UNUSED, RIF_UNUSED)>; 391}; 392 393&cm33_sram2 { 394 st,protreg = <RISABPROT(RIF_DDCID_DIS, RIF_UNUSED, RIF_NSEC, RIF_NPRIV, RIF_CFDIS, RIF_UNUSED, RIF_UNUSED, RIF_UNUSED)>; 395}; 396 397&cm33_retram { 398 st,protreg = <RISABPROT(RIF_DDCID_DIS, RIF_UNUSED, RIF_SEC, RIF_NPRIV, RIF_CFDIS, RIF_UNUSED, RIF_UNUSED, RIF_UNUSED)>; 399}; 400 401&ddr_param { 402 st,protreg = <RISABPROT(RIF_DDCID_DIS, RIF_UNUSED, RIF_SEC, RIF_NPRIV, RIF_CFDIS, RIF_UNUSED, RIF_UNUSED, RIF_UNUSED)>; 403}; 404 405&risab1 { 406 memory-region = <&tfa_bl31>; 407}; 408 409&risab2 { 410 memory-region = <&hpdma_lli>; 411}; 412 413&risab3 { 414 st,srwiad; 415 memory-region = <&bsec_mirror>, <&cm33_sram1>; 416}; 417 418&risab4 { 419 st,srwiad; 420 memory-region = <&cm33_sram2>; 421}; 422 423&risab5 { 424 st,srwiad; 425 memory-region = <&cm33_retram>, <&ddr_param>; 426}; 427 428&mm_ospi1 { 429 st,protreg = <RISAFPROT(RISAF_REG_ID(1), RIF_CID1_BF | RIF_CID2_BF, RIF_CID1_BF | RIF_CID2_BF, 0, RIF_NSEC, RIF_ENC_DIS, RIF_BREN_EN)>; 430}; 431 432&risaf2 { 433 memory-region = <&mm_ospi1>; 434}; 435 436&pcie_device { 437 st,protreg = <RISAFPROT(RISAF_REG_ID(1), RIF_CID0_BF|RIF_CID1_BF, RIF_CID0_BF|RIF_CID1_BF, RIF_UNUSED, RIF_NSEC, RIF_ENC_DIS, RIF_BREN_EN)>; 438}; 439 440&risaf5 { 441 memory-region = <&pcie_device>; 442}; 443 444&bl31_lowpower { 445 st,protreg = <RISAFPROT(RISAF_REG_ID(1), RIF_CID0_BF|RIF_CID1_BF, RIF_CID0_BF|RIF_CID1_BF, RIF_CID1_BF, RIF_SEC, RIF_ENC_DIS, RIF_BREN_EN)>; 446}; 447 448&tfm_its { 449 st,protreg = <RISAFPROT(RISAF_REG_ID(2), RIF_CID2_BF, RIF_CID2_BF, RIF_CID2_BF, RIF_SEC, RIF_ENC_DIS, RIF_BREN_EN)>; 450}; 451 452&risaf1 { 453 memory-region = <&bl31_lowpower>, <&tfm_its>; 454}; 455 456&tfm_code { 457 st,protreg = <RISAFPROT(RISAF_REG_ID(1), RIF_CID2_BF, RIF_CID2_BF, RIF_UNUSED, RIF_SEC, RIF_ENC_EN, RIF_BREN_EN)>; 458}; 459 460&cm33_cube_fw { 461 st,protreg = <RISAFPROT(RISAF_REG_ID(2), RIF_CID0_BF|RIF_CID1_BF|RIF_CID2_BF, RIF_CID0_BF|RIF_CID1_BF|RIF_CID2_BF, RIF_UNUSED, RIF_NSEC, RIF_ENC_DIS, RIF_BREN_EN)>; 462}; 463 464&tfm_data { 465 st,protreg = <RISAFPROT(RISAF_REG_ID(3), RIF_CID2_BF, RIF_CID2_BF, RIF_UNUSED, RIF_SEC, RIF_ENC_EN, RIF_BREN_EN)>; 466}; 467 468&cm33_cube_data { 469 st,protreg = <RISAFPROT(RISAF_REG_ID(4), RIF_CID0_BF|RIF_CID1_BF|RIF_CID2_BF, RIF_CID0_BF|RIF_CID1_BF|RIF_CID2_BF, RIF_UNUSED, RIF_NSEC, RIF_ENC_DIS, RIF_BREN_EN)>; 470}; 471 472&ipc_shmem { 473 st,protreg = <RISAFPROT(RISAF_REG_ID(5), RIF_CID0_BF|RIF_CID1_BF|RIF_CID2_BF, RIF_CID0_BF|RIF_CID1_BF|RIF_CID2_BF, RIF_UNUSED, RIF_NSEC, RIF_ENC_DIS, RIF_BREN_EN)>; 474}; 475 476&spare1 { 477 st,protreg = <RISAFPROT(RISAF_REG_ID(6), RIF_CID0_BF|RIF_CID1_BF|RIF_CID2_BF, RIF_CID0_BF|RIF_CID1_BF|RIF_CID2_BF, RIF_UNUSED, RIF_NSEC, RIF_ENC_DIS, RIF_BREN_EN)>; 478}; 479 480&bl31_context { 481 st,protreg = <RISAFPROT(RISAF_REG_ID(7), RIF_CID0_BF|RIF_CID1_BF, RIF_CID0_BF|RIF_CID1_BF, RIF_UNUSED, RIF_SEC, RIF_ENC_EN, RIF_BREN_EN)>; 482}; 483 484&op_tee { 485 st,protreg = <RISAFPROT(RISAF_REG_ID(8), RIF_CID0_BF|RIF_CID1_BF, RIF_CID0_BF|RIF_CID1_BF, RIF_UNUSED, RIF_SEC, RIF_ENC_EN, RIF_BREN_EN)>; 486}; 487 488&linuxkernel1 { 489 st,protreg = <RISAFPROT(RISAF_REG_ID(9), RIF_CID0_BF|RIF_CID1_BF, RIF_CID0_BF|RIF_CID1_BF, RIF_UNUSED, RIF_NSEC, RIF_ENC_DIS, RIF_BREN_EN)>; 490}; 491 492&gpu_reserved { 493 st,protreg = <RISAFPROT(RISAF_REG_ID(10), RIF_CID0_BF|RIF_CID1_BF, RIF_CID0_BF|RIF_CID1_BF, RIF_UNUSED, RIF_NSEC, RIF_ENC_DIS, RIF_BREN_EN)>; 494}; 495 496<dc_sec_layer { 497 st,protreg = <RISAFPROT(RISAF_REG_ID(13), RIF_CID0_BF|RIF_CID1_BF, RIF_CID0_BF|RIF_CID1_BF, RIF_UNUSED, RIF_NSEC, RIF_ENC_DIS, RIF_BREN_EN)>; 498}; 499 500<dc_sec_rotation { 501 st,protreg = <RISAFPROT(RISAF_REG_ID(14), RIF_CID0_BF|RIF_CID1_BF, RIF_CID0_BF|RIF_CID1_BF, RIF_UNUSED, RIF_NSEC, RIF_ENC_DIS, RIF_BREN_EN)>; 502}; 503 504&linuxkernel2 { 505 st,protreg = <RISAFPROT(RISAF_REG_ID(15), RIF_CID0_BF|RIF_CID1_BF, RIF_CID0_BF|RIF_CID1_BF, RIF_UNUSED, RIF_NSEC, RIF_ENC_DIS, RIF_BREN_EN)>; 506}; 507 508&risaf4 { 509 memory-region = <&tfm_code>, <&cm33_cube_fw>, <&tfm_data>, <&cm33_cube_data>, <&ipc_shmem>, <&spare1>, <&bl31_context>, <&op_tee>, <&linuxkernel1>, <&gpu_reserved>, <<dc_sec_layer>, <<dc_sec_rotation>, <&linuxkernel2>; 510}; 511