| #
a4c86358 |
| 10-Jul-2025 |
Clément Le Goffic <clement.legoffic@foss.st.com> |
dts: stm32: add RTC RIF configuration for the stm32mp257f-ev1 board
Add the RTC RIF configuration for the stm32mp257f-ev1 board.
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Revi
dts: stm32: add RTC RIF configuration for the stm32mp257f-ev1 board
Add the RTC RIF configuration for the stm32mp257f-ev1 board.
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| #
097cd02c |
| 26-May-2025 |
Antonio Borneo <antonio.borneo@foss.st.com> |
dts: stm32: add EXTI RIF configuration for the stm32mp257f-ev1 board
Add the RIF configuration for the stm32mp257f-ev1 board.
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Acked-by: Et
dts: stm32: add EXTI RIF configuration for the stm32mp257f-ev1 board
Add the RIF configuration for the stm32mp257f-ev1 board.
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
947af87e |
| 21-May-2025 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: enable OSPI1 on stm32mp257f-ev1 board
Enable OSPI1 on stm32mp257f-ev1 board. Therefore, enable ommanager node.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-
dts: stm32: enable OSPI1 on stm32mp257f-ev1 board
Enable OSPI1 on stm32mp257f-ev1 board. Therefore, enable ommanager node.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
b63e12e4 |
| 21-May-2025 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dt-bindings: update LTDC layer numbers on stm32mp2x platforms
On stm32mp2x platforms, according to the reference manual, the LTDC
layers are named L1/2/3, not L0/1/2.
Signed-off-by: Gatien Chevalli
dt-bindings: update LTDC layer numbers on stm32mp2x platforms
On stm32mp2x platforms, according to the reference manual, the LTDC
layers are named L1/2/3, not L0/1/2.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
10e9deff |
| 22-Jan-2025 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: add RISAL configuration on the stm32mp257f-ev1 board
Configure the RISALs on the stm32mp257f-ev1 board so that the LPSRAM1/2/3
are accessible by both the ARM Cortex A-35 and ARM Cortex M
dts: stm32: add RISAL configuration on the stm32mp257f-ev1 board
Configure the RISALs on the stm32mp257f-ev1 board so that the LPSRAM1/2/3
are accessible by both the ARM Cortex A-35 and ARM Cortex M0+.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
5b01685a |
| 27-Nov-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: add RCC RIF configuration for the stm32mp257f-ev1 board
Add the RIF configuration for the stm32mp257f-ev1 board. Some clocks
are in semaphore mode with only CID1 authorized. This is a tr
dts: stm32: add RCC RIF configuration for the stm32mp257f-ev1 board
Add the RIF configuration for the stm32mp257f-ev1 board. Some clocks
are in semaphore mode with only CID1 authorized. This is a trick to
benefit from a hardware synchronization in low-power sequences.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
1ea5250c |
| 14-Nov-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: add TAMP RIF configuration for stm32mp257f-ev1 board
Add a TAMP RIF configuration for stm32mp257f-ev1 board to configure
backup registers and TAMP resources.
Signed-off-by: Gatien Cheva
dts: stm32: add TAMP RIF configuration for stm32mp257f-ev1 board
Add a TAMP RIF configuration for stm32mp257f-ev1 board to configure
backup registers and TAMP resources.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
6d2feadf |
| 13-Nov-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: support some RIF-aware peripherals
Update the RIF configuration of the stm32mp257f-ev1 board so to support
the configuration of HPDMA1/2/3, IPCC1/2 and HSEM peripherals.
While there, upd
dts: stm32: support some RIF-aware peripherals
Update the RIF configuration of the stm32mp257f-ev1 board so to support
the configuration of HPDMA1/2/3, IPCC1/2 and HSEM peripherals.
While there, update other parts of the RIF configuration.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
5ddbd85c |
| 01-Oct-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: add RISAB configurations for the stm32mp257f-ev1 platform
Add the internal memory layout and RIF configuration for the
stm32mp257f-ev1 platform.
Signed-off-by: Gatien Chevallier <gatien
dts: stm32: add RISAB configurations for the stm32mp257f-ev1 platform
Add the internal memory layout and RIF configuration for the
stm32mp257f-ev1 platform.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
f7ce8d00 |
| 28-Aug-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: add RISAF support for the stm32mp257f-ev1 platform
Enable RISAF2/5 instances for this board that embeds PCIE ports and
some storage peripherals. Define a memory mapping and the RIF
confi
dts: stm32: add RISAF support for the stm32mp257f-ev1 platform
Enable RISAF2/5 instances for this board that embeds PCIE ports and
some storage peripherals. Define a memory mapping and the RIF
configuration of each memory region. Reorganize includes at board level
to avoid some build issues.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
85fd6164 |
| 28-Aug-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32_gpio: add GPIO banks RIF configurations for stm32mp257f-ev1
Add initial RIF GPIO configuration for stm32mp257f-ev1 board.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
dts: stm32_gpio: add GPIO banks RIF configurations for stm32mp257f-ev1
Add initial RIF GPIO configuration for stm32mp257f-ev1 board.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
d6a8ef58 |
| 25-Jan-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: Add RIFSC configuration support for stm32mp257f-ev1
Defines RIFSC configuration for stm32mp257f-ev1 board.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by:
dts: stm32: Add RIFSC configuration support for stm32mp257f-ev1
Defines RIFSC configuration for stm32mp257f-ev1 board.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
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