xref: /optee_os/core/arch/arm/dts/stm32mp157c-ed1-scmi.dts (revision 41115447f680b4c1c1e53fe9ba826f73b687474a)
1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2023-2024
4 */
5/dts-v1/;
6
7#include "stm32mp157c-ed1.dts"
8
9/ {
10	model = "STMicroelectronics STM32MP157C SCMI eval daughter";
11	compatible = "st,stm32mp157c-ed1-scmi", "st,stm32mp157";
12};
13
14&etzpc {
15	st,decprot =
16		<DECPROT(STM32MP1_ETZPC_USART1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
17		<DECPROT(STM32MP1_ETZPC_SPI6_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
18		<DECPROT(STM32MP1_ETZPC_I2C4_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
19		<DECPROT(STM32MP1_ETZPC_I2C6_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
20		<DECPROT(STM32MP1_ETZPC_RNG1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
21		<DECPROT(STM32MP1_ETZPC_HASH1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
22		<DECPROT(STM32MP1_ETZPC_CRYP1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
23		<DECPROT(STM32MP1_ETZPC_DDRCTRL_ID, DECPROT_NS_R_S_W, DECPROT_LOCK)>,
24		<DECPROT(STM32MP1_ETZPC_DDRPHYC_ID, DECPROT_NS_R_S_W, DECPROT_LOCK)>,
25		<DECPROT(STM32MP1_ETZPC_STGENC_ID, DECPROT_S_RW, DECPROT_LOCK)>,
26		<DECPROT(STM32MP1_ETZPC_BKPSRAM_ID, DECPROT_S_RW, DECPROT_LOCK)>,
27		<DECPROT(STM32MP1_ETZPC_IWDG1_ID, DECPROT_S_RW, DECPROT_LOCK)>;
28};
29
30&iwdg1 {
31	timeout-sec = <32>;
32};
33
34&iwdg2 {
35	timeout-sec = <32>;
36	status = "okay";
37	secure-status = "disabled";
38};
39
40&rcc {
41	compatible = "st,stm32mp1-rcc-secure";
42	status = "okay";
43};
44