xref: /optee_os/core/arch/arm/dts/stm32mp157c-dk2.dts (revision 41115447f680b4c1c1e53fe9ba826f73b687474a) 
1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2019-2024 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
5 */
6
7/dts-v1/;
8
9#include "stm32mp157.dtsi"
10#include "stm32mp15xc.dtsi"
11#include "stm32mp15-pinctrl.dtsi"
12#include "stm32mp15xxac-pinctrl.dtsi"
13#include "stm32mp15xx-dkx.dtsi"
14
15/ {
16	model = "STMicroelectronics STM32MP157C-DK2 Discovery Board";
17	compatible = "st,stm32mp157c-dk2", "st,stm32mp157";
18
19	aliases {
20		ethernet0 = &ethernet0;
21		serial0 = &uart4;
22		serial1 = &usart3;
23		serial2 = &uart7;
24		serial3 = &usart2;
25	};
26
27	chosen {
28		stdout-path = "serial0:115200n8";
29	};
30};
31
32&bsec {
33	board_id: board_id@ec {
34		reg = <0xec 0x4>;
35		st,non-secure-otp;
36	};
37	huk_otp: huk-otp@f0 {
38		reg = <0xf0 0x10>;
39	};
40};
41
42&dsi {
43	status = "disabled";
44	phy-dsi-supply = <&reg18>;
45
46	ports {
47		port@0 {
48			reg = <0>;
49			dsi_in: endpoint {
50				remote-endpoint = <&ltdc_ep1_out>;
51			};
52		};
53
54		port@1 {
55			reg = <1>;
56			dsi_out: endpoint {
57				remote-endpoint = <&panel_in>;
58			};
59		};
60	};
61
62	panel@0 {
63		compatible = "orisetech,otm8009a";
64		reg = <0>;
65		reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>;
66		power-supply = <&v3v3>;
67		status = "okay";
68
69		port {
70			panel_in: endpoint {
71				remote-endpoint = <&dsi_out>;
72			};
73		};
74	};
75};
76
77&etzpc {
78	st,decprot =
79		<DECPROT(STM32MP1_ETZPC_USART1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
80		<DECPROT(STM32MP1_ETZPC_SPI6_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
81		<DECPROT(STM32MP1_ETZPC_I2C4_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
82		<DECPROT(STM32MP1_ETZPC_I2C6_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
83		<DECPROT(STM32MP1_ETZPC_RNG1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
84		<DECPROT(STM32MP1_ETZPC_HASH1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
85		<DECPROT(STM32MP1_ETZPC_CRYP1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
86		<DECPROT(STM32MP1_ETZPC_DDRCTRL_ID, DECPROT_NS_R_S_W, DECPROT_LOCK)>,
87		<DECPROT(STM32MP1_ETZPC_DDRPHYC_ID, DECPROT_NS_R_S_W, DECPROT_LOCK)>,
88		<DECPROT(STM32MP1_ETZPC_STGENC_ID, DECPROT_S_RW, DECPROT_LOCK)>,
89		<DECPROT(STM32MP1_ETZPC_BKPSRAM_ID, DECPROT_S_RW, DECPROT_LOCK)>,
90		<DECPROT(STM32MP1_ETZPC_IWDG1_ID, DECPROT_S_RW, DECPROT_LOCK)>;
91};
92
93&i2c1 {
94	touchscreen@38 {
95		compatible = "focaltech,ft6236";
96		reg = <0x38>;
97		interrupts = <2 2>;
98		interrupt-parent = <&gpiof>;
99		interrupt-controller;
100		touchscreen-size-x = <480>;
101		touchscreen-size-y = <800>;
102		status = "okay";
103	};
104};
105
106&ltdc {
107	status = "disabled";
108
109	port {
110		ltdc_ep1_out: endpoint@1 {
111			reg = <1>;
112			remote-endpoint = <&dsi_in>;
113		};
114	};
115};
116
117&usart2 {
118	pinctrl-names = "default", "sleep", "idle";
119	pinctrl-0 = <&usart2_pins_c>;
120	pinctrl-1 = <&usart2_sleep_pins_c>;
121	pinctrl-2 = <&usart2_idle_pins_c>;
122	status = "disabled";
123};
124