xref: /optee_os/core/arch/arm/dts/stm32mp13xc.dtsi (revision 9a3ddebad7159b5ee36d813ba3425bb1d23bea3e)
1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2021-2024 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
5 */
6
7&etzpc {
8	cryp: crypto@54002000 {
9		compatible = "st,stm32mp1-cryp";
10		reg = <0x54002000 0x400>;
11		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
12		clocks = <&rcc CRYP1>;
13		resets = <&rcc CRYP1_R>;
14		access-controllers = <&etzpc STM32MP1_ETZPC_CRYP_ID>;
15		status = "disabled";
16	};
17
18	saes: saes@54005000 {
19		compatible = "st,stm32mp13-saes";
20		reg = <0x54005000 0x400>;
21		interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
22		clocks = <&rcc SAES_K>, <&rcc RNG1_K>;
23		clock-names = "bus", "rng";
24		resets = <&rcc SAES_R>;
25		access-controllers = <&etzpc STM32MP1_ETZPC_SAES_ID>, <&etzpc STM32MP1_ETZPC_RNG_ID>;
26		status = "disabled";
27	};
28
29	pka: pka@54006000 {
30		compatible = "st,stm32mp13-pka";
31		reg = <0x54006000 0x2000>;
32		interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
33		clocks = <&rcc PKA>, <&rcc RNG1_K>;
34		clock-names = "bus", "rng";
35		resets = <&rcc PKA_R>;
36		access-controllers = <&etzpc STM32MP1_ETZPC_PKA_ID>, <&etzpc STM32MP1_ETZPC_RNG_ID>;
37		status = "disabled";
38	};
39};
40