xref: /optee_os/core/arch/arm/dts/stm32mp13-pinctrl.dtsi (revision 0ffc3e3e806291e0fe1b44fae1a932f3774f8aa7)
1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2019-2022 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@st.com>
5 */
6#include <dt-bindings/pinctrl/stm32-pinfunc.h>
7
8&pinctrl {
9	i2c4_pins_a: i2c4-0 {
10		pins {
11			pinmux = <STM32_PINMUX('E', 15, AF6)>, /* I2C4_SCL */
12				 <STM32_PINMUX('B', 9, AF6)>; /* I2C4_SDA */
13			bias-disable;
14			drive-open-drain;
15			slew-rate = <0>;
16		};
17	};
18
19	rcc_mco_pins_a: rcc-pins-0 {
20		pins {
21			pinmux = <STM32_PINMUX('D', 7, AF0)>; /* RCC_MCO_1 */
22			bias-disable;
23			drive-push-pull;
24			slew-rate = <1>;
25		};
26	};
27
28	uart4_pins_a: uart4-0 {
29		pins1 {
30			pinmux = <STM32_PINMUX_NSEC('D', 6, AF8)>; /* UART4_TX */
31			bias-disable;
32			drive-push-pull;
33			slew-rate = <0>;
34		};
35		pins2 {
36			pinmux = <STM32_PINMUX_NSEC('D', 8, AF8)>; /* UART4_RX */
37			bias-disable;
38		};
39	};
40
41	usart1_pins_a: usart1-0 {
42		pins1 {
43			pinmux = <STM32_PINMUX('C', 0, AF7)>, /* USART1_TX */
44				 <STM32_PINMUX('C', 2, AF7)>; /* USART1_RTS */
45			bias-disable;
46			drive-push-pull;
47			slew-rate = <0>;
48		};
49		pins2 {
50			pinmux = <STM32_PINMUX('B', 0, AF4)>, /* USART1_RX */
51				 <STM32_PINMUX('A', 7, AF7)>; /* USART1_CTS_NSS */
52			bias-pull-up;
53		};
54	};
55};
56