1From 91c980d4cf88b0c12fe5971fe16c7b97b5a942af Mon Sep 17 00:00:00 2001 2From: Khem Raj <raj.khem@gmail.com> 3Date: Tue, 17 Dec 2019 14:57:55 -0800 4Subject: [PATCH] Disable fpu using code when using clang/mips64 combo 5 6it works around clang's inline asm error 7 8error: couldn't allocate output register for constraint 'r' 9 10Upstream-Status: Pending 11Signed-off-by: Khem Raj <raj.khem@gmail.com> 12--- 13 gst-libs/ext/libav/libavcodec/mips/aacdec_mips.c | 4 ++-- 14 1 file changed, 2 insertions(+), 2 deletions(-) 15 16diff --git a/gst-libs/ext/libav/libavcodec/mips/aacdec_mips.c b/gst-libs/ext/libav/libavcodec/mips/aacdec_mips.c 17index 253cdeb..df4f25d 100644 18--- a/gst-libs/ext/libav/libavcodec/mips/aacdec_mips.c 19+++ b/gst-libs/ext/libav/libavcodec/mips/aacdec_mips.c 20@@ -282,7 +282,7 @@ static void apply_ltp_mips(AACContext *ac, SingleChannelElement *sce) 21 } 22 } 23 24-#if HAVE_MIPSFPU 25+#if HAVE_MIPSFPU && !defined(__clang__) 26 static av_always_inline void fmul_and_reverse(float *dst, const float *src0, const float *src1, int count) 27 { 28 /* Multiply 'count' floats in src0 by src1 and store the results in dst in reverse */ 29@@ -435,7 +435,7 @@ void ff_aacdec_init_mips(AACContext *c) 30 #if HAVE_INLINE_ASM 31 c->imdct_and_windowing = imdct_and_windowing_mips; 32 c->apply_ltp = apply_ltp_mips; 33-#if HAVE_MIPSFPU 34+#if HAVE_MIPSFPU && !defined(__clang__) 35 c->update_ltp = update_ltp_mips; 36 #endif /* HAVE_MIPSFPU */ 37 #endif /* HAVE_INLINE_ASM */ 38-- 392.24.1 40 41