1 /*
2 * Copyright 2008,2010 Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based (loosely) on the Linux code
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef _MMC_H_
11 #define _MMC_H_
12
13 #include <linux/list.h>
14 #include <linux/sizes.h>
15 #include <linux/compiler.h>
16 #include <part.h>
17
18 /* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */
19 #define SD_VERSION_SD (1U << 31)
20 #define MMC_VERSION_MMC (1U << 30)
21
22 #define MAKE_SDMMC_VERSION(a, b, c) \
23 ((((u32)(a)) << 16) | ((u32)(b) << 8) | (u32)(c))
24 #define MAKE_SD_VERSION(a, b, c) \
25 (SD_VERSION_SD | MAKE_SDMMC_VERSION(a, b, c))
26 #define MAKE_MMC_VERSION(a, b, c) \
27 (MMC_VERSION_MMC | MAKE_SDMMC_VERSION(a, b, c))
28
29 #define EXTRACT_SDMMC_MAJOR_VERSION(x) \
30 (((u32)(x) >> 16) & 0xff)
31 #define EXTRACT_SDMMC_MINOR_VERSION(x) \
32 (((u32)(x) >> 8) & 0xff)
33 #define EXTRACT_SDMMC_CHANGE_VERSION(x) \
34 ((u32)(x) & 0xff)
35
36 #define SD_VERSION_3 MAKE_SD_VERSION(3, 0, 0)
37 #define SD_VERSION_2 MAKE_SD_VERSION(2, 0, 0)
38 #define SD_VERSION_1_0 MAKE_SD_VERSION(1, 0, 0)
39 #define SD_VERSION_1_10 MAKE_SD_VERSION(1, 10, 0)
40
41 #define MMC_VERSION_UNKNOWN MAKE_MMC_VERSION(0, 0, 0)
42 #define MMC_VERSION_1_2 MAKE_MMC_VERSION(1, 2, 0)
43 #define MMC_VERSION_1_4 MAKE_MMC_VERSION(1, 4, 0)
44 #define MMC_VERSION_2_2 MAKE_MMC_VERSION(2, 2, 0)
45 #define MMC_VERSION_3 MAKE_MMC_VERSION(3, 0, 0)
46 #define MMC_VERSION_4 MAKE_MMC_VERSION(4, 0, 0)
47 #define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0)
48 #define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0)
49 #define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0)
50 #define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1)
51 #define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0)
52 #define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0)
53 #define MMC_VERSION_5_1 MAKE_MMC_VERSION(5, 1, 0)
54
55 #define MMC_MODE_HS (1 << 0)
56 #define MMC_MODE_HS_52MHz (1 << 1)
57 #define MMC_MODE_4BIT (1 << 2)
58 #define MMC_MODE_8BIT (1 << 3)
59 #define MMC_MODE_SPI (1 << 4)
60 #define MMC_MODE_DDR_52MHz (1 << 5)
61 #define MMC_MODE_HS200 (1 << 6)
62 #define MMC_MODE_HS400 (1 << 7)
63 #define MMC_MODE_HS400ES (1 << 8)
64
65 #define SD_DATA_4BIT 0x00040000
66
67 #define IS_SD(x) ((x)->version & SD_VERSION_SD)
68 #define IS_MMC(x) ((x)->version & MMC_VERSION_MMC)
69
70 #define MMC_DATA_READ 1
71 #define MMC_DATA_WRITE 2
72
73 #define MMC_CMD_GO_IDLE_STATE 0
74 #define MMC_CMD_SEND_OP_COND 1
75 #define MMC_CMD_ALL_SEND_CID 2
76 #define MMC_CMD_SET_RELATIVE_ADDR 3
77 #define MMC_CMD_SET_DSR 4
78 #define MMC_CMD_SWITCH 6
79 #define MMC_CMD_SELECT_CARD 7
80 #define MMC_CMD_SEND_EXT_CSD 8
81 #define MMC_CMD_SEND_CSD 9
82 #define MMC_CMD_SEND_CID 10
83 #define MMC_CMD_STOP_TRANSMISSION 12
84 #define MMC_CMD_SEND_STATUS 13
85 #define MMC_CMD_SET_BLOCKLEN 16
86 #define MMC_CMD_READ_SINGLE_BLOCK 17
87 #define MMC_CMD_READ_MULTIPLE_BLOCK 18
88 #define MMC_SEND_TUNING_BLOCK 19
89 #define MMC_SEND_TUNING_BLOCK_HS200 21
90 #define MMC_CMD_SET_BLOCK_COUNT 23
91 #define MMC_CMD_WRITE_SINGLE_BLOCK 24
92 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
93 #define MMC_CMD_ERASE_GROUP_START 35
94 #define MMC_CMD_ERASE_GROUP_END 36
95 #define MMC_CMD_ERASE 38
96 #define MMC_CMD_APP_CMD 55
97 #define MMC_CMD_SPI_READ_OCR 58
98 #define MMC_CMD_SPI_CRC_ON_OFF 59
99 #define MMC_CMD_RES_MAN 62
100
101 #define MMC_CMD62_ARG1 0xefac62ec
102 #define MMC_CMD62_ARG2 0xcbaea7
103
104
105 #define SD_CMD_SEND_RELATIVE_ADDR 3
106 #define SD_CMD_SWITCH_FUNC 6
107 #define SD_CMD_SEND_IF_COND 8
108 #define SD_CMD_SWITCH_UHS18V 11
109
110 #define SD_CMD_APP_SET_BUS_WIDTH 6
111 #define SD_CMD_APP_SD_STATUS 13
112 #define SD_CMD_ERASE_WR_BLK_START 32
113 #define SD_CMD_ERASE_WR_BLK_END 33
114 #define SD_CMD_APP_SEND_OP_COND 41
115 #define SD_CMD_APP_SEND_SCR 51
116
117 /* SCR definitions in different words */
118 #define SD_HIGHSPEED_BUSY 0x00020000
119 #define SD_HIGHSPEED_SUPPORTED 0x00020000
120
121 #define OCR_BUSY 0x80000000
122 #define OCR_HCS 0x40000000
123 #define OCR_VOLTAGE_MASK 0x007FFF80
124 #define OCR_ACCESS_MODE 0x60000000
125
126 #define MMC_ERASE_ARG 0x00000000
127 #define MMC_SECURE_ERASE_ARG 0x80000000
128 #define MMC_TRIM_ARG 0x00000001
129 #define MMC_DISCARD_ARG 0x00000003
130 #define MMC_SECURE_TRIM1_ARG 0x80000001
131 #define MMC_SECURE_TRIM2_ARG 0x80008000
132
133 #define MMC_STATUS_MASK (~0x0206BF7F)
134 #define MMC_STATUS_SWITCH_ERROR (1 << 7)
135 #define MMC_STATUS_RDY_FOR_DATA (1 << 8)
136 #define MMC_STATUS_CURR_STATE (0xf << 9)
137 #define MMC_STATUS_ERROR (1 << 19)
138
139 #define MMC_STATE_PRG (7 << 9)
140
141 #define MMC_VDD_165_195_SHIFT 7
142 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
143 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
144 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
145 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
146 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
147 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
148 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
149 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
150 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
151 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
152 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
153 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
154 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
155 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
156 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
157 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
158 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
159
160 #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
161 #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte
162 addressed by index which are
163 1 in value field */
164 #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte
165 addressed by index, which are
166 1 in value field */
167 #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */
168
169 #define SD_SWITCH_CHECK 0
170 #define SD_SWITCH_SWITCH 1
171
172 /*
173 * EXT_CSD fields
174 */
175 #define EXT_CSD_ENH_START_ADDR 136 /* R/W */
176 #define EXT_CSD_ENH_SIZE_MULT 140 /* R/W */
177 #define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
178 #define EXT_CSD_PARTITION_SETTING 155 /* R/W */
179 #define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */
180 #define EXT_CSD_MAX_ENH_SIZE_MULT 157 /* R */
181 #define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
182 #define EXT_CSD_RST_N_FUNCTION 162 /* R/W */
183 #define EXT_CSD_BKOPS_EN 163 /* R/W & R/W/E */
184 #define EXT_CSD_WR_REL_PARAM 166 /* R */
185 #define EXT_CSD_WR_REL_SET 167 /* R/W */
186 #define EXT_CSD_RPMB_MULT 168 /* RO */
187 #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
188 #define EXT_CSD_BOOT_BUS_WIDTH 177
189 #define EXT_CSD_PART_CONF 179 /* R/W */
190 #define EXT_CSD_BUS_WIDTH 183 /* R/W */
191 #define EXT_CSD_STROBE_SUPPORT 184 /* RO */
192 #define EXT_CSD_HS_TIMING 185 /* R/W */
193 #define EXT_CSD_REV 192 /* RO */
194 #define EXT_CSD_CARD_TYPE 196 /* RO */
195 #define EXT_CSD_CARD_TYPE 196 /* RO */
196 #define EXT_CSD_DRIVER_STRENGTH 197 /* RO */
197 #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
198 #define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */
199 #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
200 #define EXT_CSD_BOOT_MULT 226 /* RO */
201 #define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */
202 #define EXT_CSD_BKOPS_SUPPORT 502 /* RO */
203
204 /*
205 * EXT_CSD field definitions
206 */
207
208 #define EXT_CSD_CMD_SET_NORMAL (1 << 0)
209 #define EXT_CSD_CMD_SET_SECURE (1 << 1)
210 #define EXT_CSD_CMD_SET_CPSECURE (1 << 2)
211
212 #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */
213 #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */
214 #define EXT_CSD_CARD_TYPE_HS (EXT_CSD_CARD_TYPE_26 | \
215 EXT_CSD_CARD_TYPE_52)
216 #define EXT_CSD_CARD_TYPE_HS200_1_8V BIT(4) /* Card can run at 200MHz */
217 #define EXT_CSD_CARD_TYPE_HS200_1_2V BIT(5) /* Card can run at 200MHz */
218 #define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \
219 EXT_CSD_CARD_TYPE_HS200_1_2V)
220 #define EXT_CSD_CARD_TYPE_HS400_1_8V BIT(6) /* Card can run at 200MHz DDR, 1.8V */
221 #define EXT_CSD_CARD_TYPE_HS400_1_2V BIT(7) /* Card can run at 200MHz DDR, 1.2V */
222 #define EXT_CSD_CARD_TYPE_HS400 (EXT_CSD_CARD_TYPE_HS400_1_8V | \
223 EXT_CSD_CARD_TYPE_HS400_1_2V)
224 #define EXT_CSD_CARD_TYPE_HS400ES BIT(8) /* Card can run at HS400ES */
225
226 #define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2)
227 #define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3)
228 #define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
229 | EXT_CSD_CARD_TYPE_DDR_1_2V)
230
231 #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
232 #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
233 #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
234 #define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
235 #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
236 #define EXT_CSD_BUS_WIDTH_STROBE BIT(7) /* Enhanced strobe mode */
237
238 #define EXT_CSD_TIMING_BC 0 /* Backwards compatility */
239 #define EXT_CSD_TIMING_HS 1 /* High speed */
240 #define EXT_CSD_TIMING_HS200 2 /* HS200 */
241 #define EXT_CSD_TIMING_HS400 3 /* HS400 */
242 #define EXT_CSD_DRV_STR_SHIFT 4 /* Driver Strength shift */
243
244 #define EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
245 #define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)
246 #define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0)
247 #define EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0)
248
249 #define EXT_CSD_BOOT_ACK(x) (x << 6)
250 #define EXT_CSD_BOOT_PART_NUM(x) (x << 3)
251 #define EXT_CSD_PARTITION_ACCESS(x) (x << 0)
252
253 #define EXT_CSD_EXTRACT_BOOT_ACK(x) (((x) >> 6) & 0x1)
254 #define EXT_CSD_EXTRACT_BOOT_PART(x) (((x) >> 3) & 0x7)
255 #define EXT_CSD_EXTRACT_PARTITION_ACCESS(x) ((x) & 0x7)
256
257 #define EXT_CSD_BOOT_BUS_WIDTH_MODE(x) (x << 3)
258 #define EXT_CSD_BOOT_BUS_WIDTH_RESET(x) (x << 2)
259 #define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(x) (x)
260
261 #define EXT_CSD_PARTITION_SETTING_COMPLETED (1 << 0)
262
263 #define EXT_CSD_ENH_USR (1 << 0) /* user data area is enhanced */
264 #define EXT_CSD_ENH_GP(x) (1 << ((x)+1)) /* GP part (x+1) is enhanced */
265
266 #define EXT_CSD_HS_CTRL_REL (1 << 0) /* host controlled WR_REL_SET */
267
268 #define EXT_CSD_WR_DATA_REL_USR (1 << 0) /* user data area WR_REL */
269 #define EXT_CSD_WR_DATA_REL_GP(x) (1 << ((x)+1)) /* GP part (x+1) WR_REL */
270
271 #define R1_ILLEGAL_COMMAND (1 << 22)
272 #define R1_APP_CMD (1 << 5)
273
274 #define MMC_RSP_PRESENT (1 << 0)
275 #define MMC_RSP_136 (1 << 1) /* 136 bit response */
276 #define MMC_RSP_CRC (1 << 2) /* expect valid crc */
277 #define MMC_RSP_BUSY (1 << 3) /* card may send busy */
278 #define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
279
280 #define EXT_CSD_SEC_ER_EN BIT(0)
281 #define EXT_CSD_SEC_BD_BLK_EN BIT(2)
282 #define EXT_CSD_SEC_GB_CL_EN BIT(4)
283 #define EXT_CSD_SEC_SANITIZE BIT(6) /* v4.5 only */
284
285 #define MMC_RSP_NONE (0)
286 #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
287 #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \
288 MMC_RSP_BUSY)
289 #define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
290 #define MMC_RSP_R3 (MMC_RSP_PRESENT)
291 #define MMC_RSP_R4 (MMC_RSP_PRESENT)
292 #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
293 #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
294 #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
295
296 #define MMCPART_NOAVAILABLE (0xff)
297 #define PART_ACCESS_MASK (0x7)
298 #define PART_SUPPORT (0x1)
299 #define ENHNCD_SUPPORT (0x2)
300 #define PART_ENH_ATTRIB (0x1f)
301
302 /* Maximum block size for MMC */
303 #define MMC_MAX_BLOCK_LEN 512
304
305 /* The number of MMC physical partitions. These consist of:
306 * boot partitions (2), general purpose partitions (4) in MMC v4.4.
307 */
308 #define MMC_NUM_BOOT_PARTITION 2
309 #define MMC_PART_RPMB 3 /* RPMB partition number */
310
311 /* Sizes of RPMB data frame */
312 #define RPMB_SZ_STUFF 196
313 #define RPMB_SZ_MAC 32
314 #define RPMB_SZ_DATA 256
315 #define RPMB_SZ_NONCE 16
316
317 /* Structure of RPMB data frame. */
318 struct s_rpmb {
319 unsigned char stuff[RPMB_SZ_STUFF];
320 unsigned char mac[RPMB_SZ_MAC];
321 unsigned char data[RPMB_SZ_DATA];
322 unsigned char nonce[RPMB_SZ_NONCE];
323 unsigned int write_counter;
324 unsigned short address;
325 unsigned short block_count;
326 unsigned short result;
327 unsigned short request;
328 } __packed;
329
330 struct s_rpmb_verify {
331 unsigned char data[RPMB_SZ_DATA];
332 unsigned char nonce[RPMB_SZ_NONCE];
333 unsigned int write_counter;
334 unsigned short address;
335 unsigned short block_count;
336 unsigned short result;
337 unsigned short request;
338 } __packed;
339
340 int init_rpmb(void);
341 int finish_rpmb(void);
342 int do_readcounter(struct s_rpmb *requestpackets);
343 int do_programkey(struct s_rpmb *requestpackets);
344 int do_authenticatedread(struct s_rpmb *requestpackets, uint16_t block_count);
345 int do_authenticatedwrite(struct s_rpmb *requestpackets);
346 struct mmc *do_returnmmc(void);
347
348 int read_counter(struct mmc *mmc, struct s_rpmb *requestpackets);
349 int program_key(struct mmc *mmc, struct s_rpmb *requestpackets);
350 int authenticated_read
351 (struct mmc *mmc, struct s_rpmb *requestpackets, uint16_t block_count);
352 int authenticated_write(struct mmc *mmc, struct s_rpmb *requestpackets);
353
354 /* Driver model support */
355
356 /**
357 * struct mmc_uclass_priv - Holds information about a device used by the uclass
358 */
359 struct mmc_uclass_priv {
360 struct mmc *mmc;
361 };
362
363 struct emmc_esr {
364 unsigned int mmc_can_trim;
365 };
366
367 /**
368 * mmc_get_mmc_dev() - get the MMC struct pointer for a device
369 *
370 * Provided that the device is already probed and ready for use, this value
371 * will be available.
372 *
373 * @dev: Device
374 * @return associated mmc struct pointer if available, else NULL
375 */
376 struct mmc *mmc_get_mmc_dev(struct udevice *dev);
377
378 /* End of driver model support */
379
380 struct mmc_cid {
381 unsigned long psn;
382 unsigned short oid;
383 unsigned char mid;
384 unsigned char prv;
385 unsigned char mdt;
386 char pnm[7];
387 };
388
389 struct mmc_cmd {
390 ushort cmdidx;
391 uint resp_type;
392 uint cmdarg;
393 uint response[4];
394 };
395
396 struct mmc_data {
397 union {
398 char *dest;
399 const char *src; /* src buffers don't get written to */
400 };
401 uint flags;
402 uint blocks;
403 uint blocksize;
404 };
405
406 /* forward decl. */
407 struct mmc;
408
409 #if CONFIG_IS_ENABLED(DM_MMC)
410 struct dm_mmc_ops {
411 /**
412 * send_cmd() - Send a command to the MMC device
413 *
414 * @dev: Device to receive the command
415 * @cmd: Command to send
416 * @data: Additional data to send/receive
417 * @return 0 if OK, -ve on error
418 */
419 int (*send_cmd)(struct udevice *dev, struct mmc_cmd *cmd,
420 struct mmc_data *data);
421
422 /**
423 * send_cmd_prepare() - Send a command to the MMC device
424 *
425 * @dev: Device to receive the command
426 * @cmd: Command to send
427 * @data: Additional data to send/receive
428 * @return 0 if OK, -ve on error
429 */
430 #ifdef CONFIG_SPL_BLK_READ_PREPARE
431 int (*send_cmd_prepare)(struct udevice *dev, struct mmc_cmd *cmd,
432 struct mmc_data *data);
433 #endif
434 /**
435 * card_busy() - Query the card device status
436 *
437 * @dev: Device to update
438 * @return true if card device is busy
439 */
440 bool (*card_busy)(struct udevice *dev);
441
442 /**
443 * set_ios() - Set the I/O speed/width for an MMC device
444 *
445 * @dev: Device to update
446 * @return 0 if OK, -ve on error
447 */
448 int (*set_ios)(struct udevice *dev);
449
450 /**
451 * get_cd() - See whether a card is present
452 *
453 * @dev: Device to check
454 * @return 0 if not present, 1 if present, -ve on error
455 */
456 int (*get_cd)(struct udevice *dev);
457
458 /**
459 * get_wp() - See whether a card has write-protect enabled
460 *
461 * @dev: Device to check
462 * @return 0 if write-enabled, 1 if write-protected, -ve on error
463 */
464 int (*get_wp)(struct udevice *dev);
465
466 /**
467 * execute_tuning() - Find the optimal sampling point of a data
468 * input signals.
469 *
470 * @dev: Device to check
471 * @opcode: The tuning command opcode value is different
472 * for SD and eMMC cards
473 * @return 0 if write-enabled, 1 if write-protected, -ve on error
474 */
475 int (*execute_tuning)(struct udevice *dev, u32 opcode);
476 /* set_enhanced_strobe() - set HS400 enhanced strobe */
477 int (*set_enhanced_strobe)(struct udevice *dev);
478 };
479
480 #define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops)
481
482 int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
483 struct mmc_data *data);
484 int dm_mmc_set_ios(struct udevice *dev);
485 int dm_mmc_get_cd(struct udevice *dev);
486 int dm_mmc_get_wp(struct udevice *dev);
487
488 /* Transition functions for compatibility */
489 bool mmc_card_busy(struct mmc *mmc);
490 bool mmc_can_card_busy(struct mmc *mmc);
491 int mmc_set_ios(struct mmc *mmc);
492 int mmc_getcd(struct mmc *mmc);
493 int mmc_getwp(struct mmc *mmc);
494
495 int mmc_set_enhanced_strobe(struct mmc *mmc);
496 #else
497 struct mmc_ops {
498 bool (*card_busy)(struct mmc *mmc);
499 int (*send_cmd)(struct mmc *mmc,
500 struct mmc_cmd *cmd, struct mmc_data *data);
501 int (*set_ios)(struct mmc *mmc);
502 int (*init)(struct mmc *mmc);
503 int (*getcd)(struct mmc *mmc);
504 int (*getwp)(struct mmc *mmc);
505 int (*execute_tuning)(struct udevice *dev, u32 opcode);
506 };
507 #endif
508
509 struct mmc_config {
510 const char *name;
511 #if !CONFIG_IS_ENABLED(DM_MMC)
512 const struct mmc_ops *ops;
513 #endif
514 uint host_caps;
515 uint voltages;
516 uint f_min;
517 uint f_max;
518 uint b_max;
519 unsigned char part_type;
520 u8 fixed_drv_type;
521 };
522
523 struct sd_ssr {
524 unsigned int au; /* In sectors */
525 unsigned int erase_timeout; /* In milliseconds */
526 unsigned int erase_offset; /* In milliseconds */
527 };
528
529 /*
530 * With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device
531 * with mmc_get_mmc_dev().
532 *
533 * TODO struct mmc should be in mmc_private but it's hard to fix right now
534 */
535 struct mmc {
536 #if !CONFIG_IS_ENABLED(BLK)
537 struct list_head link;
538 #endif
539 const struct mmc_config *cfg; /* provided configuration */
540 uint version;
541 void *priv;
542 uint has_init;
543 int high_capacity;
544 uint bus_width;
545
546 #define MMC_BUS_WIDTH_1BIT 1
547 #define MMC_BUS_WIDTH_4BIT 4
548 #define MMC_BUS_WIDTH_8BIT 8
549
550 uint timing;
551
552 #define MMC_TIMING_LEGACY 0
553 #define MMC_TIMING_MMC_HS 1
554 #define MMC_TIMING_SD_HS 2
555 #define MMC_TIMING_UHS_SDR12 3
556 #define MMC_TIMING_UHS_SDR25 4
557 #define MMC_TIMING_UHS_SDR50 5
558 #define MMC_TIMING_UHS_SDR104 6
559 #define MMC_TIMING_UHS_DDR50 7
560 #define MMC_TIMING_MMC_DDR52 8
561 #define MMC_TIMING_MMC_HS200 9
562 #define MMC_TIMING_MMC_HS400 10
563 #define MMC_TIMING_MMC_HS400ES 11
564
565 uint clock;
566
567 #define MMC_HIGH_26_MAX_DTR 26000000
568 #define MMC_HIGH_52_MAX_DTR 52000000
569 #define MMC_HIGH_DDR_MAX_DTR 52000000
570 #define MMC_HS200_MAX_DTR 200000000
571
572 uint card_caps;
573 uint ocr;
574 uint dsr;
575 uint dsr_imp;
576 uint scr[2];
577 uint csd[4];
578 uint cid[4];
579 ushort rca;
580 u8 part_support;
581 u8 part_attr;
582 u8 wr_rel_set;
583 u8 part_config;
584 uint read_bl_len;
585 uint write_bl_len;
586 uint erase_grp_size; /* in 512-byte sectors */
587 uint hc_wp_grp_size; /* in 512-byte sectors */
588 int default_phase; /* set the default sample clock phase */
589 uint init_retry; /* re-init mmc when error occur */
590 struct sd_ssr ssr; /* SD status register */
591 struct emmc_esr esr; /* emmc status register */
592 u64 capacity;
593 u64 capacity_user;
594 u64 capacity_boot;
595 u64 capacity_rpmb;
596 u64 capacity_gp[4];
597 u64 enh_user_start;
598 u64 enh_user_size;
599 #if !CONFIG_IS_ENABLED(BLK)
600 struct blk_desc block_dev;
601 #endif
602 char op_cond_pending; /* 1 if we are waiting on an op_cond command */
603 char init_in_progress; /* 1 if we have done mmc_start_init() */
604 char preinit; /* start init as early as possible */
605 #if CONFIG_IS_ENABLED(DM_MMC)
606 struct udevice *dev; /* Device for this MMC controller */
607 #endif
608 u8 raw_driver_strength;
609 };
610
611 struct mmc_hwpart_conf {
612 struct {
613 uint enh_start; /* in 512-byte sectors */
614 uint enh_size; /* in 512-byte sectors, if 0 no enh area */
615 unsigned wr_rel_change : 1;
616 unsigned wr_rel_set : 1;
617 } user;
618 struct {
619 uint size; /* in 512-byte sectors */
620 unsigned enhanced : 1;
621 unsigned wr_rel_change : 1;
622 unsigned wr_rel_set : 1;
623 } gp_part[4];
624 };
625
626 enum mmc_hwpart_conf_mode {
627 MMC_HWPART_CONF_CHECK,
628 MMC_HWPART_CONF_SET,
629 MMC_HWPART_CONF_COMPLETE,
630 };
631
mmc_card_hs(struct mmc * mmc)632 static inline bool mmc_card_hs(struct mmc *mmc)
633 {
634 return (mmc->timing == MMC_TIMING_MMC_HS) ||
635 (mmc->timing == MMC_TIMING_SD_HS);
636 }
637
mmc_card_ddr(struct mmc * mmc)638 static inline bool mmc_card_ddr(struct mmc *mmc)
639 {
640 return (mmc->timing == MMC_TIMING_UHS_DDR50) ||
641 (mmc->timing == MMC_TIMING_MMC_DDR52) ||
642 (mmc->timing == MMC_TIMING_MMC_HS400) ||
643 (mmc->timing == MMC_TIMING_MMC_HS400ES);
644 }
645
mmc_card_hs200(struct mmc * mmc)646 static inline bool mmc_card_hs200(struct mmc *mmc)
647 {
648 return mmc->timing == MMC_TIMING_MMC_HS200;
649 }
650
mmc_card_ddr52(struct mmc * mmc)651 static inline bool mmc_card_ddr52(struct mmc *mmc)
652 {
653 return mmc->timing == MMC_TIMING_MMC_DDR52;
654 }
655
mmc_card_hs400(struct mmc * mmc)656 static inline bool mmc_card_hs400(struct mmc *mmc)
657 {
658 return mmc->timing == MMC_TIMING_MMC_HS400;
659 }
660
mmc_card_hs400es(struct mmc * mmc)661 static inline bool mmc_card_hs400es(struct mmc *mmc)
662 {
663 return mmc->timing == MMC_TIMING_MMC_HS400ES;
664 }
665
666 int mmc_send_tuning(struct mmc *mmc, u32 opcode);
667
668 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv);
669
670 /**
671 * mmc_bind() - Set up a new MMC device ready for probing
672 *
673 * A child block device is bound with the IF_TYPE_MMC interface type. This
674 * allows the device to be used with CONFIG_BLK
675 *
676 * @dev: MMC device to set up
677 * @mmc: MMC struct
678 * @cfg: MMC configuration
679 * @return 0 if OK, -ve on error
680 */
681 int mmc_bind(struct udevice *dev, struct mmc *mmc,
682 const struct mmc_config *cfg);
683 void mmc_destroy(struct mmc *mmc);
684
685 /**
686 * mmc_unbind() - Unbind a MMC device's child block device
687 *
688 * @dev: MMC device
689 * @return 0 if OK, -ve on error
690 */
691 int mmc_unbind(struct udevice *dev);
692 int mmc_initialize(bd_t *bis);
693 int mmc_init(struct mmc *mmc);
694 int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size);
695 void mmc_set_clock(struct mmc *mmc, uint clock);
696 struct mmc *find_mmc_device(int dev_num);
697 int mmc_set_dev(int dev_num);
698 void print_mmc_devices(char separator);
699
700 /**
701 * get_mmc_num() - get the total MMC device number
702 *
703 * @return 0 if there is no MMC device, else the number of devices
704 */
705 int get_mmc_num(void);
706 int mmc_switch_part(struct mmc *mmc, unsigned int part_num);
707 int mmc_hwpart_config(struct mmc *mmc, const struct mmc_hwpart_conf *conf,
708 enum mmc_hwpart_conf_mode mode);
709
710 #if !CONFIG_IS_ENABLED(DM_MMC)
711 int mmc_getcd(struct mmc *mmc);
712 int board_mmc_getcd(struct mmc *mmc);
713 int mmc_getwp(struct mmc *mmc);
714 int board_mmc_getwp(struct mmc *mmc);
715 #endif
716
717 int mmc_set_dsr(struct mmc *mmc, u16 val);
718 /* Function to change the size of boot partition and rpmb partitions */
719 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
720 unsigned long rpmbsize);
721 /* Function to modify the PARTITION_CONFIG field of EXT_CSD */
722 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access);
723 /* Function to modify the BOOT_BUS_WIDTH field of EXT_CSD */
724 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode);
725 /* Function to modify the RST_n_FUNCTION field of EXT_CSD */
726 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable);
727 /* Functions to read / write the RPMB partition */
728 int mmc_rpmb_set_key(struct mmc *mmc, void *key);
729 int mmc_rpmb_get_counter(struct mmc *mmc, unsigned long *counter);
730 int mmc_rpmb_read(struct mmc *mmc, void *addr, unsigned short blk,
731 unsigned short cnt, unsigned char *key);
732 int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk,
733 unsigned short cnt, unsigned char *key);
734 #ifdef CONFIG_CMD_BKOPS_ENABLE
735 int mmc_set_bkops_enable(struct mmc *mmc);
736 #endif
737
738 /**
739 * Start device initialization and return immediately; it does not block on
740 * polling OCR (operation condition register) status. Then you should call
741 * mmc_init, which would block on polling OCR status and complete the device
742 * initializatin.
743 *
744 * @param mmc Pointer to a MMC device struct
745 * @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error.
746 */
747 int mmc_start_init(struct mmc *mmc);
748
749 /**
750 * Set preinit flag of mmc device.
751 *
752 * This will cause the device to be pre-inited during mmc_initialize(),
753 * which may save boot time if the device is not accessed until later.
754 * Some eMMC devices take 200-300ms to init, but unfortunately they
755 * must be sent a series of commands to even get them to start preparing
756 * for operation.
757 *
758 * @param mmc Pointer to a MMC device struct
759 * @param preinit preinit flag value
760 */
761 void mmc_set_preinit(struct mmc *mmc, int preinit);
762
763 #ifdef CONFIG_MMC_SPI
764 #define mmc_host_is_spi(mmc) ((mmc)->cfg->host_caps & MMC_MODE_SPI)
765 #else
766 #define mmc_host_is_spi(mmc) 0
767 #endif
768 struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode);
769
770 void board_mmc_power_init(void);
771 int board_mmc_init(bd_t *bis);
772 int cpu_mmc_init(bd_t *bis);
773 int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr);
774 int mmc_get_env_dev(void);
775
776 /* Set block count limit because of 16 bit register limit on some hardware*/
777 #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
778 #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
779 #endif
780
781 /**
782 * mmc_get_blk_desc() - Get the block descriptor for an MMC device
783 *
784 * @mmc: MMC device
785 * @return block device if found, else NULL
786 */
787 struct blk_desc *mmc_get_blk_desc(struct mmc *mmc);
788
789
790 /**
791 * mmc_gpio_init_direct()
792 *
793 */
794 void mmc_gpio_init_direct(void);
795
796 #define mmc_driver_type_mask(n) (1 << (n))
797
798 #endif /* _MMC_H_ */
799
800