1 /* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _IRQ_GENERIC_H 8 #define _IRQ_GENERIC_H 9 10 #include <asm-generic/gpio.h> 11 #include <common.h> 12 #include <dt-bindings/pinctrl/rockchip.h> 13 14 #define IRQ_I(fmt, args...) printf("IRQ: "fmt, ##args) 15 #define IRQ_W(fmt, args...) printf("IRQ Warn: "fmt, ##args) 16 #define IRQ_E(fmt, args...) printf("IRQ Err: "fmt, ##args) 17 #define IRQ_D(fmt, args...) debug("IRQ Debug "fmt, ##args) 18 19 /* 20 * IRQ line status. 21 * 22 * IRQ_TYPE_NONE - default, unspecified type 23 * IRQ_TYPE_EDGE_RISING - rising edge triggered 24 * IRQ_TYPE_EDGE_FALLING - falling edge triggered 25 * IRQ_TYPE_EDGE_BOTH - rising and falling edge triggered 26 * IRQ_TYPE_LEVEL_HIGH - high level triggered 27 * IRQ_TYPE_LEVEL_LOW - low level triggered 28 * IRQ_TYPE_LEVEL_MASK - mask to filter out the level bits 29 * IRQ_TYPE_SENSE_MASK - mask for all the above bits 30 */ 31 enum { 32 IRQ_TYPE_NONE = 0x00000000, 33 IRQ_TYPE_EDGE_RISING = 0x00000001, 34 IRQ_TYPE_EDGE_FALLING = 0x00000002, 35 IRQ_TYPE_EDGE_BOTH = (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING), 36 IRQ_TYPE_LEVEL_HIGH = 0x00000004, 37 IRQ_TYPE_LEVEL_LOW = 0x00000008, 38 IRQ_TYPE_LEVEL_MASK = (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH), 39 IRQ_TYPE_SENSE_MASK = 0x0000000f, 40 }; 41 42 /* 43 * struct irq_chip - hardware interrupt chip descriptor 44 * 45 * @name: name for irq chip 46 * @irq_enable: enable the interrupt (defaults to chip->unmask if NULL) 47 * @irq_disable: disable the interrupt 48 * @irq_ack: start of a new interrupt 49 * @irq_eoi: end of interrupt 50 * @irq_set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ 51 */ 52 struct irq_chip { 53 const char *name; 54 int (*irq_init)(void); 55 int (*irq_suspend)(void); 56 int (*irq_resume)(void); 57 int (*irq_get)(void); 58 int (*irq_enable)(int irq); 59 int (*irq_disable)(int irq); 60 void (*irq_ack)(int irq); 61 void (*irq_eoi)(int irq); 62 int (*irq_set_type)(int irq, unsigned int flow_type); 63 int (*irq_revert_type)(int irq); 64 int (*irq_get_gpio_level)(int irq); 65 }; 66 67 /* 68 * Virtual irq chip structure 69 */ 70 typedef int(virq_write_t)(struct udevice *dev, uint reg, uint value); 71 typedef int(virq_read_t)(struct udevice *dev, uint reg); 72 73 struct virq_reg { 74 uint reg_offset; 75 uint mask; 76 }; 77 78 struct virq_chip { 79 uint status_base; 80 uint mask_base; 81 uint irq_reg_stride; 82 uint irq_unalign_reg_idx; 83 uint irq_unalign_reg_stride; 84 int num_regs; 85 const struct virq_reg *irqs; 86 int num_irqs; 87 virq_read_t *read; 88 virq_write_t *write; 89 }; 90 91 /* APIs for irqs */ 92 void irq_install_handler(int irq, interrupt_handler_t *handler, void *data); 93 void irq_free_handler(int irq); 94 int irq_set_irq_type(int irq, unsigned int type); 95 int irq_revert_irq_type(int irq); 96 int irq_handler_enable(int irq); 97 int irq_handler_enable_suspend_only(int irq); 98 int irq_handler_disable(int irq); 99 int irq_get_gpio_level(int irq); 100 int irqs_suspend(void); 101 int irqs_resume(void); 102 int irq_is_busy(int irq); 103 int gpio_to_irq(struct gpio_desc *gpio); 104 105 /* 106 * Assign gpio to irq directly. Don't use it without special reasons. 107 * 108 * Usage example: 109 * int gpio0_a0, irq; 110 * 111 * gpio = RK_IRQ_GPIO(RK_GPIO0, RK_PA0); 112 * irq = hard_gpio_to_irq(gpio0_a0); 113 * irq_install_handler(irq, ...); 114 */ 115 #define GPIO_BANK_SHIFT 8 116 #define RK_IRQ_GPIO(bank, pin) (((bank) << GPIO_BANK_SHIFT) | (pin)) 117 118 int hard_gpio_to_irq(unsigned gpio); 119 int phandle_gpio_to_irq(u32 gpio_phandle, u32 pin); 120 121 /* Virtual irq */ 122 int virq_to_irq(struct virq_chip *chip, int virq); 123 int virq_add_chip(struct udevice *dev, struct virq_chip *chip, int irq); 124 125 #endif /* _IRQ_GENERIC_H */ 126