1 /* 2 * (C) Copyright 2008-2016 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _DRM_MODES_H 8 #define _DRM_MODES_H 9 10 #include "fdtdec.h" 11 12 #define DRM_DISPLAY_INFO_LEN 32 13 #define DRM_CONNECTOR_NAME_LEN 32 14 #define DRM_DISPLAY_MODE_LEN 32 15 #define DRM_PROP_NAME_LEN 32 16 17 #define DRM_MODE_TYPE_BUILTIN (1<<0) 18 #define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN) 19 #define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN) 20 #define DRM_MODE_TYPE_PREFERRED (1<<3) 21 #define DRM_MODE_TYPE_DEFAULT (1<<4) 22 #define DRM_MODE_TYPE_USERDEF (1<<5) 23 #define DRM_MODE_TYPE_DRIVER (1<<6) 24 25 /* Video mode flags */ 26 /* bit compatible with the xorg definitions. */ 27 #define DRM_MODE_FLAG_PHSYNC (1 << 0) 28 #define DRM_MODE_FLAG_NHSYNC (1 << 1) 29 #define DRM_MODE_FLAG_PVSYNC (1 << 2) 30 #define DRM_MODE_FLAG_NVSYNC (1 << 3) 31 #define DRM_MODE_FLAG_INTERLACE (1 << 4) 32 #define DRM_MODE_FLAG_DBLSCAN (1 << 5) 33 #define DRM_MODE_FLAG_CSYNC (1 << 6) 34 #define DRM_MODE_FLAG_PCSYNC (1 << 7) 35 #define DRM_MODE_FLAG_NCSYNC (1 << 8) 36 #define DRM_MODE_FLAG_HSKEW (1 << 9) /* hskew provided */ 37 #define DRM_MODE_FLAG_BCAST (1 << 10) 38 #define DRM_MODE_FLAG_PIXMUX (1 << 11) 39 #define DRM_MODE_FLAG_DBLCLK (1 << 12) 40 #define DRM_MODE_FLAG_CLKDIV2 (1 << 13) 41 /* 42 * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX 43 * (define not exposed to user space). 44 */ 45 #define DRM_MODE_FLAG_3D_MASK (0x1f << 14) 46 #define DRM_MODE_FLAG_3D_NONE (0 << 14) 47 #define DRM_MODE_FLAG_3D_FRAME_PACKING (1 << 14) 48 #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2 << 14) 49 #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3 << 14) 50 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4 << 14) 51 #define DRM_MODE_FLAG_3D_L_DEPTH (5 << 14) 52 #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6 << 14) 53 #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7 << 14) 54 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8 << 14) 55 56 /* Panel Mirror control */ 57 #define DRM_MODE_FLAG_XMIRROR (1<<28) 58 #define DRM_MODE_FLAG_YMIRROR (1<<29) 59 #define DRM_MODE_FLAG_XYMIRROR (DRM_MODE_FLAG_XMIRROR | DRM_MODE_FLAG_YMIRROR) 60 61 /* Picture aspect ratio options */ 62 #define DRM_MODE_PICTURE_ASPECT_NONE 0 63 #define DRM_MODE_PICTURE_ASPECT_4_3 1 64 #define DRM_MODE_PICTURE_ASPECT_16_9 2 65 #define DRM_MODE_PICTURE_ASPECT_64_27 3 66 #define DRM_MODE_PICTURE_ASPECT_256_135 4 67 68 /* Aspect ratio flag bitmask (4 bits 22:19) */ 69 #define DRM_MODE_FLAG_PIC_AR_MASK (0x0F << 19) 70 #define DRM_MODE_FLAG_PIC_AR_NONE \ 71 (DRM_MODE_PICTURE_ASPECT_NONE << 19) 72 #define DRM_MODE_FLAG_PIC_AR_4_3 \ 73 (DRM_MODE_PICTURE_ASPECT_4_3 << 19) 74 #define DRM_MODE_FLAG_PIC_AR_16_9 \ 75 (DRM_MODE_PICTURE_ASPECT_16_9 << 19) 76 #define DRM_MODE_FLAG_PIC_AR_64_27 \ 77 (DRM_MODE_PICTURE_ASPECT_64_27 << 19) 78 #define DRM_MODE_FLAG_PIC_AR_256_135 \ 79 (DRM_MODE_PICTURE_ASPECT_256_135 << 19) 80 81 #define DRM_MODE_CONNECTOR_Unknown 0 82 #define DRM_MODE_CONNECTOR_VGA 1 83 #define DRM_MODE_CONNECTOR_DVII 2 84 #define DRM_MODE_CONNECTOR_DVID 3 85 #define DRM_MODE_CONNECTOR_DVIA 4 86 #define DRM_MODE_CONNECTOR_Composite 5 87 #define DRM_MODE_CONNECTOR_SVIDEO 6 88 #define DRM_MODE_CONNECTOR_LVDS 7 89 #define DRM_MODE_CONNECTOR_Component 8 90 #define DRM_MODE_CONNECTOR_9PinDIN 9 91 #define DRM_MODE_CONNECTOR_DisplayPort 10 92 #define DRM_MODE_CONNECTOR_HDMIA 11 93 #define DRM_MODE_CONNECTOR_HDMIB 12 94 #define DRM_MODE_CONNECTOR_TV 13 95 #define DRM_MODE_CONNECTOR_eDP 14 96 #define DRM_MODE_CONNECTOR_VIRTUAL 15 97 #define DRM_MODE_CONNECTOR_DSI 16 98 #define DRM_MODE_CONNECTOR_DPI 17 99 100 #define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) 101 #define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) 102 #define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) 103 #define DRM_EDID_PT_STEREO (1 << 5) 104 #define DRM_EDID_PT_INTERLACED (1 << 7) 105 106 /* see also http://vektor.theorem.ca/graphics/ycbcr/ */ 107 enum v4l2_colorspace { 108 /* 109 * Default colorspace, i.e. let the driver figure it out. 110 * Can only be used with video capture. 111 */ 112 V4L2_COLORSPACE_DEFAULT = 0, 113 114 /* SMPTE 170M: used for broadcast NTSC/PAL SDTV */ 115 V4L2_COLORSPACE_SMPTE170M = 1, 116 117 /* Obsolete pre-1998 SMPTE 240M HDTV standard, superseded by Rec 709 */ 118 V4L2_COLORSPACE_SMPTE240M = 2, 119 120 /* Rec.709: used for HDTV */ 121 V4L2_COLORSPACE_REC709 = 3, 122 123 /* 124 * Deprecated, do not use. No driver will ever return this. This was 125 * based on a misunderstanding of the bt878 datasheet. 126 */ 127 V4L2_COLORSPACE_BT878 = 4, 128 129 /* 130 * NTSC 1953 colorspace. This only makes sense when dealing with 131 * really, really old NTSC recordings. Superseded by SMPTE 170M. 132 */ 133 V4L2_COLORSPACE_470_SYSTEM_M = 5, 134 135 /* 136 * EBU Tech 3213 PAL/SECAM colorspace. This only makes sense when 137 * dealing with really old PAL/SECAM recordings. Superseded by 138 * SMPTE 170M. 139 */ 140 V4L2_COLORSPACE_470_SYSTEM_BG = 6, 141 142 /* 143 * Effectively shorthand for V4L2_COLORSPACE_SRGB, V4L2_YCBCR_ENC_601 144 * and V4L2_QUANTIZATION_FULL_RANGE. To be used for (Motion-)JPEG. 145 */ 146 V4L2_COLORSPACE_JPEG = 7, 147 148 /* For RGB colorspaces such as produces by most webcams. */ 149 V4L2_COLORSPACE_SRGB = 8, 150 151 /* AdobeRGB colorspace */ 152 V4L2_COLORSPACE_ADOBERGB = 9, 153 154 /* BT.2020 colorspace, used for UHDTV. */ 155 V4L2_COLORSPACE_BT2020 = 10, 156 157 /* Raw colorspace: for RAW unprocessed images */ 158 V4L2_COLORSPACE_RAW = 11, 159 160 /* DCI-P3 colorspace, used by cinema projectors */ 161 V4L2_COLORSPACE_DCI_P3 = 12, 162 }; 163 164 #define CRTC_INTERLACE_HALVE_V (1 << 0) /* halve V values for interlacing */ 165 #define CRTC_STEREO_DOUBLE (1 << 1) /* adjust timings for stereo modes */ 166 #define CRTC_NO_DBLSCAN (1 << 2) /* don't adjust doublescan */ 167 #define CRTC_NO_VSCAN (1 << 3) /* don't adjust doublescan */ 168 #define CRTC_STEREO_DOUBLE_ONLY (CRTC_STEREO_DOUBLE | CRTC_NO_DBLSCAN | \ 169 CRTC_NO_VSCAN) 170 171 #define DRM_MODE_FLAG_3D_MAX DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF 172 173 #define DRM_MODE_MATCH_TIMINGS (1 << 0) 174 #define DRM_MODE_MATCH_CLOCK (1 << 1) 175 #define DRM_MODE_MATCH_FLAGS (1 << 2) 176 #define DRM_MODE_MATCH_3D_FLAGS (1 << 3) 177 #define DRM_MODE_MATCH_ASPECT_RATIO (1 << 4) 178 179 struct drm_display_mode { 180 /* Proposed mode values */ 181 int clock; /* in kHz */ 182 int hdisplay; 183 int hsync_start; 184 int hsync_end; 185 int htotal; 186 int vdisplay; 187 int vsync_start; 188 int vsync_end; 189 int vtotal; 190 int vrefresh; 191 int vscan; 192 unsigned int flags; 193 int picture_aspect_ratio; 194 int hskew; 195 unsigned int type; 196 /* Actual mode we give to hw */ 197 int crtc_clock; /* in KHz */ 198 int crtc_hdisplay; 199 int crtc_hblank_start; 200 int crtc_hblank_end; 201 int crtc_hsync_start; 202 int crtc_hsync_end; 203 int crtc_htotal; 204 int crtc_hskew; 205 int crtc_vdisplay; 206 int crtc_vblank_start; 207 int crtc_vblank_end; 208 int crtc_vsync_start; 209 int crtc_vsync_end; 210 int crtc_vtotal; 211 bool invalid; 212 }; 213 214 /** 215 * enum drm_mode_status - hardware support status of a mode 216 * @MODE_OK: Mode OK 217 * @MODE_HSYNC: hsync out of range 218 * @MODE_VSYNC: vsync out of range 219 * @MODE_H_ILLEGAL: mode has illegal horizontal timings 220 * @MODE_V_ILLEGAL: mode has illegal vertical timings 221 * @MODE_BAD_WIDTH: requires an unsupported linepitch 222 * @MODE_NOMODE: no mode with a matching name 223 * @MODE_NO_INTERLACE: interlaced mode not supported 224 * @MODE_NO_DBLESCAN: doublescan mode not supported 225 * @MODE_NO_VSCAN: multiscan mode not supported 226 * @MODE_MEM: insufficient video memory 227 * @MODE_VIRTUAL_X: mode width too large for specified virtual size 228 * @MODE_VIRTUAL_Y: mode height too large for specified virtual size 229 * @MODE_MEM_VIRT: insufficient video memory given virtual size 230 * @MODE_NOCLOCK: no fixed clock available 231 * @MODE_CLOCK_HIGH: clock required is too high 232 * @MODE_CLOCK_LOW: clock required is too low 233 * @MODE_CLOCK_RANGE: clock/mode isn't in a ClockRange 234 * @MODE_BAD_HVALUE: horizontal timing was out of range 235 * @MODE_BAD_VVALUE: vertical timing was out of range 236 * @MODE_BAD_VSCAN: VScan value out of range 237 * @MODE_HSYNC_NARROW: horizontal sync too narrow 238 * @MODE_HSYNC_WIDE: horizontal sync too wide 239 * @MODE_HBLANK_NARROW: horizontal blanking too narrow 240 * @MODE_HBLANK_WIDE: horizontal blanking too wide 241 * @MODE_VSYNC_NARROW: vertical sync too narrow 242 * @MODE_VSYNC_WIDE: vertical sync too wide 243 * @MODE_VBLANK_NARROW: vertical blanking too narrow 244 * @MODE_VBLANK_WIDE: vertical blanking too wide 245 * @MODE_PANEL: exceeds panel dimensions 246 * @MODE_INTERLACE_WIDTH: width too large for interlaced mode 247 * @MODE_ONE_WIDTH: only one width is supported 248 * @MODE_ONE_HEIGHT: only one height is supported 249 * @MODE_ONE_SIZE: only one resolution is supported 250 * @MODE_NO_REDUCED: monitor doesn't accept reduced blanking 251 * @MODE_NO_STEREO: stereo modes not supported 252 * @MODE_NO_420: ycbcr 420 modes not supported 253 * @MODE_STALE: mode has become stale 254 * @MODE_BAD: unspecified reason 255 * @MODE_ERROR: error condition 256 * 257 * This enum is used to filter out modes not supported by the driver/hardware 258 * combination. 259 */ 260 enum drm_mode_status { 261 MODE_OK = 0, 262 MODE_HSYNC, 263 MODE_VSYNC, 264 MODE_H_ILLEGAL, 265 MODE_V_ILLEGAL, 266 MODE_BAD_WIDTH, 267 MODE_NOMODE, 268 MODE_NO_INTERLACE, 269 MODE_NO_DBLESCAN, 270 MODE_NO_VSCAN, 271 MODE_MEM, 272 MODE_VIRTUAL_X, 273 MODE_VIRTUAL_Y, 274 MODE_MEM_VIRT, 275 MODE_NOCLOCK, 276 MODE_CLOCK_HIGH, 277 MODE_CLOCK_LOW, 278 MODE_CLOCK_RANGE, 279 MODE_BAD_HVALUE, 280 MODE_BAD_VVALUE, 281 MODE_BAD_VSCAN, 282 MODE_HSYNC_NARROW, 283 MODE_HSYNC_WIDE, 284 MODE_HBLANK_NARROW, 285 MODE_HBLANK_WIDE, 286 MODE_VSYNC_NARROW, 287 MODE_VSYNC_WIDE, 288 MODE_VBLANK_NARROW, 289 MODE_VBLANK_WIDE, 290 MODE_PANEL, 291 MODE_INTERLACE_WIDTH, 292 MODE_ONE_WIDTH, 293 MODE_ONE_HEIGHT, 294 MODE_ONE_SIZE, 295 MODE_NO_REDUCED, 296 MODE_NO_STEREO, 297 MODE_NO_420, 298 MODE_STALE = -3, 299 MODE_BAD = -2, 300 MODE_ERROR = -1 301 }; 302 303 /* 304 * Subsystem independent description of a videomode. 305 * Can be generated from struct display_timing. 306 */ 307 struct videomode { 308 unsigned long pixelclock; /* pixelclock in Hz */ 309 310 u32 hactive; 311 u32 hfront_porch; 312 u32 hback_porch; 313 u32 hsync_len; 314 315 u32 vactive; 316 u32 vfront_porch; 317 u32 vback_porch; 318 u32 vsync_len; 319 320 enum display_flags flags; /* display flags */ 321 }; 322 323 struct drm_display_mode *drm_mode_create(void); 324 void drm_mode_copy(struct drm_display_mode *dst, 325 const struct drm_display_mode *src); 326 void drm_mode_destroy(struct drm_display_mode *mode); 327 bool drm_mode_match(const struct drm_display_mode *mode1, 328 const struct drm_display_mode *mode2, 329 unsigned int match_flags); 330 bool drm_mode_equal(const struct drm_display_mode *mode1, 331 const struct drm_display_mode *mode2); 332 void drm_display_mode_from_videomode(const struct videomode *vm, 333 struct drm_display_mode *dmode); 334 void drm_display_mode_to_videomode(const struct drm_display_mode *dmode, 335 struct videomode *vm); 336 337 #endif 338