1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * MIPI DSI Bus
4 *
5 * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
6 * Andrzej Hajda <a.hajda@samsung.com>
7 */
8
9 #ifndef __DRM_MIPI_DSI_H__
10 #define __DRM_MIPI_DSI_H__
11
12 #include <mipi_display.h>
13 #include <drm/drm_dsc.h>
14 #include <dm/device.h>
15
16 struct mipi_dsi_host;
17 struct mipi_dsi_device;
18
19 /* request ACK from peripheral */
20 #define MIPI_DSI_MSG_REQ_ACK BIT(0)
21 /* use Low Power Mode to transmit message */
22 #define MIPI_DSI_MSG_USE_LPM BIT(1)
23
24 /**
25 * struct mipi_dsi_msg - read/write DSI buffer
26 * @channel: virtual channel id
27 * @type: payload data type
28 * @flags: flags controlling this message transmission
29 * @tx_len: length of @tx_buf
30 * @tx_buf: data to be written
31 * @rx_len: length of @rx_buf
32 * @rx_buf: data to be read, or NULL
33 */
34 struct mipi_dsi_msg {
35 u8 channel;
36 u8 type;
37 u16 flags;
38
39 size_t tx_len;
40 const void *tx_buf;
41
42 size_t rx_len;
43 void *rx_buf;
44 };
45
46 bool mipi_dsi_packet_format_is_short(u8 type);
47 bool mipi_dsi_packet_format_is_long(u8 type);
48
49 /**
50 * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
51 * @size: size (in bytes) of the packet
52 * @header: the four bytes that make up the header (Data ID, Word Count or
53 * Packet Data, and ECC)
54 * @payload_length: number of bytes in the payload
55 * @payload: a pointer to a buffer containing the payload, if any
56 */
57 struct mipi_dsi_packet {
58 size_t size;
59 u8 header[4];
60 size_t payload_length;
61 const u8 *payload;
62 };
63
64 int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
65 const struct mipi_dsi_msg *msg);
66
67 /**
68 * struct mipi_dsi_host_ops - DSI bus operations
69 * @attach: attach DSI device to DSI host
70 * @detach: detach DSI device from DSI host
71 * @transfer: transmit a DSI packet
72 *
73 * DSI packets transmitted by .transfer() are passed in as mipi_dsi_msg
74 * structures. This structure contains information about the type of packet
75 * being transmitted as well as the transmit and receive buffers. When an
76 * error is encountered during transmission, this function will return a
77 * negative error code. On success it shall return the number of bytes
78 * transmitted for write packets or the number of bytes received for read
79 * packets.
80 *
81 * Note that typically DSI packet transmission is atomic, so the .transfer()
82 * function will seldomly return anything other than the number of bytes
83 * contained in the transmit buffer on success.
84 */
85 struct mipi_dsi_host_ops {
86 int (*attach)(struct mipi_dsi_host *host,
87 struct mipi_dsi_device *dsi);
88 int (*detach)(struct mipi_dsi_host *host,
89 struct mipi_dsi_device *dsi);
90 ssize_t (*transfer)(struct mipi_dsi_host *host,
91 const struct mipi_dsi_msg *msg);
92 };
93
94 /**
95 * struct mipi_dsi_host - DSI host device
96 * @dev: driver model device node for this DSI host
97 * @ops: DSI host operations
98 * @list: list management
99 */
100 struct mipi_dsi_host {
101 struct udevice *dev;
102 const struct mipi_dsi_host_ops *ops;
103 };
104
105 /* DSI mode flags */
106
107 /* video mode */
108 #define MIPI_DSI_MODE_VIDEO BIT(0)
109 /* video burst mode */
110 #define MIPI_DSI_MODE_VIDEO_BURST BIT(1)
111 /* video pulse mode */
112 #define MIPI_DSI_MODE_VIDEO_SYNC_PULSE BIT(2)
113 /* enable auto vertical count mode */
114 #define MIPI_DSI_MODE_VIDEO_AUTO_VERT BIT(3)
115 /* enable hsync-end packets in vsync-pulse and v-porch area */
116 #define MIPI_DSI_MODE_VIDEO_HSE BIT(4)
117 /* disable hfront-porch area */
118 #define MIPI_DSI_MODE_VIDEO_HFP BIT(5)
119 /* disable hback-porch area */
120 #define MIPI_DSI_MODE_VIDEO_HBP BIT(6)
121 /* disable hsync-active area */
122 #define MIPI_DSI_MODE_VIDEO_HSA BIT(7)
123 /* flush display FIFO on vsync pulse */
124 #define MIPI_DSI_MODE_VSYNC_FLUSH BIT(8)
125 /* disable EoT packets in HS mode */
126 #define MIPI_DSI_MODE_EOT_PACKET BIT(9)
127 /* device supports non-continuous clock behavior (DSI spec 5.6.1) */
128 #define MIPI_DSI_CLOCK_NON_CONTINUOUS BIT(10)
129 /* transmit data in low power */
130 #define MIPI_DSI_MODE_LPM BIT(11)
131
132 enum mipi_dsi_pixel_format {
133 MIPI_DSI_FMT_RGB888,
134 MIPI_DSI_FMT_RGB666,
135 MIPI_DSI_FMT_RGB666_PACKED,
136 MIPI_DSI_FMT_RGB565,
137 };
138
139 #define DSI_DEV_NAME_SIZE 20
140
141 /**
142 * struct mipi_dsi_device - DSI peripheral device
143 * @host: DSI host for this peripheral
144 * @dev: driver model device node for this peripheral
145 * @name: DSI peripheral chip type
146 * @channel: virtual channel assigned to the peripheral
147 * @format: pixel format for video mode
148 * @lanes: number of active data lanes
149 * @mode_flags: DSI operation mode related flags
150 * @hs_rate: maximum lane frequency for high speed mode in hertz, this should
151 * be set to the real limits of the hardware, zero is only accepted for
152 * legacy drivers
153 * @lp_rate: maximum lane frequency for low power mode in hertz, this should
154 * be set to the real limits of the hardware, zero is only accepted for
155 * legacy drivers
156 */
157 struct mipi_dsi_device {
158 struct mipi_dsi_host *host;
159 struct udevice *dev;
160
161 char name[DSI_DEV_NAME_SIZE];
162 unsigned int channel;
163 unsigned int lanes;
164 enum mipi_dsi_pixel_format format;
165 unsigned long mode_flags;
166 unsigned long hs_rate;
167 unsigned long lp_rate;
168 };
169
170 /**
171 * mipi_dsi_pixel_format_to_bpp - obtain the number of bits per pixel for any
172 * given pixel format defined by the MIPI DSI
173 * specification
174 * @fmt: MIPI DSI pixel format
175 *
176 * Returns: The number of bits per pixel of the given pixel format.
177 */
mipi_dsi_pixel_format_to_bpp(enum mipi_dsi_pixel_format fmt)178 static inline int mipi_dsi_pixel_format_to_bpp(enum mipi_dsi_pixel_format fmt)
179 {
180 switch (fmt) {
181 case MIPI_DSI_FMT_RGB888:
182 case MIPI_DSI_FMT_RGB666:
183 return 24;
184
185 case MIPI_DSI_FMT_RGB666_PACKED:
186 return 18;
187
188 case MIPI_DSI_FMT_RGB565:
189 return 16;
190 }
191
192 return -EINVAL;
193 }
194
195 int mipi_dsi_attach(struct mipi_dsi_device *dsi);
196 int mipi_dsi_detach(struct mipi_dsi_device *dsi);
197 int mipi_dsi_shutdown_peripheral(struct mipi_dsi_device *dsi);
198 int mipi_dsi_turn_on_peripheral(struct mipi_dsi_device *dsi);
199 int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi,
200 u16 value);
201
202 ssize_t mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable);
203 ssize_t mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi,
204 const struct drm_dsc_picture_parameter_set *pps);
205
206 ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void *payload,
207 size_t size);
208 ssize_t mipi_dsi_generic_read(struct mipi_dsi_device *dsi, const void *params,
209 size_t num_params, void *data, size_t size);
210
211 /**
212 * enum mipi_dsi_dcs_tear_mode - Tearing Effect Output Line mode
213 * @MIPI_DSI_DCS_TEAR_MODE_VBLANK: the TE output line consists of V-Blanking
214 * information only
215 * @MIPI_DSI_DCS_TEAR_MODE_VHBLANK : the TE output line consists of both
216 * V-Blanking and H-Blanking information
217 */
218 enum mipi_dsi_dcs_tear_mode {
219 MIPI_DSI_DCS_TEAR_MODE_VBLANK,
220 MIPI_DSI_DCS_TEAR_MODE_VHBLANK,
221 };
222
223 #define MIPI_DSI_DCS_POWER_MODE_DISPLAY BIT(2)
224 #define MIPI_DSI_DCS_POWER_MODE_NORMAL BIT(3)
225 #define MIPI_DSI_DCS_POWER_MODE_SLEEP BIT(4)
226 #define MIPI_DSI_DCS_POWER_MODE_PARTIAL BIT(5)
227 #define MIPI_DSI_DCS_POWER_MODE_IDLE BIT(6)
228
229 ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi,
230 const void *data, size_t len);
231 ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd,
232 const void *data, size_t len);
233 ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
234 size_t len);
235 int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi);
236 int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi);
237 int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode);
238 int mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format);
239 int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi);
240 int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi);
241 int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi);
242 int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi);
243 int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start,
244 u16 end);
245 int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start,
246 u16 end);
247 int mipi_dsi_dcs_set_tear_off(struct mipi_dsi_device *dsi);
248 int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi,
249 enum mipi_dsi_dcs_tear_mode mode);
250 int mipi_dsi_dcs_set_pixel_format(struct mipi_dsi_device *dsi, u8 format);
251 int mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline);
252 int mipi_dsi_dcs_set_display_brightness(struct mipi_dsi_device *dsi,
253 u16 brightness);
254 int mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi,
255 u16 *brightness);
256
257 #endif /* __DRM_MIPI_DSI__ */
258