xref: /OK3568_Linux_fs/u-boot/include/configs/cgtqmx6eval.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  * Congatec Conga-QEVAl board configuration file.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6*4882a593Smuzhiyun  * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7*4882a593Smuzhiyun  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8*4882a593Smuzhiyun  * Leo Sartre, <lsartre@adeneo-embedded.com>
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #ifndef __CONFIG_CGTQMX6EVAL_H
14*4882a593Smuzhiyun #define __CONFIG_CGTQMX6EVAL_H
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include "mx6_common.h"
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define CONFIG_MACH_TYPE	4122
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #ifdef CONFIG_SPL
21*4882a593Smuzhiyun #define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
22*4882a593Smuzhiyun #define CONFIG_SPL_SPI_LOAD
23*4882a593Smuzhiyun #include "imx6_spl.h"
24*4882a593Smuzhiyun #endif
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun /* Size of malloc() pool */
27*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define CONFIG_MISC_INIT_R
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define CONFIG_MXC_UART
32*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE	       UART2_BASE
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun /* MMC Configs */
35*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR      0
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /* SPI NOR */
38*4882a593Smuzhiyun #define CONFIG_SPI_FLASH_STMICRO
39*4882a593Smuzhiyun #define CONFIG_SPI_FLASH_SST
40*4882a593Smuzhiyun #define CONFIG_MXC_SPI
41*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_BUS		0
42*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_SPEED		20000000
43*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun /* Thermal support */
46*4882a593Smuzhiyun #define CONFIG_IMX_THERMAL
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun /* I2C Configs */
49*4882a593Smuzhiyun #define CONFIG_SYS_I2C
50*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC
51*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
52*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
53*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
54*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SPEED		  100000
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun /* PMIC */
57*4882a593Smuzhiyun #define CONFIG_POWER
58*4882a593Smuzhiyun #define CONFIG_POWER_I2C
59*4882a593Smuzhiyun #define CONFIG_POWER_PFUZE100
60*4882a593Smuzhiyun #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun /* USB Configs */
63*4882a593Smuzhiyun #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
64*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
65*4882a593Smuzhiyun #define CONFIG_MXC_USB_FLAGS	0
66*4882a593Smuzhiyun #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun #define CONFIG_USBD_HS
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun #define CONFIG_USB_FUNCTION_MASS_STORAGE
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun /* Framebuffer */
73*4882a593Smuzhiyun #define CONFIG_VIDEO_IPUV3
74*4882a593Smuzhiyun #define CONFIG_VIDEO_BMP_RLE8
75*4882a593Smuzhiyun #define CONFIG_SPLASH_SCREEN
76*4882a593Smuzhiyun #define CONFIG_SPLASH_SCREEN_ALIGN
77*4882a593Smuzhiyun #define CONFIG_BMP_16BPP
78*4882a593Smuzhiyun #define CONFIG_VIDEO_LOGO
79*4882a593Smuzhiyun #define CONFIG_VIDEO_BMP_LOGO
80*4882a593Smuzhiyun #ifdef CONFIG_MX6DL
81*4882a593Smuzhiyun #define CONFIG_IPUV3_CLK 198000000
82*4882a593Smuzhiyun #else
83*4882a593Smuzhiyun #define CONFIG_IPUV3_CLK 264000000
84*4882a593Smuzhiyun #endif
85*4882a593Smuzhiyun #define CONFIG_IMX_HDMI
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun /* SATA */
88*4882a593Smuzhiyun #define CONFIG_DWC_AHSATA
89*4882a593Smuzhiyun #define CONFIG_SYS_SATA_MAX_DEVICE	1
90*4882a593Smuzhiyun #define CONFIG_DWC_AHSATA_PORT_ID	0
91*4882a593Smuzhiyun #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
92*4882a593Smuzhiyun #define CONFIG_LBA48
93*4882a593Smuzhiyun #define CONFIG_LIBATA
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun /* Ethernet */
96*4882a593Smuzhiyun #define CONFIG_FEC_MXC
97*4882a593Smuzhiyun #define CONFIG_MII
98*4882a593Smuzhiyun #define IMX_FEC_BASE			ENET_BASE_ADDR
99*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE		RGMII
100*4882a593Smuzhiyun #define CONFIG_ETHPRIME			"FEC"
101*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR		6
102*4882a593Smuzhiyun #define CONFIG_PHY_ATHEROS
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun /* Command definition */
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE	UART2_BASE
107*4882a593Smuzhiyun #define CONSOLE_DEV	"ttymxc1"
108*4882a593Smuzhiyun #define CONFIG_MMCROOT		"/dev/mmcblk0p2"
109*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV		0
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
112*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \
113*4882a593Smuzhiyun 	"script=boot.scr\0" \
114*4882a593Smuzhiyun 	"image=zImage\0" \
115*4882a593Smuzhiyun 	"fdtfile=undefined\0" \
116*4882a593Smuzhiyun 	"fdt_addr_r=0x18000000\0" \
117*4882a593Smuzhiyun 	"boot_fdt=try\0" \
118*4882a593Smuzhiyun 	"ip_dyn=yes\0" \
119*4882a593Smuzhiyun 	"console=" CONSOLE_DEV "\0" \
120*4882a593Smuzhiyun 	"dfuspi=dfu 0 sf 0:0:10000000:0\0" \
121*4882a593Smuzhiyun 	"dfu_alt_info_spl=spl raw 0x400\0" \
122*4882a593Smuzhiyun 	"dfu_alt_info_img=u-boot raw 0x10000\0" \
123*4882a593Smuzhiyun 	"dfu_alt_info=spl raw 0x400\0" \
124*4882a593Smuzhiyun 	"bootm_size=0x10000000\0" \
125*4882a593Smuzhiyun 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
126*4882a593Smuzhiyun 	"mmcpart=1\0" \
127*4882a593Smuzhiyun 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
128*4882a593Smuzhiyun 	"update_sd_firmware=" \
129*4882a593Smuzhiyun 		"if test ${ip_dyn} = yes; then " \
130*4882a593Smuzhiyun 			"setenv get_cmd dhcp; " \
131*4882a593Smuzhiyun 		"else " \
132*4882a593Smuzhiyun 			"setenv get_cmd tftp; " \
133*4882a593Smuzhiyun 		"fi; " \
134*4882a593Smuzhiyun 		"if mmc dev ${mmcdev}; then "	\
135*4882a593Smuzhiyun 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
136*4882a593Smuzhiyun 				"setexpr fw_sz ${filesize} / 0x200; " \
137*4882a593Smuzhiyun 				"setexpr fw_sz ${fw_sz} + 1; "	\
138*4882a593Smuzhiyun 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
139*4882a593Smuzhiyun 			"fi; "	\
140*4882a593Smuzhiyun 		"fi\0" \
141*4882a593Smuzhiyun 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
142*4882a593Smuzhiyun 		"root=${mmcroot}\0" \
143*4882a593Smuzhiyun 	"loadbootscript=" \
144*4882a593Smuzhiyun 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
145*4882a593Smuzhiyun 	"bootscript=echo Running bootscript from mmc ...; " \
146*4882a593Smuzhiyun 		"source\0" \
147*4882a593Smuzhiyun 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
148*4882a593Smuzhiyun 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
149*4882a593Smuzhiyun 	"mmcboot=echo Booting from mmc ...; " \
150*4882a593Smuzhiyun 		"run mmcargs; " \
151*4882a593Smuzhiyun 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
152*4882a593Smuzhiyun 			"if run loadfdt; then " \
153*4882a593Smuzhiyun 				"bootz ${loadaddr} - ${fdt_addr_r}; " \
154*4882a593Smuzhiyun 			"else " \
155*4882a593Smuzhiyun 				"if test ${boot_fdt} = try; then " \
156*4882a593Smuzhiyun 					"bootz; " \
157*4882a593Smuzhiyun 				"else " \
158*4882a593Smuzhiyun 					"echo WARN: Cannot load the DT; " \
159*4882a593Smuzhiyun 				"fi; " \
160*4882a593Smuzhiyun 			"fi; " \
161*4882a593Smuzhiyun 		"else " \
162*4882a593Smuzhiyun 			"bootz; " \
163*4882a593Smuzhiyun 		"fi;\0" \
164*4882a593Smuzhiyun 	"findfdt="\
165*4882a593Smuzhiyun 		"if test $board_rev = MX6Q ; then " \
166*4882a593Smuzhiyun 			"setenv fdtfile imx6q-qmx6.dtb; fi; " \
167*4882a593Smuzhiyun 		"if test $board_rev = MX6DL ; then " \
168*4882a593Smuzhiyun 			"setenv fdtfile imx6dl-qmx6.dtb; fi; " \
169*4882a593Smuzhiyun 		"if test $fdtfile = undefined; then " \
170*4882a593Smuzhiyun 			"echo WARNING: Could not determine dtb to use; fi; \0" \
171*4882a593Smuzhiyun 	"netargs=setenv bootargs console=${console},${baudrate} " \
172*4882a593Smuzhiyun 		"root=/dev/nfs " \
173*4882a593Smuzhiyun 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
174*4882a593Smuzhiyun 	"netboot=echo Booting from net ...; " \
175*4882a593Smuzhiyun 		"run netargs; " \
176*4882a593Smuzhiyun 		"if test ${ip_dyn} = yes; then " \
177*4882a593Smuzhiyun 			"setenv get_cmd dhcp; " \
178*4882a593Smuzhiyun 		"else " \
179*4882a593Smuzhiyun 			"setenv get_cmd tftp; " \
180*4882a593Smuzhiyun 		"fi; " \
181*4882a593Smuzhiyun 		"${get_cmd} ${image}; " \
182*4882a593Smuzhiyun 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
183*4882a593Smuzhiyun 			"if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
184*4882a593Smuzhiyun 				"bootz ${loadaddr} - ${fdt_addr_r}; " \
185*4882a593Smuzhiyun 			"else " \
186*4882a593Smuzhiyun 				"if test ${boot_fdt} = try; then " \
187*4882a593Smuzhiyun 					"bootz; " \
188*4882a593Smuzhiyun 				"else " \
189*4882a593Smuzhiyun 					"echo WARN: Cannot load the DT; " \
190*4882a593Smuzhiyun 				"fi; " \
191*4882a593Smuzhiyun 			"fi; " \
192*4882a593Smuzhiyun 		"else " \
193*4882a593Smuzhiyun 			"bootz; " \
194*4882a593Smuzhiyun 		"fi;\0" \
195*4882a593Smuzhiyun 	"spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \
198*4882a593Smuzhiyun 	"run spilock;"	    \
199*4882a593Smuzhiyun 	"run findfdt; "	\
200*4882a593Smuzhiyun 	"mmc dev ${mmcdev};" \
201*4882a593Smuzhiyun 	"if mmc rescan; then " \
202*4882a593Smuzhiyun 		"if run loadbootscript; then " \
203*4882a593Smuzhiyun 		"run bootscript; " \
204*4882a593Smuzhiyun 		"else " \
205*4882a593Smuzhiyun 			"if run loadimage; then " \
206*4882a593Smuzhiyun 				"run mmcboot; " \
207*4882a593Smuzhiyun 			"else run netboot; " \
208*4882a593Smuzhiyun 			"fi; " \
209*4882a593Smuzhiyun 		"fi; " \
210*4882a593Smuzhiyun 	"else run netboot; fi"
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START       0x10000000
213*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END	       0x10010000
214*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun /* Physical Memory Map */
217*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS	       1
218*4882a593Smuzhiyun #define PHYS_SDRAM		       MMDC0_ARB_BASE_ADDR
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE	       PHYS_SDRAM
221*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
222*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \
225*4882a593Smuzhiyun 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
226*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \
227*4882a593Smuzhiyun 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun /* Environment organization */
230*4882a593Smuzhiyun #if defined (CONFIG_ENV_IS_IN_MMC)
231*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
232*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV		0
233*4882a593Smuzhiyun #endif
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun #define CONFIG_ENV_SIZE			(8 * 1024)
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun #if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
238*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET		(768 * 1024)
239*4882a593Smuzhiyun #define CONFIG_ENV_SECT_SIZE		(64 * 1024)
240*4882a593Smuzhiyun #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
241*4882a593Smuzhiyun #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
242*4882a593Smuzhiyun #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
243*4882a593Smuzhiyun #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
244*4882a593Smuzhiyun #endif
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun #endif			       /* __CONFIG_CGTQMX6EVAL_H */
247