1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * am3517_evm.h - Default configuration for AM3517 EVM board. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Author: Vaibhav Hiremath <hvaibhav@ti.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Based on omap3_evm_config.h 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Copyright (C) 2010 Texas Instruments Incorporated 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #ifndef __CONFIG_H 14*4882a593Smuzhiyun #define __CONFIG_H 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* 21*4882a593Smuzhiyun * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 22*4882a593Smuzhiyun * 64 bytes before this address should be set aside for u-boot.img's 23*4882a593Smuzhiyun * header. That is 0x800FFFC0--0x80100000 should not be used for any 24*4882a593Smuzhiyun * other needs. 25*4882a593Smuzhiyun */ 26*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x80100000 27*4882a593Smuzhiyun #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 28*4882a593Smuzhiyun #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #include <asm/arch/cpu.h> /* get chip and board defs */ 31*4882a593Smuzhiyun #include <asm/arch/omap.h> 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #define CONFIG_MISC_INIT_R 34*4882a593Smuzhiyun #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 35*4882a593Smuzhiyun #define CONFIG_SETUP_MEMORY_TAGS 36*4882a593Smuzhiyun #define CONFIG_INITRD_TAG 37*4882a593Smuzhiyun #define CONFIG_REVISION_TAG 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* Clock Defines */ 40*4882a593Smuzhiyun #define V_OSCK 26000000 /* Clock output from T2 */ 41*4882a593Smuzhiyun #define V_SCLK (V_OSCK >> 1) 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun /* Size of malloc() pool */ 44*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (16 << 20) 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* Hardware drivers */ 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* NS16550 Configuration */ 49*4882a593Smuzhiyun #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 50*4882a593Smuzhiyun #define CONFIG_SYS_NS16550_SERIAL 51*4882a593Smuzhiyun #define CONFIG_SYS_NS16550_REG_SIZE (-4) 52*4882a593Smuzhiyun #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun /* select serial console configuration */ 55*4882a593Smuzhiyun #define CONFIG_CONS_INDEX 3 56*4882a593Smuzhiyun #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 57*4882a593Smuzhiyun #define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */ 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* allow to overwrite serial and ethaddr */ 60*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE 61*4882a593Smuzhiyun #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 62*4882a593Smuzhiyun 115200} 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun /* 65*4882a593Smuzhiyun * USB configuration 66*4882a593Smuzhiyun * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard 67*4882a593Smuzhiyun * Enable CONFIG_USB_MUSB_GADGET for Device functionalities. 68*4882a593Smuzhiyun */ 69*4882a593Smuzhiyun #define CONFIG_USB_MUSB_AM35X 70*4882a593Smuzhiyun #define CONFIG_USB_MUSB_PIO_ONLY 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun #ifdef CONFIG_USB_MUSB_AM35X 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun #ifdef CONFIG_USB_MUSB_HOST 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun #ifdef CONFIG_USB_KEYBOARD 77*4882a593Smuzhiyun #define CONFIG_PREBOOT "usb start" 78*4882a593Smuzhiyun #endif /* CONFIG_USB_KEYBOARD */ 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun #endif /* CONFIG_USB_MUSB_HOST */ 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun #endif /* CONFIG_USB_MUSB_AM35X */ 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun /* I2C */ 85*4882a593Smuzhiyun #define CONFIG_SYS_I2C 86*4882a593Smuzhiyun #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 87*4882a593Smuzhiyun #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun /* Ethernet */ 90*4882a593Smuzhiyun #define CONFIG_DRIVER_TI_EMAC 91*4882a593Smuzhiyun #define CONFIG_DRIVER_TI_EMAC_USE_RMII 92*4882a593Smuzhiyun #define CONFIG_MII 93*4882a593Smuzhiyun #define CONFIG_BOOTP_DEFAULT 94*4882a593Smuzhiyun #define CONFIG_BOOTP_DNS 95*4882a593Smuzhiyun #define CONFIG_BOOTP_DNS2 96*4882a593Smuzhiyun #define CONFIG_BOOTP_SEND_HOSTNAME 97*4882a593Smuzhiyun #define CONFIG_NET_RETRY_COUNT 10 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun /* Board NAND Info. */ 100*4882a593Smuzhiyun #ifdef CONFIG_NAND 101*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 102*4882a593Smuzhiyun /* to access nand */ 103*4882a593Smuzhiyun #define CONFIG_SYS_NAND_5_ADDR_CYCLE 104*4882a593Smuzhiyun #define CONFIG_SYS_NAND_PAGE_COUNT 64 105*4882a593Smuzhiyun #define CONFIG_SYS_NAND_PAGE_SIZE 2048 106*4882a593Smuzhiyun #define CONFIG_SYS_NAND_OOBSIZE 64 107*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 108*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 109*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \ 110*4882a593Smuzhiyun 11, 12, 13, 14, 16, 17, 18, 19, 20, \ 111*4882a593Smuzhiyun 21, 22, 23, 24, 25, 26, 27, 28, 30, \ 112*4882a593Smuzhiyun 31, 32, 33, 34, 35, 36, 37, 38, 39, \ 113*4882a593Smuzhiyun 40, 41, 42, 44, 45, 46, 47, 48, 49, \ 114*4882a593Smuzhiyun 50, 51, 52, 53, 54, 55, 56 } 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ECCSIZE 512 117*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ECCBYTES 13 118*4882a593Smuzhiyun #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 119*4882a593Smuzhiyun #define CONFIG_SYS_NAND_MAX_OOBFREE 2 120*4882a593Smuzhiyun #define CONFIG_SYS_NAND_MAX_ECCPOS 56 121*4882a593Smuzhiyun #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 122*4882a593Smuzhiyun #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 123*4882a593Smuzhiyun /* NAND block size is 128 KiB. Synchronize these values with 124*4882a593Smuzhiyun * corresponding Device Tree entries in Linux: 125*4882a593Smuzhiyun * MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000 126*4882a593Smuzhiyun * U-Boot 15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000 127*4882a593Smuzhiyun * U-Boot environment 2 * NAND_BLOCK_SIZE = 256 KiB @ 0x260000 128*4882a593Smuzhiyun * Kernel 64 * NAND_BLOCK_SIZE = 8 MiB @ 0x2A0000 129*4882a593Smuzhiyun * DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000 130*4882a593Smuzhiyun * RootFS Remaining Flash Space @ 0xB20000 131*4882a593Smuzhiyun */ 132*4882a593Smuzhiyun #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 133*4882a593Smuzhiyun #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ 134*4882a593Smuzhiyun "512k(MLO)," \ 135*4882a593Smuzhiyun "1920k(u-boot)," \ 136*4882a593Smuzhiyun "256k(u-boot-env)," \ 137*4882a593Smuzhiyun "8m(kernel)," \ 138*4882a593Smuzhiyun "512k(dtb)," \ 139*4882a593Smuzhiyun "-(rootfs)" 140*4882a593Smuzhiyun #else 141*4882a593Smuzhiyun #define MTDIDS_DEFAULT 142*4882a593Smuzhiyun #define MTDPARTS_DEFAULT 143*4882a593Smuzhiyun #endif /* CONFIG_NAND */ 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun /* Environment information */ 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun #define CONFIG_BOOTFILE "uImage" 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 150*4882a593Smuzhiyun "loadaddr=0x82000000\0" \ 151*4882a593Smuzhiyun "console=ttyO2,115200n8\0" \ 152*4882a593Smuzhiyun "fdtfile=am3517-evm.dtb\0" \ 153*4882a593Smuzhiyun "fdtaddr=0x82C00000\0" \ 154*4882a593Smuzhiyun "vram=16M\0" \ 155*4882a593Smuzhiyun "bootenv=uEnv.txt\0" \ 156*4882a593Smuzhiyun "cmdline=\0" \ 157*4882a593Smuzhiyun "optargs=\0" \ 158*4882a593Smuzhiyun "mtdids=" MTDIDS_DEFAULT "\0" \ 159*4882a593Smuzhiyun "mtdparts=" MTDPARTS_DEFAULT "\0" \ 160*4882a593Smuzhiyun "mmcdev=0\0" \ 161*4882a593Smuzhiyun "mmcpart=1\0" \ 162*4882a593Smuzhiyun "mmcroot=/dev/mmcblk0p2 rw\0" \ 163*4882a593Smuzhiyun "mmcrootfstype=ext4 rootwait fixrtc\0" \ 164*4882a593Smuzhiyun "mmcargs=setenv bootargs console=${console} " \ 165*4882a593Smuzhiyun "${mtdparts} " \ 166*4882a593Smuzhiyun "${optargs} " \ 167*4882a593Smuzhiyun "root=${mmcroot} " \ 168*4882a593Smuzhiyun "rootfstype=${mmcrootfstype} " \ 169*4882a593Smuzhiyun "${cmdline}\0" \ 170*4882a593Smuzhiyun "nandargs=setenv bootargs console=${console} " \ 171*4882a593Smuzhiyun "${mtdparts} " \ 172*4882a593Smuzhiyun "${optargs} " \ 173*4882a593Smuzhiyun "root=ubi0:rootfs rw ubi.mtd=rootfs " \ 174*4882a593Smuzhiyun "rootfstype=ubifs rootwait " \ 175*4882a593Smuzhiyun "${cmdline}\0" \ 176*4882a593Smuzhiyun "loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\ 177*4882a593Smuzhiyun "importbootenv=echo Importing environment from mmc ...; " \ 178*4882a593Smuzhiyun "env import -t ${loadaddr} ${filesize}\0" \ 179*4882a593Smuzhiyun "bootscript=echo Running bootscript from mmc ...; " \ 180*4882a593Smuzhiyun "source ${loadaddr}\0" \ 181*4882a593Smuzhiyun "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \ 182*4882a593Smuzhiyun "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \ 183*4882a593Smuzhiyun "mmcboot=echo Booting from mmc ...; " \ 184*4882a593Smuzhiyun "run mmcargs; " \ 185*4882a593Smuzhiyun "bootz ${loadaddr} - ${fdtaddr}\0" \ 186*4882a593Smuzhiyun "nandboot=echo Booting from nand ...; " \ 187*4882a593Smuzhiyun "run nandargs; " \ 188*4882a593Smuzhiyun "nand read ${loadaddr} 2a0000 800000; " \ 189*4882a593Smuzhiyun "nand read ${fdtaddr} aa0000 80000; " \ 190*4882a593Smuzhiyun "bootm ${loadaddr} - ${fdtaddr}\0" \ 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \ 193*4882a593Smuzhiyun "mmc dev ${mmcdev}; if mmc rescan; then " \ 194*4882a593Smuzhiyun "echo SD/MMC found on device $mmcdev; " \ 195*4882a593Smuzhiyun "if run loadbootenv; then " \ 196*4882a593Smuzhiyun "run importbootenv; " \ 197*4882a593Smuzhiyun "fi; " \ 198*4882a593Smuzhiyun "echo Checking if uenvcmd is set ...; " \ 199*4882a593Smuzhiyun "if test -n $uenvcmd; then " \ 200*4882a593Smuzhiyun "echo Running uenvcmd ...; " \ 201*4882a593Smuzhiyun "run uenvcmd; " \ 202*4882a593Smuzhiyun "fi; " \ 203*4882a593Smuzhiyun "echo Running default loadimage ...; " \ 204*4882a593Smuzhiyun "setenv bootfile zImage; " \ 205*4882a593Smuzhiyun "if run loadimage; then " \ 206*4882a593Smuzhiyun "run loadfdt; " \ 207*4882a593Smuzhiyun "run mmcboot; " \ 208*4882a593Smuzhiyun "fi; " \ 209*4882a593Smuzhiyun "else run nandboot; fi" 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun /* Miscellaneous configurable options */ 212*4882a593Smuzhiyun #define CONFIG_AUTO_COMPLETE 213*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING 214*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun /* We set the max number of command args high to avoid HUSH bugs. */ 217*4882a593Smuzhiyun #define CONFIG_SYS_MAXARGS 64 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun /* Console I/O Buffer Size */ 220*4882a593Smuzhiyun #define CONFIG_SYS_CBSIZE 512 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun /* memtest works on */ 223*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 224*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 225*4882a593Smuzhiyun 0x01F00000) /* 31MB */ 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 228*4882a593Smuzhiyun /* address */ 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun /* 231*4882a593Smuzhiyun * AM3517 has 12 GP timers, they can be driven by the system clock 232*4882a593Smuzhiyun * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 233*4882a593Smuzhiyun * This rate is divided by a local divisor. 234*4882a593Smuzhiyun */ 235*4882a593Smuzhiyun #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 236*4882a593Smuzhiyun #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun /* Physical Memory Map */ 239*4882a593Smuzhiyun #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 240*4882a593Smuzhiyun #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 241*4882a593Smuzhiyun #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 242*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 243*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 244*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE 0x800 245*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 246*4882a593Smuzhiyun CONFIG_SYS_INIT_RAM_SIZE - \ 247*4882a593Smuzhiyun GENERATED_GBL_DATA_SIZE) 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun /* FLASH and environment organization */ 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun /* **** PISMO SUPPORT *** */ 252*4882a593Smuzhiyun #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */ 253*4882a593Smuzhiyun /* on one chip */ 254*4882a593Smuzhiyun #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ 255*4882a593Smuzhiyun #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun #if defined(CONFIG_NAND) 258*4882a593Smuzhiyun #define CONFIG_SYS_FLASH_BASE NAND_BASE 259*4882a593Smuzhiyun #endif 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun /* Monitor at start of flash */ 262*4882a593Smuzhiyun #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 265*4882a593Smuzhiyun #define CONFIG_ENV_SIZE CONFIG_SYS_ENV_SECT_SIZE 266*4882a593Smuzhiyun #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 267*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 268*4882a593Smuzhiyun #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun /* Defines for SPL */ 271*4882a593Smuzhiyun #define CONFIG_SPL_FRAMEWORK 272*4882a593Smuzhiyun #define CONFIG_SPL_NAND_SIMPLE 273*4882a593Smuzhiyun #define CONFIG_SPL_TEXT_BASE 0x40200000 274*4882a593Smuzhiyun #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 275*4882a593Smuzhiyun CONFIG_SPL_TEXT_BASE) 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun #define CONFIG_SPL_BSS_START_ADDR 0x80000000 278*4882a593Smuzhiyun #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 281*4882a593Smuzhiyun #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun #define CONFIG_SPL_NAND_BASE 284*4882a593Smuzhiyun #define CONFIG_SPL_NAND_DRIVERS 285*4882a593Smuzhiyun #define CONFIG_SPL_NAND_ECC 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun #endif /* __CONFIG_H */ 288