1 /* 2 * am3517_evm.h - Default configuration for AM3517 EVM board. 3 * 4 * Author: Vaibhav Hiremath <hvaibhav@ti.com> 5 * 6 * Based on omap3_evm_config.h 7 * 8 * Copyright (C) 2010 Texas Instruments Incorporated 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 17 18 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ 19 20 /* 21 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 22 * 64 bytes before this address should be set aside for u-boot.img's 23 * header. That is 0x800FFFC0--0x80100000 should not be used for any 24 * other needs. 25 */ 26 #define CONFIG_SYS_TEXT_BASE 0x80100000 27 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 28 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 29 30 #include <asm/arch/cpu.h> /* get chip and board defs */ 31 #include <asm/arch/omap.h> 32 33 #define CONFIG_MISC_INIT_R 34 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 35 #define CONFIG_SETUP_MEMORY_TAGS 36 #define CONFIG_INITRD_TAG 37 #define CONFIG_REVISION_TAG 38 39 /* Clock Defines */ 40 #define V_OSCK 26000000 /* Clock output from T2 */ 41 #define V_SCLK (V_OSCK >> 1) 42 43 /* Size of malloc() pool */ 44 #define CONFIG_SYS_MALLOC_LEN (16 << 20) 45 46 /* Hardware drivers */ 47 48 /* NS16550 Configuration */ 49 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 50 #define CONFIG_SYS_NS16550_SERIAL 51 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 52 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 53 54 /* select serial console configuration */ 55 #define CONFIG_CONS_INDEX 3 56 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 57 #define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */ 58 59 /* allow to overwrite serial and ethaddr */ 60 #define CONFIG_ENV_OVERWRITE 61 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 62 115200} 63 64 /* 65 * USB configuration 66 * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard 67 * Enable CONFIG_USB_MUSB_GADGET for Device functionalities. 68 */ 69 #define CONFIG_USB_MUSB_AM35X 70 #define CONFIG_USB_MUSB_PIO_ONLY 71 72 #ifdef CONFIG_USB_MUSB_AM35X 73 74 #ifdef CONFIG_USB_MUSB_HOST 75 76 #ifdef CONFIG_USB_KEYBOARD 77 #define CONFIG_PREBOOT "usb start" 78 #endif /* CONFIG_USB_KEYBOARD */ 79 80 #endif /* CONFIG_USB_MUSB_HOST */ 81 82 #endif /* CONFIG_USB_MUSB_AM35X */ 83 84 /* I2C */ 85 #define CONFIG_SYS_I2C 86 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 87 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 88 89 /* Ethernet */ 90 #define CONFIG_DRIVER_TI_EMAC 91 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 92 #define CONFIG_MII 93 #define CONFIG_BOOTP_DEFAULT 94 #define CONFIG_BOOTP_DNS 95 #define CONFIG_BOOTP_DNS2 96 #define CONFIG_BOOTP_SEND_HOSTNAME 97 #define CONFIG_NET_RETRY_COUNT 10 98 99 /* Board NAND Info. */ 100 #ifdef CONFIG_NAND 101 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 102 /* to access nand */ 103 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 104 #define CONFIG_SYS_NAND_PAGE_COUNT 64 105 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 106 #define CONFIG_SYS_NAND_OOBSIZE 64 107 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 108 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 109 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \ 110 11, 12, 13, 14, 16, 17, 18, 19, 20, \ 111 21, 22, 23, 24, 25, 26, 27, 28, 30, \ 112 31, 32, 33, 34, 35, 36, 37, 38, 39, \ 113 40, 41, 42, 44, 45, 46, 47, 48, 49, \ 114 50, 51, 52, 53, 54, 55, 56 } 115 116 #define CONFIG_SYS_NAND_ECCSIZE 512 117 #define CONFIG_SYS_NAND_ECCBYTES 13 118 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 119 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 120 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 121 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 122 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 123 /* NAND block size is 128 KiB. Synchronize these values with 124 * corresponding Device Tree entries in Linux: 125 * MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000 126 * U-Boot 15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000 127 * U-Boot environment 2 * NAND_BLOCK_SIZE = 256 KiB @ 0x260000 128 * Kernel 64 * NAND_BLOCK_SIZE = 8 MiB @ 0x2A0000 129 * DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000 130 * RootFS Remaining Flash Space @ 0xB20000 131 */ 132 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 133 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ 134 "512k(MLO)," \ 135 "1920k(u-boot)," \ 136 "256k(u-boot-env)," \ 137 "8m(kernel)," \ 138 "512k(dtb)," \ 139 "-(rootfs)" 140 #else 141 #define MTDIDS_DEFAULT 142 #define MTDPARTS_DEFAULT 143 #endif /* CONFIG_NAND */ 144 145 /* Environment information */ 146 147 #define CONFIG_BOOTFILE "uImage" 148 149 #define CONFIG_EXTRA_ENV_SETTINGS \ 150 "loadaddr=0x82000000\0" \ 151 "console=ttyO2,115200n8\0" \ 152 "fdtfile=am3517-evm.dtb\0" \ 153 "fdtaddr=0x82C00000\0" \ 154 "vram=16M\0" \ 155 "bootenv=uEnv.txt\0" \ 156 "cmdline=\0" \ 157 "optargs=\0" \ 158 "mtdids=" MTDIDS_DEFAULT "\0" \ 159 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 160 "mmcdev=0\0" \ 161 "mmcpart=1\0" \ 162 "mmcroot=/dev/mmcblk0p2 rw\0" \ 163 "mmcrootfstype=ext4 rootwait fixrtc\0" \ 164 "mmcargs=setenv bootargs console=${console} " \ 165 "${mtdparts} " \ 166 "${optargs} " \ 167 "root=${mmcroot} " \ 168 "rootfstype=${mmcrootfstype} " \ 169 "${cmdline}\0" \ 170 "nandargs=setenv bootargs console=${console} " \ 171 "${mtdparts} " \ 172 "${optargs} " \ 173 "root=ubi0:rootfs rw ubi.mtd=rootfs " \ 174 "rootfstype=ubifs rootwait " \ 175 "${cmdline}\0" \ 176 "loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\ 177 "importbootenv=echo Importing environment from mmc ...; " \ 178 "env import -t ${loadaddr} ${filesize}\0" \ 179 "bootscript=echo Running bootscript from mmc ...; " \ 180 "source ${loadaddr}\0" \ 181 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \ 182 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \ 183 "mmcboot=echo Booting from mmc ...; " \ 184 "run mmcargs; " \ 185 "bootz ${loadaddr} - ${fdtaddr}\0" \ 186 "nandboot=echo Booting from nand ...; " \ 187 "run nandargs; " \ 188 "nand read ${loadaddr} 2a0000 800000; " \ 189 "nand read ${fdtaddr} aa0000 80000; " \ 190 "bootm ${loadaddr} - ${fdtaddr}\0" \ 191 192 #define CONFIG_BOOTCOMMAND \ 193 "mmc dev ${mmcdev}; if mmc rescan; then " \ 194 "echo SD/MMC found on device $mmcdev; " \ 195 "if run loadbootenv; then " \ 196 "run importbootenv; " \ 197 "fi; " \ 198 "echo Checking if uenvcmd is set ...; " \ 199 "if test -n $uenvcmd; then " \ 200 "echo Running uenvcmd ...; " \ 201 "run uenvcmd; " \ 202 "fi; " \ 203 "echo Running default loadimage ...; " \ 204 "setenv bootfile zImage; " \ 205 "if run loadimage; then " \ 206 "run loadfdt; " \ 207 "run mmcboot; " \ 208 "fi; " \ 209 "else run nandboot; fi" 210 211 /* Miscellaneous configurable options */ 212 #define CONFIG_AUTO_COMPLETE 213 #define CONFIG_CMDLINE_EDITING 214 #define CONFIG_SYS_LONGHELP 215 216 /* We set the max number of command args high to avoid HUSH bugs. */ 217 #define CONFIG_SYS_MAXARGS 64 218 219 /* Console I/O Buffer Size */ 220 #define CONFIG_SYS_CBSIZE 512 221 222 /* memtest works on */ 223 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 224 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 225 0x01F00000) /* 31MB */ 226 227 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 228 /* address */ 229 230 /* 231 * AM3517 has 12 GP timers, they can be driven by the system clock 232 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 233 * This rate is divided by a local divisor. 234 */ 235 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 236 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 237 238 /* Physical Memory Map */ 239 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 240 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 241 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 242 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 243 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 244 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 245 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 246 CONFIG_SYS_INIT_RAM_SIZE - \ 247 GENERATED_GBL_DATA_SIZE) 248 249 /* FLASH and environment organization */ 250 251 /* **** PISMO SUPPORT *** */ 252 #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */ 253 /* on one chip */ 254 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ 255 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 256 257 #if defined(CONFIG_NAND) 258 #define CONFIG_SYS_FLASH_BASE NAND_BASE 259 #endif 260 261 /* Monitor at start of flash */ 262 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 263 264 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 265 #define CONFIG_ENV_SIZE CONFIG_SYS_ENV_SECT_SIZE 266 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 267 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 268 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 269 270 /* Defines for SPL */ 271 #define CONFIG_SPL_FRAMEWORK 272 #define CONFIG_SPL_NAND_SIMPLE 273 #define CONFIG_SPL_TEXT_BASE 0x40200000 274 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 275 CONFIG_SPL_TEXT_BASE) 276 277 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 278 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 279 280 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 281 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 282 283 #define CONFIG_SPL_NAND_BASE 284 #define CONFIG_SPL_NAND_DRIVERS 285 #define CONFIG_SPL_NAND_ECC 286 287 #endif /* __CONFIG_H */ 288