1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6 #ifndef _RK618_H_ 7 #define _RK618_H_ 8 9 #include <clk.h> 10 #include <dm/device.h> 11 #include <power/regulator.h> 12 #include <asm/gpio.h> 13 14 #define UPDATE(v, h, l) (((v) << (l)) & GENMASK((h), (l))) 15 #define HIWORD_UPDATE(v, h, l) (((v) << (l)) | (GENMASK(h, l) << 16)) 16 17 #define RK618_FRC_REG 0x0054 18 #define FRC_DEN_INV HIWORD_UPDATE(1, 6, 6) 19 #define FRC_SYNC_INV HIWORD_UPDATE(1, 5, 5) 20 #define FRC_DCLK_INV HIWORD_UPDATE(1, 4, 4) 21 #define FRC_OUT_ZERO HIWORD_UPDATE(1, 3, 3) 22 #define FRC_OUT_MODE_RGB666 HIWORD_UPDATE(1, 2, 2) 23 #define FRC_OUT_MODE_RGB888 HIWORD_UPDATE(0, 2, 2) 24 #define FRC_DITHER_MODE_HI_FRC HIWORD_UPDATE(1, 1, 1) 25 #define FRC_DITHER_MODE_FRC HIWORD_UPDATE(0, 1, 1) 26 #define FRC_DITHER_ENABLE HIWORD_UPDATE(1, 0, 0) 27 #define FRC_DITHER_DISABLE HIWORD_UPDATE(0, 0, 0) 28 #define RK618_LVDS_CON 0x0084 29 #define LVDS_CON_START_PHASE(x) HIWORD_UPDATE(x, 14, 14) 30 #define LVDS_DCLK_INV HIWORD_UPDATE(1, 13, 13) 31 #define LVDS_CON_CHADS_10PF HIWORD_UPDATE(3, 12, 11) 32 #define LVDS_CON_CHADS_5PF HIWORD_UPDATE(2, 12, 11) 33 #define LVDS_CON_CHADS_7PF HIWORD_UPDATE(1, 12, 11) 34 #define LVDS_CON_CHADS_3PF HIWORD_UPDATE(0, 12, 11) 35 #define LVDS_CON_CHA1TTL_ENABLE HIWORD_UPDATE(1, 10, 10) 36 #define LVDS_CON_CHA1TTL_DISABLE HIWORD_UPDATE(0, 10, 10) 37 #define LVDS_CON_CHA0TTL_ENABLE HIWORD_UPDATE(1, 9, 9) 38 #define LVDS_CON_CHA0TTL_DISABLE HIWORD_UPDATE(0, 9, 9) 39 #define LVDS_CON_CHA1_POWER_UP HIWORD_UPDATE(1, 8, 8) 40 #define LVDS_CON_CHA1_POWER_DOWN HIWORD_UPDATE(0, 8, 8) 41 #define LVDS_CON_CHA0_POWER_UP HIWORD_UPDATE(1, 7, 7) 42 #define LVDS_CON_CHA0_POWER_DOWN HIWORD_UPDATE(0, 7, 7) 43 #define LVDS_CON_CBG_POWER_UP HIWORD_UPDATE(1, 6, 6) 44 #define LVDS_CON_CBG_POWER_DOWN HIWORD_UPDATE(0, 6, 6) 45 #define LVDS_CON_PLL_POWER_DOWN HIWORD_UPDATE(1, 5, 5) 46 #define LVDS_CON_PLL_POWER_UP HIWORD_UPDATE(0, 5, 5) 47 #define LVDS_CON_START_SEL_EVEN_PIXEL HIWORD_UPDATE(1, 4, 4) 48 #define LVDS_CON_START_SEL_ODD_PIXEL HIWORD_UPDATE(0, 4, 4) 49 #define LVDS_CON_CHASEL_DOUBLE_CHANNEL HIWORD_UPDATE(1, 3, 3) 50 #define LVDS_CON_CHASEL_SINGLE_CHANNEL HIWORD_UPDATE(0, 3, 3) 51 #define LVDS_CON_MSBSEL_D7 HIWORD_UPDATE(1, 2, 2) 52 #define LVDS_CON_MSBSEL_D0 HIWORD_UPDATE(0, 2, 2) 53 #define LVDS_CON_SELECT(x) HIWORD_UPDATE(x, 1, 0) 54 #define LVDS_CON_SELECT_6BIT_MODE HIWORD_UPDATE(3, 1, 0) 55 #define LVDS_CON_SELECT_8BIT_MODE_3 HIWORD_UPDATE(2, 1, 0) 56 #define LVDS_CON_SELECT_8BIT_MODE_2 HIWORD_UPDATE(1, 1, 0) 57 #define LVDS_CON_SELECT_8BIT_MODE_1 HIWORD_UPDATE(0, 1, 0) 58 59 struct rk618 { 60 struct udevice *dev; 61 struct udevice *power_supply; 62 struct gpio_desc enable_gpio; 63 struct gpio_desc reset_gpio; 64 struct clk clkin; 65 }; 66 67 int rk618_i2c_write(struct rk618 *rk618, u16 reg, u32 val); 68 int rk618_i2c_read(struct rk618 *rk618, u16 reg, u32 *val); 69 void rk618_frc_dither_disable(struct rk618 *rk618); 70 void rk618_frc_dither_enable(struct rk618 *rk618); 71 void rk618_frc_dclk_invert(struct rk618 *rk618); 72 73 #endif 74