1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2022 Rockchip Electronics Co., Ltd
4 */
5
6 #include <common.h>
7 #include <dm.h>
8 #include <dm/pinctrl.h>
9 #include <errno.h>
10 #include <i2c.h>
11 #include <max96745.h>
12
13 struct function_desc {
14 const char *name;
15 const char **group_names;
16 int num_group_names;
17
18 u8 gpio_out_dis:1;
19 u8 gpio_io_rx_en:1;
20 u8 gpio_tx_en_a:1;
21 u8 gpio_tx_en_b:1;
22 u8 gpio_rx_en_a:1;
23 u8 gpio_rx_en_b:1;
24 u8 gpio_tx_id;
25 u8 gpio_rx_id;
26 };
27
28 struct group_desc {
29 const char *name;
30 int *pins;
31 int num_pins;
32 void *data;
33 };
34
35 struct pin_desc {
36 unsigned number;
37 const char *name;
38 };
39
40 static const struct pin_desc max96745_pins[] = {
41 {0, "gpio0"},
42 {1, "gpio1"},
43 {2, "gpio2"},
44 {3, "gpio3"},
45 {4, "gpio4"},
46 {5, "gpio5"},
47 {6, "gpio6"},
48 {7, "gpio7"},
49 {8, "gpio8"},
50 {9, "gpio9"},
51 {10, "gpio10"},
52 {11, "gpio11"},
53 {12, "gpio12"},
54 {13, "gpio13"},
55 {14, "gpio14"},
56 {15, "gpio15"},
57 {16, "gpio16"},
58 {17, "gpio17"},
59 {18, "gpio18"},
60 {19, "gpio19"},
61 {20, "gpio20"},
62 {21, "gpio21"},
63 {22, "gpio22"},
64 {23, "gpio23"},
65 {24, "gpio24"},
66 {25, "gpio25"},
67 };
68
69 static int gpio0_pins[] = {0};
70 static int gpio1_pins[] = {1};
71 static int gpio2_pins[] = {2};
72 static int gpio3_pins[] = {3};
73 static int gpio4_pins[] = {4};
74 static int gpio5_pins[] = {5};
75 static int gpio6_pins[] = {6};
76 static int gpio7_pins[] = {7};
77 static int gpio8_pins[] = {8};
78 static int gpio9_pins[] = {9};
79 static int gpio10_pins[] = {10};
80 static int gpio11_pins[] = {11};
81 static int gpio12_pins[] = {12};
82 static int gpio13_pins[] = {13};
83 static int gpio14_pins[] = {14};
84 static int gpio15_pins[] = {15};
85 static int gpio16_pins[] = {16};
86 static int gpio17_pins[] = {17};
87 static int gpio18_pins[] = {18};
88 static int gpio19_pins[] = {19};
89 static int gpio20_pins[] = {20};
90 static int gpio21_pins[] = {21};
91 static int gpio22_pins[] = {22};
92 static int gpio23_pins[] = {23};
93 static int gpio24_pins[] = {24};
94 static int gpio25_pins[] = {25};
95
96 #define GROUP_DESC(nm) \
97 { \
98 .name = #nm, \
99 .pins = nm ## _pins, \
100 .num_pins = ARRAY_SIZE(nm ## _pins), \
101 }
102
103 static const struct group_desc max96745_groups[] = {
104 GROUP_DESC(gpio0),
105 GROUP_DESC(gpio1),
106 GROUP_DESC(gpio2),
107 GROUP_DESC(gpio3),
108 GROUP_DESC(gpio4),
109 GROUP_DESC(gpio5),
110 GROUP_DESC(gpio6),
111 GROUP_DESC(gpio7),
112 GROUP_DESC(gpio8),
113 GROUP_DESC(gpio9),
114 GROUP_DESC(gpio10),
115 GROUP_DESC(gpio11),
116 GROUP_DESC(gpio12),
117 GROUP_DESC(gpio13),
118 GROUP_DESC(gpio14),
119 GROUP_DESC(gpio15),
120 GROUP_DESC(gpio16),
121 GROUP_DESC(gpio17),
122 GROUP_DESC(gpio18),
123 GROUP_DESC(gpio19),
124 GROUP_DESC(gpio20),
125 GROUP_DESC(gpio21),
126 GROUP_DESC(gpio22),
127 GROUP_DESC(gpio23),
128 GROUP_DESC(gpio24),
129 GROUP_DESC(gpio25),
130 };
131
132 static const char *gpio_groups[] = {
133 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4",
134 "gpio5", "gpio6", "gpio7", "gpio8", "gpio9",
135 "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
136 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19",
137 "gpio20", "gpio21", "gpio22", "gpio23", "gpio24",
138 "gpio25",
139 };
140
141 #define FUNCTION_DESC_GPIO_TX_A(id) \
142 { \
143 .name = "GPIO_TX_A_"#id, \
144 .group_names = gpio_groups, \
145 .num_group_names = ARRAY_SIZE(gpio_groups), \
146 .gpio_out_dis = 1, \
147 .gpio_tx_en_a = 1, \
148 .gpio_io_rx_en = 1, \
149 .gpio_tx_id = id, \
150 } \
151
152 #define FUNCTION_DESC_GPIO_TX_B(id) \
153 { \
154 .name = "GPIO_TX_B_"#id, \
155 .group_names = gpio_groups, \
156 .num_group_names = ARRAY_SIZE(gpio_groups), \
157 .gpio_out_dis = 1, \
158 .gpio_tx_en_b = 1, \
159 .gpio_io_rx_en = 1, \
160 .gpio_tx_id = id, \
161 } \
162
163 #define FUNCTION_DESC_GPIO_RX_A(id) \
164 { \
165 .name = "GPIO_RX_A_"#id, \
166 .group_names = gpio_groups, \
167 .num_group_names = ARRAY_SIZE(gpio_groups), \
168 .gpio_rx_en_a = 1, \
169 .gpio_rx_id = id, \
170 } \
171
172 #define FUNCTION_DESC_GPIO_RX_B(id) \
173 { \
174 .name = "GPIO_RX_B_"#id, \
175 .group_names = gpio_groups, \
176 .num_group_names = ARRAY_SIZE(gpio_groups), \
177 .gpio_rx_en_b = 1, \
178 .gpio_rx_id = id, \
179 } \
180
181 #define FUNCTION_DESC_GPIO() \
182 { \
183 .name = "GPIO", \
184 .group_names = gpio_groups, \
185 .num_group_names = ARRAY_SIZE(gpio_groups), \
186 } \
187
188 static const struct function_desc max96745_functions[] = {
189 FUNCTION_DESC_GPIO_TX_A(0),
190 FUNCTION_DESC_GPIO_TX_A(1),
191 FUNCTION_DESC_GPIO_TX_A(2),
192 FUNCTION_DESC_GPIO_TX_A(3),
193 FUNCTION_DESC_GPIO_TX_A(4),
194 FUNCTION_DESC_GPIO_TX_A(5),
195 FUNCTION_DESC_GPIO_TX_A(6),
196 FUNCTION_DESC_GPIO_TX_A(7),
197 FUNCTION_DESC_GPIO_TX_A(8),
198 FUNCTION_DESC_GPIO_TX_A(9),
199 FUNCTION_DESC_GPIO_TX_A(10),
200 FUNCTION_DESC_GPIO_TX_A(11),
201 FUNCTION_DESC_GPIO_TX_A(12),
202 FUNCTION_DESC_GPIO_TX_A(13),
203 FUNCTION_DESC_GPIO_TX_A(14),
204 FUNCTION_DESC_GPIO_TX_A(15),
205 FUNCTION_DESC_GPIO_TX_A(16),
206 FUNCTION_DESC_GPIO_TX_A(17),
207 FUNCTION_DESC_GPIO_TX_A(18),
208 FUNCTION_DESC_GPIO_TX_A(19),
209 FUNCTION_DESC_GPIO_TX_A(20),
210 FUNCTION_DESC_GPIO_TX_A(21),
211 FUNCTION_DESC_GPIO_TX_A(22),
212 FUNCTION_DESC_GPIO_TX_A(23),
213 FUNCTION_DESC_GPIO_TX_A(24),
214 FUNCTION_DESC_GPIO_TX_A(25),
215 FUNCTION_DESC_GPIO_TX_A(26),
216 FUNCTION_DESC_GPIO_TX_A(27),
217 FUNCTION_DESC_GPIO_TX_A(28),
218 FUNCTION_DESC_GPIO_TX_A(29),
219 FUNCTION_DESC_GPIO_TX_A(30),
220 FUNCTION_DESC_GPIO_TX_A(31),
221 FUNCTION_DESC_GPIO_TX_B(0),
222 FUNCTION_DESC_GPIO_TX_B(1),
223 FUNCTION_DESC_GPIO_TX_B(2),
224 FUNCTION_DESC_GPIO_TX_B(3),
225 FUNCTION_DESC_GPIO_TX_B(4),
226 FUNCTION_DESC_GPIO_TX_B(5),
227 FUNCTION_DESC_GPIO_TX_B(6),
228 FUNCTION_DESC_GPIO_TX_B(7),
229 FUNCTION_DESC_GPIO_TX_B(8),
230 FUNCTION_DESC_GPIO_TX_B(9),
231 FUNCTION_DESC_GPIO_TX_B(10),
232 FUNCTION_DESC_GPIO_TX_B(11),
233 FUNCTION_DESC_GPIO_TX_B(12),
234 FUNCTION_DESC_GPIO_TX_B(13),
235 FUNCTION_DESC_GPIO_TX_B(14),
236 FUNCTION_DESC_GPIO_TX_B(15),
237 FUNCTION_DESC_GPIO_TX_B(16),
238 FUNCTION_DESC_GPIO_TX_B(17),
239 FUNCTION_DESC_GPIO_TX_B(18),
240 FUNCTION_DESC_GPIO_TX_B(19),
241 FUNCTION_DESC_GPIO_TX_B(20),
242 FUNCTION_DESC_GPIO_TX_B(21),
243 FUNCTION_DESC_GPIO_TX_B(22),
244 FUNCTION_DESC_GPIO_TX_B(23),
245 FUNCTION_DESC_GPIO_TX_B(24),
246 FUNCTION_DESC_GPIO_TX_B(25),
247 FUNCTION_DESC_GPIO_TX_B(26),
248 FUNCTION_DESC_GPIO_TX_B(27),
249 FUNCTION_DESC_GPIO_TX_B(28),
250 FUNCTION_DESC_GPIO_TX_B(29),
251 FUNCTION_DESC_GPIO_TX_B(30),
252 FUNCTION_DESC_GPIO_TX_B(31),
253 FUNCTION_DESC_GPIO_RX_A(0),
254 FUNCTION_DESC_GPIO_RX_A(1),
255 FUNCTION_DESC_GPIO_RX_A(2),
256 FUNCTION_DESC_GPIO_RX_A(3),
257 FUNCTION_DESC_GPIO_RX_A(4),
258 FUNCTION_DESC_GPIO_RX_A(5),
259 FUNCTION_DESC_GPIO_RX_A(6),
260 FUNCTION_DESC_GPIO_RX_A(7),
261 FUNCTION_DESC_GPIO_RX_A(8),
262 FUNCTION_DESC_GPIO_RX_A(9),
263 FUNCTION_DESC_GPIO_RX_A(10),
264 FUNCTION_DESC_GPIO_RX_A(11),
265 FUNCTION_DESC_GPIO_RX_A(12),
266 FUNCTION_DESC_GPIO_RX_A(13),
267 FUNCTION_DESC_GPIO_RX_A(14),
268 FUNCTION_DESC_GPIO_RX_A(15),
269 FUNCTION_DESC_GPIO_RX_A(16),
270 FUNCTION_DESC_GPIO_RX_A(17),
271 FUNCTION_DESC_GPIO_RX_A(18),
272 FUNCTION_DESC_GPIO_RX_A(19),
273 FUNCTION_DESC_GPIO_RX_A(20),
274 FUNCTION_DESC_GPIO_RX_A(21),
275 FUNCTION_DESC_GPIO_RX_A(22),
276 FUNCTION_DESC_GPIO_RX_A(23),
277 FUNCTION_DESC_GPIO_RX_A(24),
278 FUNCTION_DESC_GPIO_RX_A(25),
279 FUNCTION_DESC_GPIO_RX_A(26),
280 FUNCTION_DESC_GPIO_RX_A(27),
281 FUNCTION_DESC_GPIO_RX_A(28),
282 FUNCTION_DESC_GPIO_RX_A(29),
283 FUNCTION_DESC_GPIO_RX_A(30),
284 FUNCTION_DESC_GPIO_RX_A(31),
285 FUNCTION_DESC_GPIO_RX_B(0),
286 FUNCTION_DESC_GPIO_RX_B(1),
287 FUNCTION_DESC_GPIO_RX_B(2),
288 FUNCTION_DESC_GPIO_RX_B(3),
289 FUNCTION_DESC_GPIO_RX_B(4),
290 FUNCTION_DESC_GPIO_RX_B(5),
291 FUNCTION_DESC_GPIO_RX_B(6),
292 FUNCTION_DESC_GPIO_RX_B(7),
293 FUNCTION_DESC_GPIO_RX_B(8),
294 FUNCTION_DESC_GPIO_RX_B(9),
295 FUNCTION_DESC_GPIO_RX_B(10),
296 FUNCTION_DESC_GPIO_RX_B(11),
297 FUNCTION_DESC_GPIO_RX_B(12),
298 FUNCTION_DESC_GPIO_RX_B(13),
299 FUNCTION_DESC_GPIO_RX_B(14),
300 FUNCTION_DESC_GPIO_RX_B(15),
301 FUNCTION_DESC_GPIO_RX_B(16),
302 FUNCTION_DESC_GPIO_RX_B(17),
303 FUNCTION_DESC_GPIO_RX_B(18),
304 FUNCTION_DESC_GPIO_RX_B(19),
305 FUNCTION_DESC_GPIO_RX_B(20),
306 FUNCTION_DESC_GPIO_RX_B(21),
307 FUNCTION_DESC_GPIO_RX_B(22),
308 FUNCTION_DESC_GPIO_RX_B(23),
309 FUNCTION_DESC_GPIO_RX_B(24),
310 FUNCTION_DESC_GPIO_RX_B(25),
311 FUNCTION_DESC_GPIO_RX_B(26),
312 FUNCTION_DESC_GPIO_RX_B(27),
313 FUNCTION_DESC_GPIO_RX_B(28),
314 FUNCTION_DESC_GPIO_RX_B(29),
315 FUNCTION_DESC_GPIO_RX_B(30),
316 FUNCTION_DESC_GPIO_RX_B(31),
317 FUNCTION_DESC_GPIO(),
318 };
319
max96745_get_pins_count(struct udevice * dev)320 static int max96745_get_pins_count(struct udevice *dev)
321 {
322 return ARRAY_SIZE(max96745_pins);
323 }
324
max96745_get_pin_name(struct udevice * dev,unsigned selector)325 static const char *max96745_get_pin_name(struct udevice *dev, unsigned selector)
326 {
327 return max96745_pins[selector].name;
328 }
329
max96745_pinctrl_get_groups_count(struct udevice * dev)330 static int max96745_pinctrl_get_groups_count(struct udevice *dev)
331 {
332 return ARRAY_SIZE(max96745_groups);
333 }
334
max96745_pinctrl_get_group_name(struct udevice * dev,unsigned selector)335 static const char *max96745_pinctrl_get_group_name(struct udevice *dev,
336 unsigned selector)
337 {
338 return max96745_groups[selector].name;
339 }
340
max96745_pinctrl_get_functions_count(struct udevice * dev)341 static int max96745_pinctrl_get_functions_count(struct udevice *dev)
342 {
343 return ARRAY_SIZE(max96745_functions);
344 }
345
max96745_pinctrl_get_function_name(struct udevice * dev,unsigned selector)346 static const char *max96745_pinctrl_get_function_name(struct udevice *dev,
347 unsigned selector)
348 {
349 return max96745_functions[selector].name;
350 }
351
max96745_pinmux_set(struct udevice * dev,unsigned group_selector,unsigned func_selector)352 static int max96745_pinmux_set(struct udevice *dev, unsigned group_selector,
353 unsigned func_selector)
354 {
355 const struct group_desc *grp = &max96745_groups[group_selector];
356 const struct function_desc *func = &max96745_functions[func_selector];
357 int i;
358
359 for (i = 0; i < grp->num_pins; i++) {
360 dm_i2c_reg_clrset(dev->parent, GPIO_A_REG(grp->pins[i]),
361 GPIO_OUT_DIS,
362 FIELD_PREP(GPIO_OUT_DIS, func->gpio_out_dis));
363
364 if (func->gpio_tx_en_a || func->gpio_tx_en_b)
365 dm_i2c_reg_clrset(dev->parent, GPIO_B_REG(grp->pins[i]),
366 GPIO_TX_ID,
367 FIELD_PREP(GPIO_TX_ID, func->gpio_tx_id));
368
369 if (func->gpio_rx_en_a || func->gpio_rx_en_b)
370 dm_i2c_reg_clrset(dev->parent, GPIO_C_REG(grp->pins[i]),
371 GPIO_RX_ID,
372 FIELD_PREP(GPIO_RX_ID, func->gpio_rx_id));
373
374 dm_i2c_reg_clrset(dev->parent, GPIO_D_REG(grp->pins[i]),
375 GPIO_TX_EN_A | GPIO_TX_EN_B | GPIO_IO_RX_EN |
376 GPIO_RX_EN_A | GPIO_RX_EN_B,
377 FIELD_PREP(GPIO_TX_EN_A, func->gpio_tx_en_a) |
378 FIELD_PREP(GPIO_TX_EN_B, func->gpio_tx_en_b) |
379 FIELD_PREP(GPIO_RX_EN_A, func->gpio_rx_en_a) |
380 FIELD_PREP(GPIO_RX_EN_B, func->gpio_rx_en_b) |
381 FIELD_PREP(GPIO_IO_RX_EN, func->gpio_io_rx_en));
382 }
383
384 return 0;
385 }
386
387 static struct pinctrl_ops max96745_pinctrl_ops = {
388 .get_pins_count = max96745_get_pins_count,
389 .get_pin_name = max96745_get_pin_name,
390 .get_groups_count = max96745_pinctrl_get_groups_count,
391 .get_group_name = max96745_pinctrl_get_group_name,
392 .get_functions_count = max96745_pinctrl_get_functions_count,
393 .get_function_name = max96745_pinctrl_get_function_name,
394 .set_state = pinctrl_generic_set_state,
395 .pinmux_set = max96745_pinmux_set,
396 .pinmux_group_set = max96745_pinmux_set,
397 };
398
399 static const struct udevice_id max96745_pinctrl_of_match[] = {
400 { .compatible = "maxim,max96745-pinctrl" },
401 { }
402 };
403
404 U_BOOT_DRIVER(max96745_pinctrl) = {
405 .name = "pinctrl-max96745",
406 .id = UCLASS_PINCTRL,
407 .of_match = max96745_pinctrl_of_match,
408 .ops = &max96745_pinctrl_ops,
409 };
410