1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun #include <common.h>
6*4882a593Smuzhiyun #include <adc.h>
7*4882a593Smuzhiyun #include <config.h>
8*4882a593Smuzhiyun #include <clk.h>
9*4882a593Smuzhiyun #include <dm.h>
10*4882a593Smuzhiyun #include <g_dnl.h>
11*4882a593Smuzhiyun #include <generic-phy.h>
12*4882a593Smuzhiyun #include <i2c.h>
13*4882a593Smuzhiyun #include <led.h>
14*4882a593Smuzhiyun #include <misc.h>
15*4882a593Smuzhiyun #include <mtd.h>
16*4882a593Smuzhiyun #include <mtd_node.h>
17*4882a593Smuzhiyun #include <netdev.h>
18*4882a593Smuzhiyun #include <phy.h>
19*4882a593Smuzhiyun #include <reset.h>
20*4882a593Smuzhiyun #include <syscon.h>
21*4882a593Smuzhiyun #include <usb.h>
22*4882a593Smuzhiyun #include <asm/io.h>
23*4882a593Smuzhiyun #include <asm/gpio.h>
24*4882a593Smuzhiyun #include <asm/arch/stm32.h>
25*4882a593Smuzhiyun #include <power/regulator.h>
26*4882a593Smuzhiyun #include <usb/dwc2_udc.h>
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /* SYSCFG registers */
29*4882a593Smuzhiyun #define SYSCFG_BOOTR 0x00
30*4882a593Smuzhiyun #define SYSCFG_PMCSETR 0x04
31*4882a593Smuzhiyun #define SYSCFG_IOCTRLSETR 0x18
32*4882a593Smuzhiyun #define SYSCFG_ICNR 0x1C
33*4882a593Smuzhiyun #define SYSCFG_CMPCR 0x20
34*4882a593Smuzhiyun #define SYSCFG_CMPENSETR 0x24
35*4882a593Smuzhiyun #define SYSCFG_PMCCLRR 0x44
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
38*4882a593Smuzhiyun #define SYSCFG_BOOTR_BOOTPD_SHIFT 4
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
41*4882a593Smuzhiyun #define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
42*4882a593Smuzhiyun #define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
43*4882a593Smuzhiyun #define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
44*4882a593Smuzhiyun #define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #define SYSCFG_CMPCR_SW_CTRL BIT(1)
47*4882a593Smuzhiyun #define SYSCFG_CMPCR_READY BIT(8)
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define SYSCFG_CMPENSETR_MPU_EN BIT(0)
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
52*4882a593Smuzhiyun #define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun #define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
57*4882a593Smuzhiyun #define SYSCFG_PMCSETR_ETH_SEL_GMII_MII (0 << 21)
58*4882a593Smuzhiyun #define SYSCFG_PMCSETR_ETH_SEL_RGMII (1 << 21)
59*4882a593Smuzhiyun #define SYSCFG_PMCSETR_ETH_SEL_RMII (4 << 21)
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /*
62*4882a593Smuzhiyun * Get a global data pointer
63*4882a593Smuzhiyun */
64*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #define USB_WARNING_LOW_THRESHOLD_UV 660000
67*4882a593Smuzhiyun #define USB_START_LOW_THRESHOLD_UV 1230000
68*4882a593Smuzhiyun #define USB_START_HIGH_THRESHOLD_UV 2100000
69*4882a593Smuzhiyun
checkboard(void)70*4882a593Smuzhiyun int checkboard(void)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun int ret;
73*4882a593Smuzhiyun char *mode;
74*4882a593Smuzhiyun u32 otp;
75*4882a593Smuzhiyun struct udevice *dev;
76*4882a593Smuzhiyun const char *fdt_compat;
77*4882a593Smuzhiyun int fdt_compat_len;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_STM32MP1_TRUSTED))
80*4882a593Smuzhiyun mode = "trusted";
81*4882a593Smuzhiyun else
82*4882a593Smuzhiyun mode = "basic";
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun printf("Board: stm32mp1 in %s mode", mode);
85*4882a593Smuzhiyun fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
86*4882a593Smuzhiyun &fdt_compat_len);
87*4882a593Smuzhiyun if (fdt_compat && fdt_compat_len)
88*4882a593Smuzhiyun printf(" (%s)", fdt_compat);
89*4882a593Smuzhiyun puts("\n");
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun ret = uclass_get_device_by_driver(UCLASS_MISC,
92*4882a593Smuzhiyun DM_GET_DRIVER(stm32mp_bsec),
93*4882a593Smuzhiyun &dev);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun if (!ret)
96*4882a593Smuzhiyun ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
97*4882a593Smuzhiyun &otp, sizeof(otp));
98*4882a593Smuzhiyun if (!ret && otp) {
99*4882a593Smuzhiyun printf("Board: MB%04x Var%d Rev.%c-%02d\n",
100*4882a593Smuzhiyun otp >> 16,
101*4882a593Smuzhiyun (otp >> 12) & 0xF,
102*4882a593Smuzhiyun ((otp >> 8) & 0xF) - 1 + 'A',
103*4882a593Smuzhiyun otp & 0xF);
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun return 0;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
board_key_check(void)109*4882a593Smuzhiyun static void board_key_check(void)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun #if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
112*4882a593Smuzhiyun ofnode node;
113*4882a593Smuzhiyun struct gpio_desc gpio;
114*4882a593Smuzhiyun enum forced_boot_mode boot_mode = BOOT_NORMAL;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun node = ofnode_path("/config");
117*4882a593Smuzhiyun if (!ofnode_valid(node)) {
118*4882a593Smuzhiyun debug("%s: no /config node?\n", __func__);
119*4882a593Smuzhiyun return;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun #ifdef CONFIG_FASTBOOT
122*4882a593Smuzhiyun if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
123*4882a593Smuzhiyun &gpio, GPIOD_IS_IN)) {
124*4882a593Smuzhiyun debug("%s: could not find a /config/st,fastboot-gpios\n",
125*4882a593Smuzhiyun __func__);
126*4882a593Smuzhiyun } else {
127*4882a593Smuzhiyun if (dm_gpio_get_value(&gpio)) {
128*4882a593Smuzhiyun puts("Fastboot key pressed, ");
129*4882a593Smuzhiyun boot_mode = BOOT_FASTBOOT;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun dm_gpio_free(NULL, &gpio);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun #endif
135*4882a593Smuzhiyun #ifdef CONFIG_CMD_STM32PROG
136*4882a593Smuzhiyun if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
137*4882a593Smuzhiyun &gpio, GPIOD_IS_IN)) {
138*4882a593Smuzhiyun debug("%s: could not find a /config/st,stm32prog-gpios\n",
139*4882a593Smuzhiyun __func__);
140*4882a593Smuzhiyun } else {
141*4882a593Smuzhiyun if (dm_gpio_get_value(&gpio)) {
142*4882a593Smuzhiyun puts("STM32Programmer key pressed, ");
143*4882a593Smuzhiyun boot_mode = BOOT_STM32PROG;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun dm_gpio_free(NULL, &gpio);
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun #endif
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun if (boot_mode != BOOT_NORMAL) {
150*4882a593Smuzhiyun puts("entering download mode...\n");
151*4882a593Smuzhiyun clrsetbits_le32(TAMP_BOOT_CONTEXT,
152*4882a593Smuzhiyun TAMP_BOOT_FORCED_MASK,
153*4882a593Smuzhiyun boot_mode);
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun #endif
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun /* STMicroelectronics STUSB1600 Type-C controller */
161*4882a593Smuzhiyun #define STUSB1600_CC_CONNECTION_STATUS 0x0E
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun /* STUSB1600_CC_CONNECTION_STATUS bitfields */
164*4882a593Smuzhiyun #define STUSB1600_CC_ATTACH BIT(0)
165*4882a593Smuzhiyun
stusb1600_init(struct udevice ** dev_stusb1600)166*4882a593Smuzhiyun static int stusb1600_init(struct udevice **dev_stusb1600)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun ofnode node;
169*4882a593Smuzhiyun struct udevice *dev, *bus;
170*4882a593Smuzhiyun int ret;
171*4882a593Smuzhiyun u32 chip_addr;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun *dev_stusb1600 = NULL;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun /* if node stusb1600 is present, means DK1 or DK2 board */
176*4882a593Smuzhiyun node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
177*4882a593Smuzhiyun if (!ofnode_valid(node))
178*4882a593Smuzhiyun return -ENODEV;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun ret = ofnode_read_u32(node, "reg", &chip_addr);
181*4882a593Smuzhiyun if (ret)
182*4882a593Smuzhiyun return -EINVAL;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
185*4882a593Smuzhiyun &bus);
186*4882a593Smuzhiyun if (ret) {
187*4882a593Smuzhiyun printf("bus for stusb1600 not found\n");
188*4882a593Smuzhiyun return -ENODEV;
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
192*4882a593Smuzhiyun if (!ret)
193*4882a593Smuzhiyun *dev_stusb1600 = dev;
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun return ret;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
stusb1600_cable_connected(struct udevice * dev)198*4882a593Smuzhiyun static int stusb1600_cable_connected(struct udevice *dev)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun u8 status;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
203*4882a593Smuzhiyun return 0;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun return status & STUSB1600_CC_ATTACH;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun #include <usb/dwc2_udc.h>
g_dnl_board_usb_cable_connected(void)209*4882a593Smuzhiyun int g_dnl_board_usb_cable_connected(void)
210*4882a593Smuzhiyun {
211*4882a593Smuzhiyun struct udevice *stusb1600;
212*4882a593Smuzhiyun struct udevice *dwc2_udc_otg;
213*4882a593Smuzhiyun int ret;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun if (!stusb1600_init(&stusb1600))
216*4882a593Smuzhiyun return stusb1600_cable_connected(stusb1600);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
219*4882a593Smuzhiyun DM_GET_DRIVER(dwc2_udc_otg),
220*4882a593Smuzhiyun &dwc2_udc_otg);
221*4882a593Smuzhiyun if (!ret)
222*4882a593Smuzhiyun debug("dwc2_udc_otg init failed\n");
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun return dwc2_udc_B_session_valid(dwc2_udc_otg);
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun #endif /* CONFIG_USB_GADGET */
227*4882a593Smuzhiyun
get_led(struct udevice ** dev,char * led_string)228*4882a593Smuzhiyun static int get_led(struct udevice **dev, char *led_string)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun char *led_name;
231*4882a593Smuzhiyun int ret;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
234*4882a593Smuzhiyun if (!led_name) {
235*4882a593Smuzhiyun pr_debug("%s: could not find %s config string\n",
236*4882a593Smuzhiyun __func__, led_string);
237*4882a593Smuzhiyun return -ENOENT;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun ret = led_get_by_label(led_name, dev);
240*4882a593Smuzhiyun if (ret) {
241*4882a593Smuzhiyun debug("%s: get=%d\n", __func__, ret);
242*4882a593Smuzhiyun return ret;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun return 0;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
setup_led(enum led_state_t cmd)248*4882a593Smuzhiyun static int setup_led(enum led_state_t cmd)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun struct udevice *dev;
251*4882a593Smuzhiyun int ret;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun ret = get_led(&dev, "u-boot,boot-led");
254*4882a593Smuzhiyun if (ret)
255*4882a593Smuzhiyun return ret;
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun ret = led_set_state(dev, cmd);
258*4882a593Smuzhiyun return ret;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
board_check_usb_power(void)261*4882a593Smuzhiyun static int board_check_usb_power(void)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun struct ofnode_phandle_args adc_args;
264*4882a593Smuzhiyun struct udevice *adc;
265*4882a593Smuzhiyun struct udevice *led;
266*4882a593Smuzhiyun ofnode node;
267*4882a593Smuzhiyun unsigned int raw;
268*4882a593Smuzhiyun int max_uV = 0;
269*4882a593Smuzhiyun int ret, uV, adc_count;
270*4882a593Smuzhiyun u8 i, nb_blink;
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun node = ofnode_path("/config");
273*4882a593Smuzhiyun if (!ofnode_valid(node)) {
274*4882a593Smuzhiyun debug("%s: no /config node?\n", __func__);
275*4882a593Smuzhiyun return -ENOENT;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun /*
279*4882a593Smuzhiyun * Retrieve the ADC channels devices and get measurement
280*4882a593Smuzhiyun * for each of them
281*4882a593Smuzhiyun */
282*4882a593Smuzhiyun adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
283*4882a593Smuzhiyun "#io-channel-cells");
284*4882a593Smuzhiyun if (adc_count < 0) {
285*4882a593Smuzhiyun if (adc_count == -ENOENT)
286*4882a593Smuzhiyun return 0;
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun pr_err("%s: can't find adc channel (%d)\n", __func__,
289*4882a593Smuzhiyun adc_count);
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun return adc_count;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun for (i = 0; i < adc_count; i++) {
295*4882a593Smuzhiyun if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
296*4882a593Smuzhiyun "#io-channel-cells", 0, i,
297*4882a593Smuzhiyun &adc_args)) {
298*4882a593Smuzhiyun pr_debug("%s: can't find /config/st,adc_usb_pd\n",
299*4882a593Smuzhiyun __func__);
300*4882a593Smuzhiyun return 0;
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
304*4882a593Smuzhiyun &adc);
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun if (ret) {
307*4882a593Smuzhiyun pr_err("%s: Can't get adc device(%d)\n", __func__,
308*4882a593Smuzhiyun ret);
309*4882a593Smuzhiyun return ret;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun ret = adc_channel_single_shot(adc->name, adc_args.args[0],
313*4882a593Smuzhiyun &raw);
314*4882a593Smuzhiyun if (ret) {
315*4882a593Smuzhiyun pr_err("%s: single shot failed for %s[%d]!\n",
316*4882a593Smuzhiyun __func__, adc->name, adc_args.args[0]);
317*4882a593Smuzhiyun return ret;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun /* Convert to uV */
320*4882a593Smuzhiyun if (!adc_raw_to_uV(adc, raw, &uV)) {
321*4882a593Smuzhiyun if (uV > max_uV)
322*4882a593Smuzhiyun max_uV = uV;
323*4882a593Smuzhiyun pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
324*4882a593Smuzhiyun adc->name, adc_args.args[0], raw, uV);
325*4882a593Smuzhiyun } else {
326*4882a593Smuzhiyun pr_err("%s: Can't get uV value for %s[%d]\n",
327*4882a593Smuzhiyun __func__, adc->name, adc_args.args[0]);
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun /*
332*4882a593Smuzhiyun * If highest value is inside 1.23 Volts and 2.10 Volts, that means
333*4882a593Smuzhiyun * board is plugged on an USB-C 3A power supply and boot process can
334*4882a593Smuzhiyun * continue.
335*4882a593Smuzhiyun */
336*4882a593Smuzhiyun if (max_uV > USB_START_LOW_THRESHOLD_UV &&
337*4882a593Smuzhiyun max_uV < USB_START_HIGH_THRESHOLD_UV)
338*4882a593Smuzhiyun return 0;
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun /* Display warning message and make u-boot,error-led blinking */
341*4882a593Smuzhiyun pr_err("\n*******************************************\n");
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun if (max_uV < USB_WARNING_LOW_THRESHOLD_UV) {
344*4882a593Smuzhiyun pr_err("* WARNING 500mA power supply detected *\n");
345*4882a593Smuzhiyun nb_blink = 2;
346*4882a593Smuzhiyun } else {
347*4882a593Smuzhiyun pr_err("* WARNING 1.5A power supply detected *\n");
348*4882a593Smuzhiyun nb_blink = 3;
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun pr_err("* Current too low, use a 3A power supply! *\n");
352*4882a593Smuzhiyun pr_err("*******************************************\n\n");
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun ret = get_led(&led, "u-boot,error-led");
355*4882a593Smuzhiyun if (ret)
356*4882a593Smuzhiyun return ret;
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun for (i = 0; i < nb_blink * 2; i++) {
359*4882a593Smuzhiyun led_set_state(led, LEDST_TOGGLE);
360*4882a593Smuzhiyun mdelay(125);
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun led_set_state(led, LEDST_ON);
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun return 0;
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun
sysconf_init(void)367*4882a593Smuzhiyun static void sysconf_init(void)
368*4882a593Smuzhiyun {
369*4882a593Smuzhiyun #ifndef CONFIG_STM32MP1_TRUSTED
370*4882a593Smuzhiyun u8 *syscfg;
371*4882a593Smuzhiyun #ifdef CONFIG_DM_REGULATOR
372*4882a593Smuzhiyun struct udevice *pwr_dev;
373*4882a593Smuzhiyun struct udevice *pwr_reg;
374*4882a593Smuzhiyun struct udevice *dev;
375*4882a593Smuzhiyun int ret;
376*4882a593Smuzhiyun u32 otp = 0;
377*4882a593Smuzhiyun #endif
378*4882a593Smuzhiyun u32 bootr;
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun /* interconnect update : select master using the port 1 */
383*4882a593Smuzhiyun /* LTDC = AXI_M9 */
384*4882a593Smuzhiyun /* GPU = AXI_M8 */
385*4882a593Smuzhiyun /* today information is hardcoded in U-Boot */
386*4882a593Smuzhiyun writel(BIT(9), syscfg + SYSCFG_ICNR);
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun /* disable Pull-Down for boot pin connected to VDD */
389*4882a593Smuzhiyun bootr = readl(syscfg + SYSCFG_BOOTR);
390*4882a593Smuzhiyun bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
391*4882a593Smuzhiyun bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
392*4882a593Smuzhiyun writel(bootr, syscfg + SYSCFG_BOOTR);
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun #ifdef CONFIG_DM_REGULATOR
395*4882a593Smuzhiyun /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
396*4882a593Smuzhiyun * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
397*4882a593Smuzhiyun * The customer will have to disable this for low frequencies
398*4882a593Smuzhiyun * or if AFMUX is selected but the function not used, typically for
399*4882a593Smuzhiyun * TRACE. Otherwise, impact on power consumption.
400*4882a593Smuzhiyun *
401*4882a593Smuzhiyun * WARNING:
402*4882a593Smuzhiyun * enabling High Speed mode while VDD>2.7V
403*4882a593Smuzhiyun * with the OTP product_below_2v5 (OTP 18, BIT 13)
404*4882a593Smuzhiyun * erroneously set to 1 can damage the IC!
405*4882a593Smuzhiyun * => U-Boot set the register only if VDD < 2.7V (in DT)
406*4882a593Smuzhiyun * but this value need to be consistent with board design
407*4882a593Smuzhiyun */
408*4882a593Smuzhiyun ret = syscon_get_by_driver_data(STM32MP_SYSCON_PWR, &pwr_dev);
409*4882a593Smuzhiyun if (!ret) {
410*4882a593Smuzhiyun ret = uclass_get_device_by_driver(UCLASS_MISC,
411*4882a593Smuzhiyun DM_GET_DRIVER(stm32mp_bsec),
412*4882a593Smuzhiyun &dev);
413*4882a593Smuzhiyun if (ret) {
414*4882a593Smuzhiyun pr_err("Can't find stm32mp_bsec driver\n");
415*4882a593Smuzhiyun return;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
419*4882a593Smuzhiyun if (!ret)
420*4882a593Smuzhiyun otp = otp & BIT(13);
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun /* get VDD = pwr-supply */
423*4882a593Smuzhiyun ret = device_get_supply_regulator(pwr_dev, "pwr-supply",
424*4882a593Smuzhiyun &pwr_reg);
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun /* check if VDD is Low Voltage */
427*4882a593Smuzhiyun if (!ret) {
428*4882a593Smuzhiyun if (regulator_get_value(pwr_reg) < 2700000) {
429*4882a593Smuzhiyun writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
430*4882a593Smuzhiyun SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
431*4882a593Smuzhiyun SYSCFG_IOCTRLSETR_HSLVEN_ETH |
432*4882a593Smuzhiyun SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
433*4882a593Smuzhiyun SYSCFG_IOCTRLSETR_HSLVEN_SPI,
434*4882a593Smuzhiyun syscfg + SYSCFG_IOCTRLSETR);
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun if (!otp)
437*4882a593Smuzhiyun pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
438*4882a593Smuzhiyun } else {
439*4882a593Smuzhiyun if (otp)
440*4882a593Smuzhiyun pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
441*4882a593Smuzhiyun }
442*4882a593Smuzhiyun } else {
443*4882a593Smuzhiyun debug("VDD unknown");
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun #endif
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun /* activate automatic I/O compensation
449*4882a593Smuzhiyun * warning: need to ensure CSI enabled and ready in clock driver
450*4882a593Smuzhiyun */
451*4882a593Smuzhiyun writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
454*4882a593Smuzhiyun ;
455*4882a593Smuzhiyun clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
456*4882a593Smuzhiyun #endif
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun /* board dependent setup after realloc */
board_init(void)460*4882a593Smuzhiyun int board_init(void)
461*4882a593Smuzhiyun {
462*4882a593Smuzhiyun struct udevice *dev;
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun /* address of boot parameters */
465*4882a593Smuzhiyun gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun /* probe all PINCTRL for hog */
468*4882a593Smuzhiyun for (uclass_first_device(UCLASS_PINCTRL, &dev);
469*4882a593Smuzhiyun dev;
470*4882a593Smuzhiyun uclass_next_device(&dev)) {
471*4882a593Smuzhiyun pr_debug("probe pincontrol = %s\n", dev->name);
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun board_key_check();
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun sysconf_init();
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_LED))
479*4882a593Smuzhiyun led_default_state();
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun return 0;
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun
board_late_init(void)484*4882a593Smuzhiyun int board_late_init(void)
485*4882a593Smuzhiyun {
486*4882a593Smuzhiyun #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
487*4882a593Smuzhiyun const void *fdt_compat;
488*4882a593Smuzhiyun int fdt_compat_len;
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
491*4882a593Smuzhiyun &fdt_compat_len);
492*4882a593Smuzhiyun if (fdt_compat && fdt_compat_len) {
493*4882a593Smuzhiyun if (strncmp(fdt_compat, "st,", 3) != 0)
494*4882a593Smuzhiyun env_set("board_name", fdt_compat);
495*4882a593Smuzhiyun else
496*4882a593Smuzhiyun env_set("board_name", fdt_compat + 3);
497*4882a593Smuzhiyun }
498*4882a593Smuzhiyun #endif
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun /* for DK1/DK2 boards */
501*4882a593Smuzhiyun board_check_usb_power();
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun return 0;
504*4882a593Smuzhiyun }
505*4882a593Smuzhiyun
board_quiesce_devices(void)506*4882a593Smuzhiyun void board_quiesce_devices(void)
507*4882a593Smuzhiyun {
508*4882a593Smuzhiyun setup_led(LEDST_OFF);
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun /* eth init function : weak called in eqos driver */
board_interface_eth_init(struct udevice * dev,phy_interface_t interface_type)512*4882a593Smuzhiyun int board_interface_eth_init(struct udevice *dev,
513*4882a593Smuzhiyun phy_interface_t interface_type)
514*4882a593Smuzhiyun {
515*4882a593Smuzhiyun u8 *syscfg;
516*4882a593Smuzhiyun u32 value;
517*4882a593Smuzhiyun bool eth_clk_sel_reg = false;
518*4882a593Smuzhiyun bool eth_ref_clk_sel_reg = false;
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun /* Gigabit Ethernet 125MHz clock selection. */
521*4882a593Smuzhiyun eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun /* Ethernet 50Mhz RMII clock selection */
524*4882a593Smuzhiyun eth_ref_clk_sel_reg =
525*4882a593Smuzhiyun dev_read_bool(dev, "st,eth_ref_clk_sel");
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun if (!syscfg)
530*4882a593Smuzhiyun return -ENODEV;
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun switch (interface_type) {
533*4882a593Smuzhiyun case PHY_INTERFACE_MODE_MII:
534*4882a593Smuzhiyun value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
535*4882a593Smuzhiyun SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
536*4882a593Smuzhiyun debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
537*4882a593Smuzhiyun break;
538*4882a593Smuzhiyun case PHY_INTERFACE_MODE_GMII:
539*4882a593Smuzhiyun if (eth_clk_sel_reg)
540*4882a593Smuzhiyun value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
541*4882a593Smuzhiyun SYSCFG_PMCSETR_ETH_CLK_SEL;
542*4882a593Smuzhiyun else
543*4882a593Smuzhiyun value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
544*4882a593Smuzhiyun debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
545*4882a593Smuzhiyun break;
546*4882a593Smuzhiyun case PHY_INTERFACE_MODE_RMII:
547*4882a593Smuzhiyun if (eth_ref_clk_sel_reg)
548*4882a593Smuzhiyun value = SYSCFG_PMCSETR_ETH_SEL_RMII |
549*4882a593Smuzhiyun SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
550*4882a593Smuzhiyun else
551*4882a593Smuzhiyun value = SYSCFG_PMCSETR_ETH_SEL_RMII;
552*4882a593Smuzhiyun debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
553*4882a593Smuzhiyun break;
554*4882a593Smuzhiyun case PHY_INTERFACE_MODE_RGMII:
555*4882a593Smuzhiyun case PHY_INTERFACE_MODE_RGMII_ID:
556*4882a593Smuzhiyun case PHY_INTERFACE_MODE_RGMII_RXID:
557*4882a593Smuzhiyun case PHY_INTERFACE_MODE_RGMII_TXID:
558*4882a593Smuzhiyun if (eth_clk_sel_reg)
559*4882a593Smuzhiyun value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
560*4882a593Smuzhiyun SYSCFG_PMCSETR_ETH_CLK_SEL;
561*4882a593Smuzhiyun else
562*4882a593Smuzhiyun value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
563*4882a593Smuzhiyun debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
564*4882a593Smuzhiyun break;
565*4882a593Smuzhiyun default:
566*4882a593Smuzhiyun debug("%s: Do not manage %d interface\n",
567*4882a593Smuzhiyun __func__, interface_type);
568*4882a593Smuzhiyun /* Do not manage others interfaces */
569*4882a593Smuzhiyun return -EINVAL;
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun /* clear and set ETH configuration bits */
573*4882a593Smuzhiyun writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
574*4882a593Smuzhiyun SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
575*4882a593Smuzhiyun syscfg + SYSCFG_PMCCLRR);
576*4882a593Smuzhiyun writel(value, syscfg + SYSCFG_PMCSETR);
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun return 0;
579*4882a593Smuzhiyun }
580