1/* 2 * relocate - common relocation function for AArch64 U-Boot 3 * 4 * (C) Copyright 2013 5 * Albert ARIBAUD <albert.u.boot@aribaud.net> 6 * David Feng <fenghua@phytium.com.cn> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11#include <asm-offsets.h> 12#include <config.h> 13#include <elf.h> 14#include <linux/linkage.h> 15#include <asm/macro.h> 16 17/* 18 * void relocate_code (addr_moni) 19 * 20 * This function relocates the monitor code. 21 * x0 holds the destination address. 22 */ 23ENTRY(relocate_code) 24 stp x29, x30, [sp, #-32]! /* create a stack frame */ 25 mov x29, sp 26 str x0, [sp, #16] 27 /* 28 * Copy u-boot from flash to RAM 29 */ 30 adrp x1, __image_copy_start /* x1 <- address bits [31:12] */ 31 add x1, x1, :lo12:__image_copy_start/* x1 <- address bits [11:00] */ 32 subs x9, x0, x1 /* x9 <- Run to copy offset */ 33 b.eq relocate_done /* skip relocation */ 34 /* 35 * Don't ldr x1, __image_copy_start here, since if the code is already 36 * running at an address other than it was linked to, that instruction 37 * will load the relocated value of __image_copy_start. To 38 * correctly apply relocations, we need to know the linked value. 39 * 40 * Linked &__image_copy_start, which we know was at 41 * CONFIG_SYS_TEXT_BASE, which is stored in _TEXT_BASE, as a non- 42 * relocated value, since it isn't a symbol reference. 43 */ 44 ldr x1, _TEXT_BASE /* x1 <- Linked &__image_copy_start */ 45 subs x9, x0, x1 /* x9 <- Link to copy offset */ 46 47 adrp x1, __image_copy_start /* x1 <- address bits [31:12] */ 48 add x1, x1, :lo12:__image_copy_start/* x1 <- address bits [11:00] */ 49 adrp x2, __image_copy_end /* x2 <- address bits [31:12] */ 50 add x2, x2, :lo12:__image_copy_end /* x2 <- address bits [11:00] */ 51copy_loop: 52 ldp x10, x11, [x1], #16 /* copy from source address [x1] */ 53 stp x10, x11, [x0], #16 /* copy to target address [x0] */ 54 cmp x1, x2 /* until source end address [x2] */ 55 b.lo copy_loop 56 str x0, [sp, #24] 57 58 /* 59 * Fix .rela.dyn relocations 60 */ 61 adrp x2, __rel_dyn_start /* x2 <- address bits [31:12] */ 62 add x2, x2, :lo12:__rel_dyn_start /* x2 <- address bits [11:00] */ 63 adrp x3, __rel_dyn_end /* x3 <- address bits [31:12] */ 64 add x3, x3, :lo12:__rel_dyn_end /* x3 <- address bits [11:00] */ 65fixloop: 66 ldp x0, x1, [x2], #16 /* (x0,x1) <- (SRC location, fixup) */ 67 ldr x4, [x2], #8 /* x4 <- addend */ 68 and x1, x1, #0xffffffff 69 cmp x1, #R_AARCH64_RELATIVE 70 bne fixnext 71 72 /* relative fix: store addend plus offset at dest location */ 73 add x0, x0, x9 74 add x4, x4, x9 75 str x4, [x0] 76fixnext: 77 cmp x2, x3 78 b.lo fixloop 79 80relocate_done: 81 switch_el x1, 3f, 2f, 1f 82 bl hang 833: mrs x0, sctlr_el3 84 b 0f 852: mrs x0, sctlr_el2 86 b 0f 871: mrs x0, sctlr_el1 880: tbz w0, #2, 5f /* skip flushing cache if disabled */ 89 tbz w0, #12, 4f /* skip invalidating i-cache if disabled */ 90 ic iallu /* i-cache invalidate all */ 91 isb sy 924: ldp x0, x1, [sp, #16] 93 bl __asm_flush_dcache_range 945: ldp x29, x30, [sp],#32 95 ret 96ENDPROC(relocate_code) 97