1 /* 2 * (C) Copyright 2015 Google, Inc 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _ASM_ARCH_GPIO_H 8 #define _ASM_ARCH_GPIO_H 9 10 #ifndef CONFIG_ROCKCHIP_GPIO_V2 11 struct rockchip_gpio_regs { 12 u32 swport_dr; 13 u32 swport_ddr; 14 u32 reserved0[(0x30 - 0x08) / 4]; 15 u32 inten; 16 u32 intmask; 17 u32 inttype_level; 18 u32 int_polarity; 19 u32 int_status; 20 u32 int_rawstatus; 21 u32 debounce; 22 u32 porta_eoi; 23 u32 ext_port; 24 u32 reserved1[(0x60 - 0x54) / 4]; 25 u32 ls_sync; 26 }; 27 check_member(rockchip_gpio_regs, ls_sync, 0x60); 28 #else 29 struct rockchip_gpio_regs { 30 u32 swport_dr_l; /* ADDRESS OFFSET: 0x0000 */ 31 u32 swport_dr_h; /* ADDRESS OFFSET: 0x0004 */ 32 u32 swport_ddr_l; /* ADDRESS OFFSET: 0x0008 */ 33 u32 swport_ddr_h; /* ADDRESS OFFSET: 0x000c */ 34 u32 int_en_l; /* ADDRESS OFFSET: 0x0010 */ 35 u32 int_en_h; /* ADDRESS OFFSET: 0x0014 */ 36 u32 int_mask_l; /* ADDRESS OFFSET: 0x0018 */ 37 u32 int_mask_h; /* ADDRESS OFFSET: 0x001c */ 38 u32 int_type_l; /* ADDRESS OFFSET: 0x0020 */ 39 u32 int_type_h; /* ADDRESS OFFSET: 0x0024 */ 40 u32 int_polarity_l; /* ADDRESS OFFSET: 0x0028 */ 41 u32 int_polarity_h; /* ADDRESS OFFSET: 0x002c */ 42 u32 int_bothedge_l; /* ADDRESS OFFSET: 0x0030 */ 43 u32 int_bothedge_h; /* ADDRESS OFFSET: 0x0034 */ 44 u32 debounce_l; /* ADDRESS OFFSET: 0x0038 */ 45 u32 debounce_h; /* ADDRESS OFFSET: 0x003c */ 46 u32 dbclk_div_en_l; /* ADDRESS OFFSET: 0x0040 */ 47 u32 dbclk_div_en_h; /* ADDRESS OFFSET: 0x0044 */ 48 u32 dbclk_div_con; /* ADDRESS OFFSET: 0x0048 */ 49 u32 reserved004c; /* ADDRESS OFFSET: 0x004c */ 50 u32 int_status; /* ADDRESS OFFSET: 0x0050 */ 51 u32 reserved0054; /* ADDRESS OFFSET: 0x0054 */ 52 u32 int_rawstatus; /* ADDRESS OFFSET: 0x0058 */ 53 u32 reserved005c; /* ADDRESS OFFSET: 0x005c */ 54 u32 port_eoi_l; /* ADDRESS OFFSET: 0x0060 */ 55 u32 port_eoi_h; /* ADDRESS OFFSET: 0x0064 */ 56 u32 reserved0068[2]; /* ADDRESS OFFSET: 0x0068 */ 57 u32 ext_port; /* ADDRESS OFFSET: 0x0070 */ 58 u32 reserved0074; /* ADDRESS OFFSET: 0x0074 */ 59 u32 ver_id; /* ADDRESS OFFSET: 0x0078 */ 60 }; 61 check_member(rockchip_gpio_regs, ver_id, 0x0078); 62 #endif 63 64 #endif 65