1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #ifndef __ASM_ARCH_CPU_H
8*4882a593Smuzhiyun #define __ASM_ARCH_CPU_H
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <asm/io.h>
11*4882a593Smuzhiyun #include <dm/device.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #define ROCKCHIP_CPU_MASK 0xffff0000
14*4882a593Smuzhiyun #define ROCKCHIP_CPU_PX30 0x33260000
15*4882a593Smuzhiyun #define ROCKCHIP_CPU_RK312X 0x31260000
16*4882a593Smuzhiyun #define ROCKCHIP_CPU_RK3288 0x32880000
17*4882a593Smuzhiyun #define ROCKCHIP_CPU_RK3308 0x33080000
18*4882a593Smuzhiyun #define ROCKCHIP_CPU_RK3566 0x35660000
19*4882a593Smuzhiyun #define ROCKCHIP_CPU_RK3568 0x35680000
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define ROCKCHIP_SOC_MASK (ROCKCHIP_CPU_MASK | 0xff)
22*4882a593Smuzhiyun #define ROCKCHIP_SOC_PX30 (ROCKCHIP_CPU_PX30 | 0x00)
23*4882a593Smuzhiyun #define ROCKCHIP_SOC_PX30S (ROCKCHIP_CPU_PX30 | 0x01)
24*4882a593Smuzhiyun #define ROCKCHIP_SOC_RK3126 (ROCKCHIP_CPU_RK312X | 0x00)
25*4882a593Smuzhiyun #define ROCKCHIP_SOC_RK3126B (ROCKCHIP_CPU_RK312X | 0x10)
26*4882a593Smuzhiyun #define ROCKCHIP_SOC_RK3126C (ROCKCHIP_CPU_RK312X | 0x20)
27*4882a593Smuzhiyun #define ROCKCHIP_SOC_RK3128 (ROCKCHIP_CPU_RK312X | 0x01)
28*4882a593Smuzhiyun #define ROCKCHIP_SOC_RK3288 (ROCKCHIP_CPU_RK3288 | 0x00)
29*4882a593Smuzhiyun #define ROCKCHIP_SOC_RK3288W (ROCKCHIP_CPU_RK3288 | 0x01)
30*4882a593Smuzhiyun #define ROCKCHIP_SOC_RK3308 (ROCKCHIP_CPU_RK3308 | 0x00)
31*4882a593Smuzhiyun #define ROCKCHIP_SOC_RK3308B (ROCKCHIP_CPU_RK3308 | 0x01)
32*4882a593Smuzhiyun #define ROCKCHIP_SOC_RK3308BS (ROCKCHIP_CPU_RK3308 | 0x02)
33*4882a593Smuzhiyun #define ROCKCHIP_SOC_RK3566 (ROCKCHIP_CPU_RK3566 | 0x00)
34*4882a593Smuzhiyun #define ROCKCHIP_SOC_RK3568 (ROCKCHIP_CPU_RK3568 | 0x00)
35*4882a593Smuzhiyun
rockchip_get_cpu_version(void)36*4882a593Smuzhiyun static inline unsigned long rockchip_get_cpu_version(void)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun #if defined(CONFIG_ROCKCHIP_RK3568)
39*4882a593Smuzhiyun #define PMUGRF_SOC_CON15 0xfdc20100
40*4882a593Smuzhiyun if (readl(PMUGRF_SOC_CON15) & GENMASK(15, 14))
41*4882a593Smuzhiyun return 1;
42*4882a593Smuzhiyun else
43*4882a593Smuzhiyun return 0;
44*4882a593Smuzhiyun #else
45*4882a593Smuzhiyun return 0;
46*4882a593Smuzhiyun #endif
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
rockchip_soc_id(void)49*4882a593Smuzhiyun static inline int rockchip_soc_id(void)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun #if defined(CONFIG_ROCKCHIP_PX30)
52*4882a593Smuzhiyun u32 v = readl(0xFF630004);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* The CHIP_ID is stored in DDRGRF CON1[15:14]
55*4882a593Smuzhiyun * PX30: 0x00
56*4882a593Smuzhiyun * PX30S: 0x03
57*4882a593Smuzhiyun */
58*4882a593Smuzhiyun if (((v >> 14) & 0x03) == 0x03)
59*4882a593Smuzhiyun return ROCKCHIP_SOC_PX30S;
60*4882a593Smuzhiyun else
61*4882a593Smuzhiyun return ROCKCHIP_SOC_PX30;
62*4882a593Smuzhiyun #elif defined(CONFIG_ROCKCHIP_RK3288)
63*4882a593Smuzhiyun /* RK3288W HDMI Revision ID is 0x1A */
64*4882a593Smuzhiyun if (readl(0xFF980004) == 0x1A)
65*4882a593Smuzhiyun return ROCKCHIP_SOC_RK3288W;
66*4882a593Smuzhiyun else
67*4882a593Smuzhiyun return ROCKCHIP_SOC_RK3288;
68*4882a593Smuzhiyun #elif defined(CONFIG_ROCKCHIP_RK3308)
69*4882a593Smuzhiyun /*
70*4882a593Smuzhiyun * The CHIP_ID is stored in GRF_CHIP_ID:
71*4882a593Smuzhiyun * RK3308: 0xcea (3306 in decimal)
72*4882a593Smuzhiyun * RK3308B: 0x3308
73*4882a593Smuzhiyun * RK3308BS: 0x3308c
74*4882a593Smuzhiyun */
75*4882a593Smuzhiyun u32 v = readl(0xFF000800);
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun if (v == 3306)
78*4882a593Smuzhiyun return ROCKCHIP_SOC_RK3308;
79*4882a593Smuzhiyun else if (v == 0x3308c)
80*4882a593Smuzhiyun return ROCKCHIP_SOC_RK3308BS;
81*4882a593Smuzhiyun else
82*4882a593Smuzhiyun return ROCKCHIP_SOC_RK3308B;
83*4882a593Smuzhiyun #elif defined(CONFIG_ROCKCHIP_RK3568)
84*4882a593Smuzhiyun if (of_machine_is_compatible("rockchip,rk3566"))
85*4882a593Smuzhiyun return ROCKCHIP_SOC_RK3566;
86*4882a593Smuzhiyun else
87*4882a593Smuzhiyun return ROCKCHIP_SOC_RK3568;
88*4882a593Smuzhiyun #else
89*4882a593Smuzhiyun return 0;
90*4882a593Smuzhiyun #endif
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun #define ROCKCHIP_SOC(id, ID) \
94*4882a593Smuzhiyun static inline bool soc_is_##id(void) \
95*4882a593Smuzhiyun { \
96*4882a593Smuzhiyun int soc_id = rockchip_soc_id(); \
97*4882a593Smuzhiyun if (soc_id) \
98*4882a593Smuzhiyun return ((soc_id & ROCKCHIP_SOC_MASK) == ROCKCHIP_SOC_ ##ID); \
99*4882a593Smuzhiyun return false; \
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun ROCKCHIP_SOC(px30, PX30)
103*4882a593Smuzhiyun ROCKCHIP_SOC(px30s, PX30S)
104*4882a593Smuzhiyun ROCKCHIP_SOC(rk3126, RK3126)
105*4882a593Smuzhiyun ROCKCHIP_SOC(rk3126b, RK3126B)
106*4882a593Smuzhiyun ROCKCHIP_SOC(rk3126c, RK3126C)
107*4882a593Smuzhiyun ROCKCHIP_SOC(rk3128, RK3128)
108*4882a593Smuzhiyun ROCKCHIP_SOC(rk3288, RK3288)
109*4882a593Smuzhiyun ROCKCHIP_SOC(rk3288w, RK3288W)
110*4882a593Smuzhiyun ROCKCHIP_SOC(rk3308, RK3308)
111*4882a593Smuzhiyun ROCKCHIP_SOC(rk3308b, RK3308B)
112*4882a593Smuzhiyun ROCKCHIP_SOC(rk3308bs, RK3308BS)
113*4882a593Smuzhiyun ROCKCHIP_SOC(rk3566, RK3566)
114*4882a593Smuzhiyun ROCKCHIP_SOC(rk3568, RK3568)
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun #endif
117