xref: /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/cpu.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /* SPDX-License-Identifier: GPL-2.0+  */
2 /*
3  * Rockchip Electronics Co., Ltd.
4  *
5  */
6 
7 #ifndef __ASM_ARCH_CPU_H
8 #define __ASM_ARCH_CPU_H
9 
10 #include <asm/io.h>
11 #include <dm/device.h>
12 
13 #define ROCKCHIP_CPU_MASK       0xffff0000
14 #define ROCKCHIP_CPU_PX30	0x33260000
15 #define ROCKCHIP_CPU_RK312X     0x31260000
16 #define ROCKCHIP_CPU_RK3288     0x32880000
17 #define ROCKCHIP_CPU_RK3308	0x33080000
18 #define ROCKCHIP_CPU_RK3566	0x35660000
19 #define ROCKCHIP_CPU_RK3568	0x35680000
20 
21 #define ROCKCHIP_SOC_MASK	(ROCKCHIP_CPU_MASK | 0xff)
22 #define ROCKCHIP_SOC_PX30	(ROCKCHIP_CPU_PX30 | 0x00)
23 #define ROCKCHIP_SOC_PX30S	(ROCKCHIP_CPU_PX30 | 0x01)
24 #define ROCKCHIP_SOC_RK3126     (ROCKCHIP_CPU_RK312X | 0x00)
25 #define ROCKCHIP_SOC_RK3126B    (ROCKCHIP_CPU_RK312X | 0x10)
26 #define ROCKCHIP_SOC_RK3126C    (ROCKCHIP_CPU_RK312X | 0x20)
27 #define ROCKCHIP_SOC_RK3128     (ROCKCHIP_CPU_RK312X | 0x01)
28 #define ROCKCHIP_SOC_RK3288     (ROCKCHIP_CPU_RK3288 | 0x00)
29 #define ROCKCHIP_SOC_RK3288W    (ROCKCHIP_CPU_RK3288 | 0x01)
30 #define ROCKCHIP_SOC_RK3308	(ROCKCHIP_CPU_RK3308 | 0x00)
31 #define ROCKCHIP_SOC_RK3308B	(ROCKCHIP_CPU_RK3308 | 0x01)
32 #define ROCKCHIP_SOC_RK3308BS	(ROCKCHIP_CPU_RK3308 | 0x02)
33 #define ROCKCHIP_SOC_RK3566	(ROCKCHIP_CPU_RK3566 | 0x00)
34 #define ROCKCHIP_SOC_RK3568	(ROCKCHIP_CPU_RK3568 | 0x00)
35 
rockchip_get_cpu_version(void)36 static inline unsigned long rockchip_get_cpu_version(void)
37 {
38 #if defined(CONFIG_ROCKCHIP_RK3568)
39 #define PMUGRF_SOC_CON15	0xfdc20100
40 	if (readl(PMUGRF_SOC_CON15) & GENMASK(15, 14))
41 		return 1;
42 	else
43 		return 0;
44 #else
45 	return 0;
46 #endif
47 }
48 
rockchip_soc_id(void)49 static inline int rockchip_soc_id(void)
50 {
51 #if defined(CONFIG_ROCKCHIP_PX30)
52 	u32 v = readl(0xFF630004);
53 
54 	/* The CHIP_ID is stored in DDRGRF CON1[15:14]
55 	 * PX30:  0x00
56 	 * PX30S: 0x03
57 	 */
58 	if (((v >> 14) & 0x03) == 0x03)
59 		return ROCKCHIP_SOC_PX30S;
60 	else
61 		return ROCKCHIP_SOC_PX30;
62 #elif defined(CONFIG_ROCKCHIP_RK3288)
63 	/* RK3288W HDMI Revision ID is 0x1A */
64 	if (readl(0xFF980004) == 0x1A)
65 		return ROCKCHIP_SOC_RK3288W;
66 	else
67 		return ROCKCHIP_SOC_RK3288;
68 #elif defined(CONFIG_ROCKCHIP_RK3308)
69 	/*
70 	 * The CHIP_ID is stored in GRF_CHIP_ID:
71 	 * RK3308:  0xcea (3306 in decimal)
72 	 * RK3308B: 0x3308
73 	 * RK3308BS: 0x3308c
74 	 */
75 	u32 v = readl(0xFF000800);
76 
77 	if (v == 3306)
78 		return ROCKCHIP_SOC_RK3308;
79 	else if (v == 0x3308c)
80 		return ROCKCHIP_SOC_RK3308BS;
81 	else
82 		return ROCKCHIP_SOC_RK3308B;
83 #elif defined(CONFIG_ROCKCHIP_RK3568)
84 	if (of_machine_is_compatible("rockchip,rk3566"))
85 		return ROCKCHIP_SOC_RK3566;
86 	else
87 		return ROCKCHIP_SOC_RK3568;
88 #else
89 	return 0;
90 #endif
91 }
92 
93 #define ROCKCHIP_SOC(id, ID) \
94 static inline bool soc_is_##id(void) \
95 { \
96 	int soc_id = rockchip_soc_id(); \
97 	if (soc_id) \
98 		return ((soc_id & ROCKCHIP_SOC_MASK) == ROCKCHIP_SOC_ ##ID); \
99 	return false; \
100 }
101 
102 ROCKCHIP_SOC(px30, PX30)
103 ROCKCHIP_SOC(px30s, PX30S)
104 ROCKCHIP_SOC(rk3126, RK3126)
105 ROCKCHIP_SOC(rk3126b, RK3126B)
106 ROCKCHIP_SOC(rk3126c, RK3126C)
107 ROCKCHIP_SOC(rk3128, RK3128)
108 ROCKCHIP_SOC(rk3288, RK3288)
109 ROCKCHIP_SOC(rk3288w, RK3288W)
110 ROCKCHIP_SOC(rk3308, RK3308)
111 ROCKCHIP_SOC(rk3308b, RK3308B)
112 ROCKCHIP_SOC(rk3308bs, RK3308BS)
113 ROCKCHIP_SOC(rk3566, RK3566)
114 ROCKCHIP_SOC(rk3568, RK3568)
115 
116 #endif
117