1/* 2 * (C) Copyright 2016 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7/dts-v1/; 8 9#include "rv1108.dtsi" 10#include "rv1108-u-boot.dtsi" 11#include "rv1108-sdram-ddr3-400.dtsi" 12#include <dt-bindings/input/input.h> 13 14/ { 15 model = "Rockchip RV1108 Evaluation board"; 16 compatible = "rockchip,rv1108-evb", "rockchip,rv1108"; 17 18 memory@60000000 { 19 device_type = "memory"; 20 reg = <0x60000000 0x08000000>; 21 }; 22 23 chosen { 24 stdout-path = "serial2:1500000n8"; 25 }; 26 27 adc-keys { 28 compatible = "adc-keys"; 29 io-channels = <&saradc 0>; 30 volup-key { 31 linux,code = <KEY_VOLUMEUP>; 32 label = "volume up"; 33 press-threshold-microvolt = <18000>; 34 }; 35 }; 36 37 backlight: backlight { 38 compatible = "pwm-backlight"; 39 pwms = <&pwm0 0 25000 0>; 40 default-brightness-level = <200>; 41 brightness-levels = < 42 0 1 2 3 4 5 6 7 43 8 9 10 11 12 13 14 15 44 16 17 18 19 20 21 22 23 45 24 25 26 27 28 29 30 31 46 32 33 34 35 36 37 38 39 47 40 41 42 43 44 45 46 47 48 48 49 50 51 52 53 54 55 49 56 57 58 59 60 61 62 63 50 64 65 66 67 68 69 70 71 51 72 73 74 75 76 77 78 79 52 80 81 82 83 84 85 86 87 53 88 89 90 91 92 93 94 95 54 96 97 98 99 100 101 102 103 55 104 105 106 107 108 109 110 111 56 112 113 114 115 116 117 118 119 57 120 121 122 123 124 125 126 127 58 128 129 130 131 132 133 134 135 59 136 137 138 139 140 141 142 143 60 144 145 146 147 148 149 150 151 61 152 153 154 155 156 157 158 159 62 160 161 162 163 164 165 166 167 63 168 169 170 171 172 173 174 175 64 176 177 178 179 180 181 182 183 65 184 185 186 187 188 189 190 191 66 192 193 194 195 196 197 198 199 67 200 201 202 203 204 205 206 207 68 208 209 210 211 212 213 214 215 69 216 217 218 219 220 221 222 223 70 224 225 226 227 228 229 230 231 71 232 233 234 235 236 237 238 239 72 240 241 242 243 244 245 246 247 73 248 249 250 251 252 253 254 255>; 74 }; 75 76 vcc5v0_otg: vcc5v0-otg-drv { 77 compatible = "regulator-fixed"; 78 enable-active-high; 79 regulator-name = "vcc5v0_otg"; 80 gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; 81 regulator-min-microvolt = <5000000>; 82 regulator-max-microvolt = <5000000>; 83 }; 84 85 vcc_phy: vcc-phy-regulator { 86 compatible = "regulator-fixed"; 87 enable-active-high; 88 regulator-name = "vcc_phy"; 89 regulator-min-microvolt = <3300000>; 90 regulator-max-microvolt = <3300000>; 91 regulator-always-on; 92 regulator-boot-on; 93 }; 94}; 95 96&display_subsystem { 97 status = "okay"; 98}; 99 100&dsi { 101 status = "okay"; 102 103 panel: panel@0 { 104 compatible = "simple-panel-dsi"; 105 reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>; 106 enable-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; 107 prepare-delay-ms = <20>; 108 reset-delay-ms = <20>; 109 init-delay-ms = <20>; 110 enable-delay-ms = <20>; 111 reg =<0>; 112 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 113 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 114 dsi,format = <MIPI_DSI_FMT_RGB888>; 115 dsi,lanes = <4>; 116 status = "okay"; 117 118 panel-init-sequence = [ 119 39 00 06 F0 55 AA 52 08 00 120 39 00 05 B0 0F 0F 1E 14 121 15 00 02 B2 00 122 15 00 02 B6 03 123 39 00 15 C0 03 00 06 07 08 09 00 00 00 00 02 00 0A 0B 0C 0D 00 00 00 00 124 39 00 11 C1 08 24 24 01 18 24 9F 85 08 24 24 01 18 24 95 85 125 39 00 19 C2 03 05 1B 24 13 31 01 05 1B 24 13 31 03 05 1B 38 00 11 02 05 1B 38 00 11 126 39 00 19 C3 02 05 1B 24 13 11 03 05 1B 24 13 11 03 05 1B 38 00 11 02 05 1B 38 00 11 127 39 00 06 F0 55 AA 52 08 01 128 15 00 02 B5 1E 129 15 00 02 B6 2D 130 15 00 02 B7 04 131 15 00 02 B8 05 132 15 00 02 B9 04 133 15 00 02 BA 14 134 15 00 02 BB 2F 135 15 00 02 BE 12 136 39 00 04 C2 00 35 07 137 39 00 06 F0 55 AA 52 08 02 138 15 00 02 C9 13 139 39 00 04 D4 02 04 2C 140 39 00 24 E1 00 91 AE CB E6 54 FF 1e 33 43 55 4F 66 78 8B 55 9D AC C0 CF 55 E0 e8 F2 FB AA 03 0D 15 1F AA 27 2C 31 34 141 39 00 24 E2 00 AD C6 E4 FD 55 11 2A 3B 49 55 54 6B 7C 8F 55 A1 AF C3 D1 55 E2 EA F3 FC AA 04 0E 15 20 AA 28 2D 32 35 142 39 00 24 E3 55 05 1E 37 4B 55 5A 64 72 7F 55 8B A3 B8 D1 A5 E4 F6 0E 23 AA 39 42 4F 59 AA 64 70 7A 86 AA 90 96 9C 9F 143 39 00 07 8F 5A 96 3C C3 A5 69 144 15 00 02 89 00 145 39 00 04 8C 55 49 53 146 15 00 02 9A 5A 147 39 00 05 FF A5 5A 13 86 148 39 00 03 FE 01 54 149 15 00 02 35 00 150 15 96 02 11 00 151 15 32 02 29 00 152 ]; 153 154 display-timings { 155 native-mode = <&timing_e555hbm2>; 156 157 timing_e555hbm2: timing0 { 158 clock-frequency = <62000000>; 159 hactive = <720>; 160 vactive = <1280>; 161 hsync-len = <4>; 162 hback-porch = <20>; 163 hfront-porch = <32>; 164 vsync-len = <4>; 165 vback-porch = <15>; 166 vfront-porch = <15>; 167 hsync-active = <0>; 168 vsync-active = <0>; 169 de-active = <0>; 170 pixelclk-active = <0>; 171 }; 172 }; 173 }; 174}; 175 176&gmac { 177 status = "okay"; 178 clock_in_out ="output"; 179 phy-supply = <&vcc_phy>; 180 snps,reset-active-low; 181 snps,reset-delays-us = <0 10000 1000000>; 182 snps,reset-gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>; 183}; 184 185&emmc { 186 bus-width = <8>; 187 cap-mmc-highspeed; 188 supports-emmc; 189 disable-wp; 190 non-removable; 191 num-slots = <1>; 192 status = "okay"; 193}; 194 195&mipi_dphy { 196 status = "okay"; 197}; 198 199&pwm0 { 200 status = "okay"; 201}; 202 203&route_dsi { 204 status = "okay"; 205}; 206 207&saradc { 208 status = "okay"; 209}; 210 211&sdmmc { 212 bus-width = <4>; 213 cap-mmc-highspeed; 214 cap-sd-highspeed; 215 disable-wp; 216 max-frequency = <150000000>; 217 pinctrl-names = "default"; 218 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 219 status = "okay"; 220}; 221 222&sfc { 223 compatible = "rockchip,rksfc"; 224 status = "okay"; 225}; 226 227&u2phy { 228 status = "okay"; 229}; 230 231&u2phy_otg { 232 status = "okay"; 233}; 234 235&u2phy_host { 236 status = "okay"; 237}; 238 239&uart0 { 240 status = "okay"; 241}; 242 243&uart1 { 244 status = "okay"; 245}; 246 247&uart2 { 248 status = "okay"; 249}; 250 251&usb20_otg { 252 vbus-supply = <&vcc5v0_otg>; 253 status = "okay"; 254}; 255 256&usb_host_ehci { 257 status = "okay"; 258}; 259 260&usb_host_ohci { 261 status = "okay"; 262}; 263 264&vop { 265 status = "okay"; 266}; 267 268&i2c0 { 269 i2c-scl-rising-time-ns = <275>; 270 i2c-scl-falling-time-ns = <16>; 271 clock-frequency = <200000>; 272 nack-retry = <1>; 273 status = "okay"; 274 275 rk805: pmic@18 { 276 compatible = "rockchip,rk805"; 277 status = "okay"; 278 reg = <0x18>; 279 interrupt-parent = <&gpio1>; 280 interrupts = <6 IRQ_TYPE_LEVEL_LOW>; 281 pinctrl-names = "default"; 282 pinctrl-0 = <&pmic_int_l>; 283 rockchip,system-power-controller; 284 wakeup-source; 285 gpio-controller; 286 #gpio-cells = <2>; 287 #clock-cells = <1>; 288 clock-output-names = "xin32k", "rk805-clkout2"; 289 290 pwrkey { 291 status = "okay"; 292 }; 293 294 regulators { 295 vdd_arm: DCDC_REG1 { 296 regulator-name = "vdd_arm"; 297 regulator-min-microvolt = <712500>; 298 regulator-max-microvolt = <1450000>; 299 regulator-ramp-delay = <6001>; 300 regulator-boot-on; 301 regulator-always-on; 302 regulator-state-mem { 303 regulator-on-in-suspend; 304 regulator-suspend-microvolt = <1000000>; 305 }; 306 }; 307 308 vdd_cam: DCDC_REG2 { 309 regulator-name = "vdd_cam"; 310 regulator-min-microvolt = <712500>; 311 regulator-max-microvolt = <2000000>; 312 regulator-ramp-delay = <6001>; 313 regulator-boot-on; 314 regulator-always-on; 315 regulator-state-mem { 316 regulator-on-in-suspend; 317 regulator-suspend-microvolt = <2000000>; 318 }; 319 }; 320 321 vcc_ddr: DCDC_REG3 { 322 regulator-name = "vcc_ddr"; 323 regulator-boot-on; 324 regulator-always-on; 325 regulator-state-mem { 326 regulator-on-in-suspend; 327 }; 328 }; 329 330 vcc_io: DCDC_REG4 { 331 regulator-name = "vcc_io"; 332 regulator-min-microvolt = <3300000>; 333 regulator-max-microvolt = <3300000>; 334 regulator-boot-on; 335 regulator-always-on; 336 regulator-state-mem { 337 regulator-on-in-suspend; 338 regulator-suspend-microvolt = <3300000>; 339 }; 340 }; 341 342 vdd_10: LDO_REG1 { 343 regulator-name = "vdd_10"; 344 regulator-min-microvolt = <1000000>; 345 regulator-max-microvolt = <1000000>; 346 regulator-boot-on; 347 regulator-always-on; 348 regulator-state-mem { 349 regulator-on-in-suspend; 350 regulator-suspend-microvolt = <1000000>; 351 }; 352 }; 353 354 vcc_18emmc: LDO_REG2 { 355 regulator-name = "vcc_18emmc"; 356 regulator-min-microvolt = <1800000>; 357 regulator-max-microvolt = <1800000>; 358 regulator-boot-on; 359 regulator-always-on; 360 regulator-state-mem { 361 regulator-on-in-suspend; 362 regulator-suspend-microvolt = <1800000>; 363 }; 364 }; 365 366 vdd_10_pmu: LDO_REG3 { 367 regulator-name = "vdd_10_pmu"; 368 regulator-min-microvolt = <1000000>; 369 regulator-max-microvolt = <1000000>; 370 regulator-boot-on; 371 regulator-always-on; 372 regulator-state-mem { 373 regulator-on-in-suspend; 374 regulator-suspend-microvolt = <1000000>; 375 }; 376 }; 377 }; 378 }; 379}; 380 381&pinctrl { 382 pmic { 383 pmic_int_l: pmic-int-l { 384 rockchip,pins = 385 <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; 386 }; 387 }; 388}; 389