1/* 2 * (C) Copyright 2018 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7/ { 8 aliases { 9 mmc0 = &emmc; 10 mmc1 = &sdmmc; 11 }; 12 13 chosen { 14 stdout-path = &uart2; 15 u-boot,spl-boot-order = &sdmmc, &spi_nand, &spi_nor, &nandc, &emmc; 16 }; 17 18 secure-otp@ff2a8000 { 19 compatible = "rockchip,rk3308-secure-otp"; 20 reg = <0x0 0xff2a8000 0x0 0x4000>; 21 secure_conf = <0xff2b0004>; 22 mask_addr = <0xff540000>; 23 u-boot,dm-pre-reloc; 24 }; 25}; 26 27&psci { 28 u-boot,dm-pre-reloc; 29 status = "okay"; 30}; 31 32&dmc { 33 u-boot,dm-pre-reloc; 34}; 35 36&cru { 37 u-boot,dm-pre-reloc; 38}; 39 40&emmc { 41 u-boot,dm-pre-reloc; 42}; 43 44&grf { 45 u-boot,dm-pre-reloc; 46}; 47 48&nandc { 49 u-boot,dm-pre-reloc; 50 status = "okay"; 51 #address-cells = <1>; 52 #size-cells = <0>; 53 54 nand@0 { 55 u-boot,dm-spl; 56 reg = <0>; 57 nand-ecc-mode = "hw"; 58 nand-ecc-strength = <16>; 59 nand-ecc-step-size = <1024>; 60 }; 61}; 62 63&pinctrl { 64 u-boot,dm-pre-reloc; 65}; 66 67&pcfg_pull_none_4ma { 68 u-boot,dm-spl; 69}; 70 71&pcfg_pull_up_4ma { 72 u-boot,dm-spl; 73}; 74 75&sdmmc { 76 u-boot,dm-pre-reloc; 77}; 78 79&sdmmc_pin { 80 u-boot,dm-spl; 81}; 82 83&sdmmc_clk { 84 u-boot,dm-spl; 85}; 86 87&sdmmc_cmd { 88 u-boot,dm-spl; 89}; 90 91&sdmmc_bus4 { 92 u-boot,dm-spl; 93}; 94 95&sdmmc_pwren { 96 u-boot,dm-spl; 97}; 98 99&sfc { 100 u-boot,dm-pre-reloc; 101 status = "okay"; 102 103 #address-cells = <1>; 104 #size-cells = <0>; 105 spi_nand: flash@0 { 106 u-boot,dm-spl; 107 compatible = "spi-nand"; 108 reg = <0>; 109 spi-tx-bus-width = <1>; 110 spi-rx-bus-width = <4>; 111 spi-max-frequency = <96000000>; 112 }; 113 spi_nor: flash@1 { 114 u-boot,dm-spl; 115 compatible = "jedec,spi-nor"; 116 label = "sfc_nor"; 117 reg = <0>; 118 spi-tx-bus-width = <1>; 119 spi-rx-bus-width = <4>; 120 spi-max-frequency = <96000000>; 121 }; 122}; 123 124&crypto { 125 u-boot,dm-pre-reloc; 126 status = "okay"; 127}; 128 129&saradc { 130 u-boot,dm-pre-reloc; 131 status = "okay"; 132}; 133 134&uart0 { 135 u-boot,dm-pre-reloc; 136}; 137 138&uart1 { 139 u-boot,dm-pre-reloc; 140}; 141 142&uart2 { 143 u-boot,dm-pre-reloc; 144 clock-frequency = <24000000>; 145 status = "okay"; 146}; 147 148&uart3 { 149 u-boot,dm-pre-reloc; 150}; 151 152&uart4 { 153 u-boot,dm-pre-reloc; 154}; 155 156&usb2phy_grf { 157 u-boot,dm-pre-reloc; 158}; 159 160&u2phy { 161 u-boot,dm-pre-reloc; 162 status = "okay"; 163}; 164 165&u2phy_otg { 166 u-boot,dm-pre-reloc; 167 status = "okay"; 168}; 169 170&usb20_otg { 171 u-boot,dm-pre-reloc; 172 status = "okay"; 173}; 174 175&route_rgb { 176 status = "disabled"; 177}; 178