1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ 2 /* 3 * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6 #ifndef _DT_BINDINGS_DRAM_ROCKCHIP_RV1126_H 7 #define _DT_BINDINGS_DRAM_ROCKCHIP_RV1126_H 8 9 #define DDR2_DS_FULL (0) 10 #define DDR2_DS_REDUCE (1) 11 12 #define DDR2_ODT_DIS (0) 13 #define DDR2_ODT_50ohm (50) /* optional */ 14 #define DDR2_ODT_75ohm (75) 15 #define DDR2_ODT_150ohm (150) 16 17 #define DDR3_DS_34ohm (34) 18 #define DDR3_DS_40ohm (40) 19 20 #define DDR3_ODT_DIS (0) 21 #define DDR3_ODT_40ohm (40) 22 #define DDR3_ODT_60ohm (60) 23 #define DDR3_ODT_120ohm (120) 24 25 #define LP2_DS_34ohm (34) 26 #define LP2_DS_40ohm (40) 27 #define LP2_DS_48ohm (48) 28 #define LP2_DS_60ohm (60) 29 #define LP2_DS_68_6ohm (68) /* optional */ 30 #define LP2_DS_80ohm (80) 31 #define LP2_DS_120ohm (120) /* optional */ 32 33 #define LP3_DS_34ohm (34) 34 #define LP3_DS_40ohm (40) 35 #define LP3_DS_48ohm (48) 36 #define LP3_DS_60ohm (60) 37 #define LP3_DS_80ohm (80) 38 #define LP3_DS_34D_40U (3440) 39 #define LP3_DS_40D_48U (4048) 40 #define LP3_DS_34D_48U (3448) 41 42 #define LP3_ODT_DIS (0) 43 #define LP3_ODT_60ohm (60) 44 #define LP3_ODT_120ohm (120) 45 #define LP3_ODT_240ohm (240) 46 47 #define LP4_PDDS_40ohm (40) 48 #define LP4_PDDS_48ohm (48) 49 #define LP4_PDDS_60ohm (60) 50 #define LP4_PDDS_80ohm (80) 51 #define LP4_PDDS_120ohm (120) 52 #define LP4_PDDS_240ohm (240) 53 54 #define LP4_DQ_ODT_40ohm (40) 55 #define LP4_DQ_ODT_48ohm (48) 56 #define LP4_DQ_ODT_60ohm (60) 57 #define LP4_DQ_ODT_80ohm (80) 58 #define LP4_DQ_ODT_120ohm (120) 59 #define LP4_DQ_ODT_240ohm (240) 60 #define LP4_DQ_ODT_DIS (0) 61 62 #define LP4_CA_ODT_40ohm (40) 63 #define LP4_CA_ODT_48ohm (48) 64 #define LP4_CA_ODT_60ohm (60) 65 #define LP4_CA_ODT_80ohm (80) 66 #define LP4_CA_ODT_120ohm (120) 67 #define LP4_CA_ODT_240ohm (240) 68 #define LP4_CA_ODT_DIS (0) 69 70 #define DDR4_DS_34ohm (34) 71 #define DDR4_DS_48ohm (48) 72 #define DDR4_RTT_NOM_DIS (0) 73 #define DDR4_RTT_NOM_60ohm (60) 74 #define DDR4_RTT_NOM_120ohm (120) 75 #define DDR4_RTT_NOM_40ohm (40) 76 #define DDR4_RTT_NOM_240ohm (240) 77 #define DDR4_RTT_NOM_48ohm (48) 78 #define DDR4_RTT_NOM_80ohm (80) 79 #define DDR4_RTT_NOM_34ohm (34) 80 81 #define PHY_DDR3_RON_DISABLE (0) 82 #define PHY_DDR3_RON_506ohm (1) 83 #define PHY_DDR3_RON_253ohm (2) 84 #define PHY_DDR3_RON_169hm (3) 85 #define PHY_DDR3_RON_127ohm (4) 86 #define PHY_DDR3_RON_101ohm (5) 87 #define PHY_DDR3_RON_84ohm (6) 88 #define PHY_DDR3_RON_72ohm (7) 89 #define PHY_DDR3_RON_63ohm (16) 90 #define PHY_DDR3_RON_56ohm (17) 91 #define PHY_DDR3_RON_51ohm (18) 92 #define PHY_DDR3_RON_46ohm (19) 93 #define PHY_DDR3_RON_42ohm (20) 94 #define PHY_DDR3_RON_39ohm (21) 95 #define PHY_DDR3_RON_36ohm (22) 96 #define PHY_DDR3_RON_34ohm (23) 97 #define PHY_DDR3_RON_32ohm (24) 98 #define PHY_DDR3_RON_30ohm (25) 99 #define PHY_DDR3_RON_28ohm (26) 100 #define PHY_DDR3_RON_27ohm (27) 101 #define PHY_DDR3_RON_25ohm (28) 102 #define PHY_DDR3_RON_24ohm (29) 103 #define PHY_DDR3_RON_23ohm (30) 104 #define PHY_DDR3_RON_22ohm (31) 105 106 #define PHY_DDR3_RTT_DISABLE (0) 107 #define PHY_DDR3_RTT_953ohm (1) 108 #define PHY_DDR3_RTT_483ohm (2) 109 #define PHY_DDR3_RTT_320ohm (3) 110 #define PHY_DDR3_RTT_241ohm (4) 111 #define PHY_DDR3_RTT_193ohm (5) 112 #define PHY_DDR3_RTT_161ohm (6) 113 #define PHY_DDR3_RTT_138ohm (7) 114 #define PHY_DDR3_RTT_121ohm (16) 115 #define PHY_DDR3_RTT_107ohm (17) 116 #define PHY_DDR3_RTT_97ohm (18) 117 #define PHY_DDR3_RTT_88ohm (19) 118 #define PHY_DDR3_RTT_80ohm (20) 119 #define PHY_DDR3_RTT_74ohm (21) 120 #define PHY_DDR3_RTT_69ohm (22) 121 #define PHY_DDR3_RTT_64ohm (23) 122 #define PHY_DDR3_RTT_60ohm (24) 123 #define PHY_DDR3_RTT_57ohm (25) 124 #define PHY_DDR3_RTT_54ohm (26) 125 #define PHY_DDR3_RTT_51ohm (27) 126 #define PHY_DDR3_RTT_48ohm (28) 127 #define PHY_DDR3_RTT_46ohm (29) 128 #define PHY_DDR3_RTT_44ohm (30) 129 #define PHY_DDR3_RTT_42ohm (31) 130 131 #define PHY_DDR4_LPDDR3_RON_DISABLE (0) 132 #define PHY_DDR4_LPDDR3_RON_570ohm (1) 133 #define PHY_DDR4_LPDDR3_RON_285ohm (2) 134 #define PHY_DDR4_LPDDR3_RON_190ohm (3) 135 #define PHY_DDR4_LPDDR3_RON_142ohm (4) 136 #define PHY_DDR4_LPDDR3_RON_114ohm (5) 137 #define PHY_DDR4_LPDDR3_RON_95ohm (6) 138 #define PHY_DDR4_LPDDR3_RON_81ohm (7) 139 #define PHY_DDR4_LPDDR3_RON_71ohm (16) 140 #define PHY_DDR4_LPDDR3_RON_63ohm (17) 141 #define PHY_DDR4_LPDDR3_RON_57ohm (18) 142 #define PHY_DDR4_LPDDR3_RON_52ohm (19) 143 #define PHY_DDR4_LPDDR3_RON_47ohm (20) 144 #define PHY_DDR4_LPDDR3_RON_44ohm (21) 145 #define PHY_DDR4_LPDDR3_RON_41ohm (22) 146 #define PHY_DDR4_LPDDR3_RON_38ohm (23) 147 #define PHY_DDR4_LPDDR3_RON_36ohm (24) 148 #define PHY_DDR4_LPDDR3_RON_34ohm (25) 149 #define PHY_DDR4_LPDDR3_RON_32ohm (26) 150 #define PHY_DDR4_LPDDR3_RON_30ohm (27) 151 #define PHY_DDR4_LPDDR3_RON_28ohm (28) 152 #define PHY_DDR4_LPDDR3_RON_27ohm (29) 153 #define PHY_DDR4_LPDDR3_RON_26ohm (30) 154 #define PHY_DDR4_LPDDR3_RON_25ohm (31) 155 156 #define PHY_DDR4_LPDDR3_RTT_DISABLE (0) 157 #define PHY_DDR4_LPDDR3_RTT_973ohm (1) 158 #define PHY_DDR4_LPDDR3_RTT_493ohm (2) 159 #define PHY_DDR4_LPDDR3_RTT_327ohm (3) 160 #define PHY_DDR4_LPDDR3_RTT_247ohm (4) 161 #define PHY_DDR4_LPDDR3_RTT_197ohm (5) 162 #define PHY_DDR4_LPDDR3_RTT_164ohm (6) 163 #define PHY_DDR4_LPDDR3_RTT_141ohm (7) 164 #define PHY_DDR4_LPDDR3_RTT_123ohm (16) 165 #define PHY_DDR4_LPDDR3_RTT_109ohm (17) 166 #define PHY_DDR4_LPDDR3_RTT_99ohm (18) 167 #define PHY_DDR4_LPDDR3_RTT_90ohm (19) 168 #define PHY_DDR4_LPDDR3_RTT_82ohm (20) 169 #define PHY_DDR4_LPDDR3_RTT_76ohm (21) 170 #define PHY_DDR4_LPDDR3_RTT_70ohm (22) 171 #define PHY_DDR4_LPDDR3_RTT_66ohm (23) 172 #define PHY_DDR4_LPDDR3_RTT_62ohm (24) 173 #define PHY_DDR4_LPDDR3_RTT_58ohm (25) 174 #define PHY_DDR4_LPDDR3_RTT_55ohm (26) 175 #define PHY_DDR4_LPDDR3_RTT_52ohm (27) 176 #define PHY_DDR4_LPDDR3_RTT_49ohm (28) 177 #define PHY_DDR4_LPDDR3_RTT_47ohm (29) 178 #define PHY_DDR4_LPDDR3_RTT_45ohm (30) 179 #define PHY_DDR4_LPDDR3_RTT_43ohm (31) 180 181 #define PHY_LPDDR4_RON_DISABLE (0) 182 #define PHY_LPDDR4_RON_606ohm (1) 183 #define PHY_LPDDR4_RON_303ohm (2) 184 #define PHY_LPDDR4_RON_202ohm (3) 185 #define PHY_LPDDR4_RON_152ohm (4) 186 #define PHY_LPDDR4_RON_121ohm (5) 187 #define PHY_LPDDR4_RON_101ohm (6) 188 #define PHY_LPDDR4_RON_87ohm (7) 189 #define PHY_LPDDR4_RON_76ohm (16) 190 #define PHY_LPDDR4_RON_67ohm (17) 191 #define PHY_LPDDR4_RON_61ohm (18) 192 #define PHY_LPDDR4_RON_55ohm (19) 193 #define PHY_LPDDR4_RON_51ohm (20) 194 #define PHY_LPDDR4_RON_47ohm (21) 195 #define PHY_LPDDR4_RON_43ohm (22) 196 #define PHY_LPDDR4_RON_40ohm (23) 197 #define PHY_LPDDR4_RON_38ohm (24) 198 #define PHY_LPDDR4_RON_36ohm (25) 199 #define PHY_LPDDR4_RON_34ohm (26) 200 #define PHY_LPDDR4_RON_32ohm (27) 201 #define PHY_LPDDR4_RON_30ohm (28) 202 #define PHY_LPDDR4_RON_29ohm (29) 203 #define PHY_LPDDR4_RON_28ohm (30) 204 #define PHY_LPDDR4_RON_26ohm (31) 205 206 #define PHY_LPDDR4_RTT_DISABLE (0) 207 #define PHY_LPDDR4_RTT_998ohm (1) 208 #define PHY_LPDDR4_RTT_506ohm (2) 209 #define PHY_LPDDR4_RTT_336ohm (3) 210 #define PHY_LPDDR4_RTT_253ohm (4) 211 #define PHY_LPDDR4_RTT_202ohm (5) 212 #define PHY_LPDDR4_RTT_169ohm (6) 213 #define PHY_LPDDR4_RTT_144ohm (7) 214 #define PHY_LPDDR4_RTT_127ohm (16) 215 #define PHY_LPDDR4_RTT_112ohm (17) 216 #define PHY_LPDDR4_RTT_101ohm (18) 217 #define PHY_LPDDR4_RTT_92ohm (19) 218 #define PHY_LPDDR4_RTT_84ohm (20) 219 #define PHY_LPDDR4_RTT_78ohm (21) 220 #define PHY_LPDDR4_RTT_72ohm (22) 221 #define PHY_LPDDR4_RTT_67ohm (23) 222 #define PHY_LPDDR4_RTT_63ohm (24) 223 #define PHY_LPDDR4_RTT_60ohm (25) 224 #define PHY_LPDDR4_RTT_56ohm (26) 225 #define PHY_LPDDR4_RTT_53ohm (27) 226 #define PHY_LPDDR4_RTT_51ohm (28) 227 #define PHY_LPDDR4_RTT_48ohm (29) 228 #define PHY_LPDDR4_RTT_46ohm (30) 229 #define PHY_LPDDR4_RTT_44ohm (31) 230 231 #endif /*_DT_BINDINGS_DRAM_ROCKCHIP_RV1126_H*/ 232