1 /*
2 * Copyright 2015 - 2016 Xilinx, Inc.
3 *
4 * Michal Simek <michal.simek@xilinx.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #include <common.h>
10 #include <debug_uart.h>
11 #include <spl.h>
12
13 #include <asm/io.h>
14 #include <asm/spl.h>
15 #include <asm/arch/hardware.h>
16 #include <asm/arch/sys_proto.h>
17
board_init_f(ulong dummy)18 void board_init_f(ulong dummy)
19 {
20 board_early_init_f();
21 board_early_init_r();
22
23 #ifdef CONFIG_DEBUG_UART
24 /* Uart debug for sure */
25 debug_uart_init();
26 puts("Debug uart enabled\n"); /* or printch() */
27 #endif
28 /* Delay is required for clocks to be propagated */
29 udelay(1000000);
30
31 /* Clear the BSS */
32 memset(__bss_start, 0, __bss_end - __bss_start);
33
34 /* No need to call timer init - it is empty for ZynqMP */
35 board_init_r(NULL, 0);
36 }
37
ps_mode_reset(ulong mode)38 static void ps_mode_reset(ulong mode)
39 {
40 writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
41 &crlapb_base->boot_pin_ctrl);
42 udelay(5);
43 writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT |
44 mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
45 &crlapb_base->boot_pin_ctrl);
46 }
47
48 /*
49 * Set default PS_MODE1 which is used for USB ULPI phy reset
50 * Also other resets can be connected to this certain pin
51 */
52 #ifndef MODE_RESET
53 # define MODE_RESET PS_MODE1
54 #endif
55
56 #ifdef CONFIG_SPL_BOARD_INIT
spl_board_init(void)57 void spl_board_init(void)
58 {
59 preloader_console_init();
60 ps_mode_reset(MODE_RESET);
61 board_init();
62 }
63 #endif
64
spl_boot_device(void)65 u32 spl_boot_device(void)
66 {
67 u32 reg = 0;
68 u8 bootmode;
69
70 #if defined(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED)
71 /* Change default boot mode at run-time */
72 writel(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE << BOOT_MODE_ALT_SHIFT,
73 &crlapb_base->boot_mode);
74 #endif
75
76 reg = readl(&crlapb_base->boot_mode);
77 if (reg >> BOOT_MODE_ALT_SHIFT)
78 reg >>= BOOT_MODE_ALT_SHIFT;
79
80 bootmode = reg & BOOT_MODES_MASK;
81
82 switch (bootmode) {
83 case JTAG_MODE:
84 return BOOT_DEVICE_RAM;
85 #ifdef CONFIG_SPL_MMC_SUPPORT
86 case SD_MODE1:
87 case SD1_LSHFT_MODE: /* not working on silicon v1 */
88 /* if both controllers enabled, then these two are the second controller */
89 #if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1)
90 return BOOT_DEVICE_MMC2;
91 /* else, fall through, the one SDHCI controller that is enabled is number 1 */
92 #endif
93 case SD_MODE:
94 case EMMC_MODE:
95 return BOOT_DEVICE_MMC1;
96 #endif
97 #ifdef CONFIG_SPL_DFU
98 case USB_MODE:
99 return BOOT_DEVICE_DFU;
100 #endif
101 #ifdef CONFIG_SPL_SATA_SUPPORT
102 case SW_SATA_MODE:
103 return BOOT_DEVICE_SATA;
104 #endif
105 default:
106 printf("Invalid Boot Mode:0x%x\n", bootmode);
107 break;
108 }
109
110 return 0;
111 }
112
spl_boot_mode(const u32 boot_device)113 u32 spl_boot_mode(const u32 boot_device)
114 {
115 switch (boot_device) {
116 case BOOT_DEVICE_RAM:
117 return 0;
118 case BOOT_DEVICE_MMC1:
119 case BOOT_DEVICE_MMC2:
120 return MMCSD_MODE_FS;
121 default:
122 puts("spl: error: unsupported device\n");
123 hang();
124 }
125 }
126
psu_init(void)127 __weak void psu_init(void)
128 {
129 /*
130 * This function is overridden by the one in
131 * board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists.
132 */
133 }
134
135 #ifdef CONFIG_SPL_OS_BOOT
spl_start_uboot(void)136 int spl_start_uboot(void)
137 {
138 handoff_setup();
139
140 return 0;
141 }
142 #endif
143
144 #ifdef CONFIG_SPL_LOAD_FIT
board_fit_config_name_match(const char * name)145 int board_fit_config_name_match(const char *name)
146 {
147 /* Just empty function now - can't decide what to choose */
148 debug("%s: %s\n", __func__, name);
149
150 return 0;
151 }
152 #endif
153