1<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd"> 2<html> 3<!-- This file documents the GNU linker LD 4(GNU Toolchain for the A-profile Architecture 10.3-2021.07 (arm-10.29)) 5version 2.36.1. 6 7Copyright (C) 1991-2021 Free Software Foundation, Inc. 8 9Permission is granted to copy, distribute and/or modify this document 10under the terms of the GNU Free Documentation License, Version 1.3 11or any later version published by the Free Software Foundation; 12with no Invariant Sections, with no Front-Cover Texts, and with no 13Back-Cover Texts. A copy of the license is included in the 14section entitled "GNU Free Documentation License". --> 15<!-- Created by GNU Texinfo 5.1, http://www.gnu.org/software/texinfo/ --> 16<head> 17<title>LD: PowerPC64 ELF64</title> 18 19<meta name="description" content="LD: PowerPC64 ELF64"> 20<meta name="keywords" content="LD: PowerPC64 ELF64"> 21<meta name="resource-type" content="document"> 22<meta name="distribution" content="global"> 23<meta name="Generator" content="makeinfo"> 24<meta http-equiv="Content-Type" content="text/html; charset=utf-8"> 25<link href="index.html#Top" rel="start" title="Top"> 26<link href="LD-Index.html#LD-Index" rel="index" title="LD Index"> 27<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents"> 28<link href="Machine-Dependent.html#Machine-Dependent" rel="up" title="Machine Dependent"> 29<link href="S_002f390-ELF.html#S_002f390-ELF" rel="next" title="S/390 ELF"> 30<link href="PowerPC-ELF32.html#PowerPC-ELF32" rel="previous" title="PowerPC ELF32"> 31<style type="text/css"> 32<!-- 33a.summary-letter {text-decoration: none} 34blockquote.smallquotation {font-size: smaller} 35div.display {margin-left: 3.2em} 36div.example {margin-left: 3.2em} 37div.indentedblock {margin-left: 3.2em} 38div.lisp {margin-left: 3.2em} 39div.smalldisplay {margin-left: 3.2em} 40div.smallexample {margin-left: 3.2em} 41div.smallindentedblock {margin-left: 3.2em; font-size: smaller} 42div.smalllisp {margin-left: 3.2em} 43kbd {font-style:oblique} 44pre.display {font-family: inherit} 45pre.format {font-family: inherit} 46pre.menu-comment {font-family: serif} 47pre.menu-preformatted {font-family: serif} 48pre.smalldisplay {font-family: inherit; font-size: smaller} 49pre.smallexample {font-size: smaller} 50pre.smallformat {font-family: inherit; font-size: smaller} 51pre.smalllisp {font-size: smaller} 52span.nocodebreak {white-space:nowrap} 53span.nolinebreak {white-space:nowrap} 54span.roman {font-family:serif; font-weight:normal} 55span.sansserif {font-family:sans-serif; font-weight:normal} 56ul.no-bullet {list-style: none} 57--> 58</style> 59 60 61</head> 62 63<body lang="en" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000"> 64<a name="PowerPC64-ELF64"></a> 65<div class="header"> 66<p> 67Next: <a href="S_002f390-ELF.html#S_002f390-ELF" accesskey="n" rel="next">S/390 ELF</a>, Previous: <a href="PowerPC-ELF32.html#PowerPC-ELF32" accesskey="p" rel="previous">PowerPC ELF32</a>, Up: <a href="Machine-Dependent.html#Machine-Dependent" accesskey="u" rel="up">Machine Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="LD-Index.html#LD-Index" title="Index" rel="index">Index</a>]</p> 68</div> 69<hr> 70<a name="ld-and-PowerPC64-64_002dbit-ELF-Support"></a> 71<h3 class="section">5.12 <code>ld</code> and PowerPC64 64-bit ELF Support</h3> 72 73<a name="index-PowerPC64-ELF64-options"></a> 74<dl compact="compact"> 75<dd><a name="index-PowerPC64-stub-grouping"></a> 76<a name="index-_002d_002dstub_002dgroup_002dsize"></a> 77</dd> 78<dt><samp>--stub-group-size</samp></dt> 79<dd><p>Long branch stubs, PLT call stubs and TOC adjusting stubs are placed 80by <code>ld</code> in stub sections located between groups of input sections. 81‘<samp>--stub-group-size</samp>’ specifies the maximum size of a group of input 82sections handled by one stub section. Since branch offsets are signed, 83a stub section may serve two groups of input sections, one group before 84the stub section, and one group after it. However, when using 85conditional branches that require stubs, it may be better (for branch 86prediction) that stub sections only serve one group of input sections. 87A negative value for ‘<samp>N</samp>’ chooses this scheme, ensuring that 88branches to stubs always use a negative offset. Two special values of 89‘<samp>N</samp>’ are recognized, ‘<samp>1</samp>’ and ‘<samp>-1</samp>’. These both instruct 90<code>ld</code> to automatically size input section groups for the branch types 91detected, with the same behaviour regarding stub placement as other 92positive or negative values of ‘<samp>N</samp>’ respectively. 93</p> 94<p>Note that ‘<samp>--stub-group-size</samp>’ does not split input sections. A 95single input section larger than the group size specified will of course 96create a larger group (of one section). If input sections are too 97large, it may not be possible for a branch to reach its stub. 98</p> 99<a name="index-PowerPC64-stub-symbols"></a> 100<a name="index-_002d_002demit_002dstub_002dsyms-1"></a> 101</dd> 102<dt><samp>--emit-stub-syms</samp></dt> 103<dd><p>This option causes <code>ld</code> to label linker stubs with a local 104symbol that encodes the stub type and destination. 105</p> 106<a name="index-PowerPC64-dot-symbols"></a> 107<a name="index-_002d_002ddotsyms"></a> 108<a name="index-_002d_002dno_002ddotsyms"></a> 109</dd> 110<dt><samp>--dotsyms</samp></dt> 111<dt><samp>--no-dotsyms</samp></dt> 112<dd><p>These two options control how <code>ld</code> interprets version patterns 113in a version script. Older PowerPC64 compilers emitted both a 114function descriptor symbol with the same name as the function, and a 115code entry symbol with the name prefixed by a dot (‘<samp>.</samp>’). To 116properly version a function ‘<samp>foo</samp>’, the version script thus needs 117to control both ‘<samp>foo</samp>’ and ‘<samp>.foo</samp>’. The option 118‘<samp>--dotsyms</samp>’, on by default, automatically adds the required 119dot-prefixed patterns. Use ‘<samp>--no-dotsyms</samp>’ to disable this 120feature. 121</p> 122<a name="index-PowerPC64-register-save_002frestore-functions"></a> 123<a name="index-_002d_002dsave_002drestore_002dfuncs"></a> 124<a name="index-_002d_002dno_002dsave_002drestore_002dfuncs"></a> 125</dd> 126<dt><samp>--save-restore-funcs</samp></dt> 127<dt><samp>--no-save-restore-funcs</samp></dt> 128<dd><p>These two options control whether PowerPC64 <code>ld</code> automatically 129provides out-of-line register save and restore functions used by 130‘<samp>-Os</samp>’ code. The default is to provide any such referenced 131function for a normal final link, and to not do so for a relocatable 132link. 133</p> 134<a name="index-PowerPC64-TLS-optimization"></a> 135<a name="index-_002d_002dno_002dtls_002doptimize-1"></a> 136</dd> 137<dt><samp>--no-tls-optimize</samp></dt> 138<dd><p>PowerPC64 <code>ld</code> normally performs some optimization of code 139sequences used to access Thread-Local Storage. Use this option to 140disable the optimization. 141</p> 142<a name="index-PowerPC64-_005f_005ftls_005fget_005faddr-optimization"></a> 143<a name="index-_002d_002dtls_002dget_002daddr_002doptimize"></a> 144<a name="index-_002d_002dno_002dtls_002dget_002daddr_002doptimize"></a> 145<a name="index-_002d_002dtls_002dget_002daddr_002dregsave"></a> 146<a name="index-_002d_002dno_002dtls_002dget_002daddr_002dregsave"></a> 147</dd> 148<dt><samp>--tls-get-addr-optimize</samp></dt> 149<dt><samp>--no-tls-get-addr-optimize</samp></dt> 150<dd><p>These options control how PowerPC64 <code>ld</code> uses a special 151stub to call __tls_get_addr. PowerPC64 glibc 2.22 and later support 152an optimization that allows the second and subsequent calls to 153<code>__tls_get_addr</code> for a given symbol to be resolved by the special 154stub without calling in to glibc. By default the linker enables 155generation of the stub when glibc advertises the availability of 156__tls_get_addr_opt. 157Using <samp>--tls-get-addr-optimize</samp> with an older glibc won’t do 158much besides slow down your applications, but may be useful if linking 159an application against an older glibc with the expectation that it 160will normally be used on systems having a newer glibc. 161<samp>--tls-get-addr-regsave</samp> forces generation of a stub that saves 162and restores volatile registers around the call into glibc. Normally, 163this is done when the linker detects a call to __tls_get_addr_desc. 164Such calls then go via the register saving stub to __tls_get_addr_opt. 165<samp>--no-tls-get-addr-regsave</samp> disables generation of the 166register saves. 167</p> 168<a name="index-PowerPC64-OPD-optimization"></a> 169<a name="index-_002d_002dno_002dopd_002doptimize"></a> 170</dd> 171<dt><samp>--no-opd-optimize</samp></dt> 172<dd><p>PowerPC64 <code>ld</code> normally removes <code>.opd</code> section entries 173corresponding to deleted link-once functions, or functions removed by 174the action of ‘<samp>--gc-sections</samp>’ or linker script <code>/DISCARD/</code>. 175Use this option to disable <code>.opd</code> optimization. 176</p> 177<a name="index-PowerPC64-OPD-spacing"></a> 178<a name="index-_002d_002dnon_002doverlapping_002dopd"></a> 179</dd> 180<dt><samp>--non-overlapping-opd</samp></dt> 181<dd><p>Some PowerPC64 compilers have an option to generate compressed 182<code>.opd</code> entries spaced 16 bytes apart, overlapping the third word, 183the static chain pointer (unused in C) with the first word of the next 184entry. This option expands such entries to the full 24 bytes. 185</p> 186<a name="index-PowerPC64-TOC-optimization"></a> 187<a name="index-_002d_002dno_002dtoc_002doptimize"></a> 188</dd> 189<dt><samp>--no-toc-optimize</samp></dt> 190<dd><p>PowerPC64 <code>ld</code> normally removes unused <code>.toc</code> section 191entries. Such entries are detected by examining relocations that 192reference the TOC in code sections. A reloc in a deleted code section 193marks a TOC word as unneeded, while a reloc in a kept code section 194marks a TOC word as needed. Since the TOC may reference itself, TOC 195relocs are also examined. TOC words marked as both needed and 196unneeded will of course be kept. TOC words without any referencing 197reloc are assumed to be part of a multi-word entry, and are kept or 198discarded as per the nearest marked preceding word. This works 199reliably for compiler generated code, but may be incorrect if assembly 200code is used to insert TOC entries. Use this option to disable the 201optimization. 202</p> 203<a name="index-PowerPC64-inline-PLT-call-optimization"></a> 204<a name="index-_002d_002dno_002dinline_002doptimize"></a> 205</dd> 206<dt><samp>--no-inline-optimize</samp></dt> 207<dd><p>PowerPC64 <code>ld</code> normally replaces inline PLT call sequences 208marked with <code>R_PPC64_PLTSEQ</code>, <code>R_PPC64_PLTCALL</code>, 209<code>R_PPC64_PLT16_HA</code> and <code>R_PPC64_PLT16_LO_DS</code> relocations by 210a number of <code>nop</code>s and a direct call when the function is defined 211locally and can’t be overridden by some other definition. This option 212disables that optimization. 213</p> 214<a name="index-PowerPC64-multi_002dTOC"></a> 215<a name="index-_002d_002dno_002dmulti_002dtoc"></a> 216</dd> 217<dt><samp>--no-multi-toc</samp></dt> 218<dd><p>If given any toc option besides <code>-mcmodel=medium</code> or 219<code>-mcmodel=large</code>, PowerPC64 GCC generates code for a TOC model 220where TOC 221entries are accessed with a 16-bit offset from r2. This limits the 222total TOC size to 64K. PowerPC64 <code>ld</code> extends this limit by 223grouping code sections such that each group uses less than 64K for its 224TOC entries, then inserts r2 adjusting stubs between inter-group 225calls. <code>ld</code> does not split apart input sections, so cannot 226help if a single input file has a <code>.toc</code> section that exceeds 22764K, most likely from linking multiple files with <code>ld -r</code>. 228Use this option to turn off this feature. 229</p> 230<a name="index-PowerPC64-TOC-sorting"></a> 231<a name="index-_002d_002dno_002dtoc_002dsort"></a> 232</dd> 233<dt><samp>--no-toc-sort</samp></dt> 234<dd><p>By default, <code>ld</code> sorts TOC sections so that those whose file 235happens to have a section called <code>.init</code> or <code>.fini</code> are 236placed first, followed by TOC sections referenced by code generated 237with PowerPC64 gcc’s <code>-mcmodel=small</code>, and lastly TOC sections 238referenced only by code generated with PowerPC64 gcc’s 239<code>-mcmodel=medium</code> or <code>-mcmodel=large</code> options. Doing this 240results in better TOC grouping for multi-TOC. Use this option to turn 241off this feature. 242</p> 243<a name="index-PowerPC64-PLT-stub-alignment"></a> 244<a name="index-_002d_002dplt_002dalign"></a> 245<a name="index-_002d_002dno_002dplt_002dalign"></a> 246</dd> 247<dt><samp>--plt-align</samp></dt> 248<dt><samp>--no-plt-align</samp></dt> 249<dd><p>Use these options to control whether individual PLT call stubs are 250aligned to a 32-byte boundary, or to the specified power of two 251boundary when using <code>--plt-align=</code>. A negative value may be 252specified to pad PLT call stubs so that they do not cross the 253specified power of two boundary (or the minimum number of boundaries 254if a PLT stub is so large that it must cross a boundary). By default 255PLT call stubs are aligned to 32-byte boundaries. 256</p> 257<a name="index-PowerPC64-PLT-call-stub-static-chain"></a> 258<a name="index-_002d_002dplt_002dstatic_002dchain"></a> 259<a name="index-_002d_002dno_002dplt_002dstatic_002dchain"></a> 260</dd> 261<dt><samp>--plt-static-chain</samp></dt> 262<dt><samp>--no-plt-static-chain</samp></dt> 263<dd><p>Use these options to control whether PLT call stubs load the static 264chain pointer (r11). <code>ld</code> defaults to not loading the static 265chain since there is never any need to do so on a PLT call. 266</p> 267<a name="index-PowerPC64-PLT-call-stub-thread-safety"></a> 268<a name="index-_002d_002dplt_002dthread_002dsafe"></a> 269<a name="index-_002d_002dno_002dplt_002dthread_002dsafe"></a> 270</dd> 271<dt><samp>--plt-thread-safe</samp></dt> 272<dt><samp>--no-plt-thread-safe</samp></dt> 273<dd><p>With power7’s weakly ordered memory model, it is possible when using 274lazy binding for ld.so to update a plt entry in one thread and have 275another thread see the individual plt entry words update in the wrong 276order, despite ld.so carefully writing in the correct order and using 277memory write barriers. To avoid this we need some sort of read 278barrier in the call stub, or use LD_BIND_NOW=1. By default, <code>ld</code> 279looks for calls to commonly used functions that create threads, and if 280seen, adds the necessary barriers. Use these options to change the 281default behaviour. 282</p> 283<a name="index-PowerPC64-ELFv2-PLT-localentry-optimization"></a> 284<a name="index-_002d_002dplt_002dlocalentry"></a> 285<a name="index-_002d_002dno_002dplt_002dlocalentry"></a> 286</dd> 287<dt><samp>--plt-localentry</samp></dt> 288<dt><samp>--no-localentry</samp></dt> 289<dd><p>ELFv2 functions with localentry:0 are those with a single entry point, 290ie. global entry == local entry, and that have no requirement on r2 291(the TOC/GOT pointer) or r12, and guarantee r2 is unchanged on return. 292Such an external function can be called via the PLT without saving r2 293or restoring it on return, avoiding a common load-hit-store for small 294functions. The optimization is attractive, with up to 40% reduction 295in execution time for a small function, but can result in symbol 296interposition failures. Also, minor changes in a shared library, 297including system libraries, can cause a function that was localentry:0 298to become localentry:8. This will result in a dynamic loader 299complaint and failure to run. The option is experimental, use with 300care. <samp>--no-plt-localentry</samp> is the default. 301</p> 302<a name="index-PowerPC64-Power10-stubs"></a> 303<a name="index-_002d_002dpower10_002dstubs"></a> 304<a name="index-_002d_002dno_002dpower10_002dstubs"></a> 305</dd> 306<dt><samp>--power10-stubs</samp></dt> 307<dt><samp>--no-power10-stubs</samp></dt> 308<dd><p>When PowerPC64 <code>ld</code> links input object files containing 309relocations used on power10 prefixed instructions it normally creates 310linkage stubs (PLT call and long branch) using power10 instructions 311for <code>@notoc</code> PLT calls where <code>r2</code> is not known. The 312power10 notoc stubs are smaller and faster, so are preferred for 313power10. <samp>--power10-stubs</samp> and <samp>--no-power10-stubs</samp> 314allow you to override the linker’s selection of stub instructions. 315<samp>--power10-stubs=auto</samp> allows the user to select the default 316auto mode. 317</p></dd> 318</dl> 319 320 321 322<hr> 323<div class="header"> 324<p> 325Next: <a href="S_002f390-ELF.html#S_002f390-ELF" accesskey="n" rel="next">S/390 ELF</a>, Previous: <a href="PowerPC-ELF32.html#PowerPC-ELF32" accesskey="p" rel="previous">PowerPC ELF32</a>, Up: <a href="Machine-Dependent.html#Machine-Dependent" accesskey="u" rel="up">Machine Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="LD-Index.html#LD-Index" title="Index" rel="index">Index</a>]</p> 326</div> 327 328 329 330</body> 331</html> 332